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/linux-3.3/Documentation/devicetree/bindings/net/
Dfsl-tsec-phy.txt5 the definition of the PHY node in booting-without-of.txt for an example
9 - reg : Offset and length of the register set for the device
10 - compatible : Should define the compatible device type for the
11 mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
17 compatible = "fsl,gianfar-mdio";
19 ethernet-phy@0 {
28 similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
33 * Gianfar-compatible ethernet nodes
37 - device_type : Should be "network"
38 - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
[all …]
/linux-3.3/arch/arm/boot/dts/
Dimx51.dtsi9 * http://www.opensource.org/licenses/gpl-license.html
22 tzic: tz-interrupt-controller@e0000000 {
23 compatible = "fsl,imx51-tzic", "fsl,tzic";
24 interrupt-controller;
25 #interrupt-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "fsl,imx-ckil", "fixed-clock";
35 clock-frequency = <32768>;
39 compatible = "fsl,imx-ckih1", "fixed-clock";
[all …]
Dimx53.dtsi9 * http://www.opensource.org/licenses/gpl-license.html
24 tzic: tz-interrupt-controller@0fffc000 {
25 compatible = "fsl,imx53-tzic", "fsl,tzic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
36 compatible = "fsl,imx-ckil", "fixed-clock";
37 clock-frequency = <32768>;
41 compatible = "fsl,imx-ckih1", "fixed-clock";
[all …]
Dpicoxcell-pc7302-pc3x3.dts14 /dts-v1/;
15 /include/ "picoxcell-pc3x3.dtsi"
18 compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3";
26 linux,stdout-path = &uart0;
30 ref_clk: clock@10 {
31 compatible = "fixed-clock";
32 clock-outputs = "ref";
33 clock-frequency = <20000000>;
37 clock@4 {
38 picochip,clk-no-disable;
[all …]
Dpicoxcell-pc7302-pc3x2.dts14 /dts-v1/;
15 /include/ "picoxcell-pc3x2.dtsi"
18 compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2";
26 linux,stdout-path = &uart0;
30 ref_clk: clock@1 {
31 compatible = "fixed-clock";
32 clock-outputs = "ref";
33 clock-frequency = <20000000>;
37 rwid-axi {
39 nand: gpio-nand@2,0 {
[all …]
/linux-3.3/arch/alpha/kernel/
Dtime.c6 * This file contains the PC-specific time handling details:
8 * 1994-07-02 Alan Modra
9 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
10 * 1995-03-26 Markus Kuhn
11 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
12 * precision CMOS clock update
13 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
15 * 1997-01-09 Adrian Sun
17 * 1997-10-29 John Bowman (bowman@math.ualberta.ca)
18 * fixed tick loss calculation in timer_interrupt
[all …]
/linux-3.3/arch/powerpc/boot/dts/
DkuroboxHD.dts21 /dts-v1/;
26 #address-cells = <1>;
27 #size-cells = <1>;
36 #address-cells = <1>;
37 #size-cells = <0>;
42 clock-frequency = <200000000>; /* Fixed by bootloader */
43 timebase-frequency = <24391680>; /* Fixed by bootloader */
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
[all …]
DkuroboxHG.dts21 /dts-v1/;
26 #address-cells = <1>;
27 #size-cells = <1>;
36 #address-cells = <1>;
37 #size-cells = <0>;
42 clock-frequency = <266000000>; /* Fixed by bootloader */
43 timebase-frequency = <32522240>; /* Fixed by bootloader */
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
[all …]
/linux-3.3/arch/m68k/include/asm/
Dcoldfire.h4 * coldfire.h -- Motorola ColdFire CPU sepecific defines
6 * (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com)
17 * Define master clock frequency. This is done at config time now.
18 * No point enumerating dozens of possible clock options here. And
25 #error "Don't know what your ColdFire CPU clock frequency is??"
34 * parts have fixed addresses and the internal peripherals cannot
39 * this part has a fixed peripheral address map.
/linux-3.3/Documentation/devicetree/bindings/spi/
Dspi_oc_tiny.txt4 - compatible : should be "opencores,tiny-spi-rtlsvn2".
5 - gpios : should specify GPIOs used for chipselect.
7 - clock-frequency : input clock frequency to the core.
8 - baud-width: width, in bits, of the programmable divider used to scale
9 the input clock to SCLK.
11 The clock-frequency and baud-width properties are needed only if the divider
12 is programmable. They are not needed if the divider is fixed.
/linux-3.3/arch/c6x/include/asm/
Dclock.h2 * TI C64X clock definitions
7 * Copied heavily from arm/mach-davinci/clock.h, so:
9 * Copyright (C) 2006-2007 Texas Instruments.
10 * Copyright (C) 2008-2009 Deep Root Systems, LLC
55 #define PLLM_VAL(x) ((x) - 1)
59 #define PLLPREDIV_VAL(x) ((x) - 1)
78 #define PLLDIV_RATIO(x) ((x) - 1)
99 /* Clock flags: SoC-specific flags start at BIT(16) */
101 #define CLK_PLL BIT(2) /* PLL-derived clock */
103 #define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */
[all …]
/linux-3.3/Documentation/sound/alsa/soc/
Dclocking.txt8 Master Clock
9 ------------
11 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
12 or SYSCLK). This audio master clock can be derived from a number of sources
13 (e.g. crystal, PLL, CPU clock) and is responsible for producing the correct
18 power). Other master clocks are fixed at a set frequency (i.e. crystals).
22 ----------
23 The Digital Audio Interface is usually driven by a Bit Clock (often referred to
24 as BCLK). This clock is used to drive the digital audio data across the link
27 The DAI also has a frame clock to signal the start of each audio frame. This
[all …]
/linux-3.3/arch/mn10300/include/asm/
Dserial-regs.h1 /* MN10300 on-board serial port module registers
15 #include <asm/cpu-regs.h>
16 #include <asm/intctl-regs.h>
22 #define SC01CTR_CK 0x0007 /* clock source select */
23 #define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
24 #define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
25 #define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
26 #define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
28 #define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
29 #define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
[all …]
/linux-3.3/Documentation/devicetree/bindings/net/can/
Dcc770.txt4 compatible with the old AN82527 from Intel, but with "bugs" being fixed.
8 - compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
11 - reg : should specify the chip select, address offset and size required
14 - interrupts : property with a value describing the interrupt source
19 - bosch,external-clock-frequency : frequency of the external oscillator
20 clock in Hz. Note that the internal clock frequency used by the
24 - bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
28 - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
31 - bosch,disconnect-rx0-input : see data sheet.
33 - bosch,disconnect-rx1-input : see data sheet.
[all …]
/linux-3.3/Documentation/ABI/testing/
Dsysfs-firmware-acpi12 well known (fixed feature) interrupts sources, such
74 sci - The number of times the ACPI SCI
77 sci_not - The number of times the ACPI SCI
80 gpe_all - count of SCI caused by GPEs.
82 gpeXX - count for individual GPE source
84 ff_gbl_lock - Global Lock
86 ff_pmtimer - PM Timer
88 ff_pwr_btn - Power Button
90 ff_rt_clk - Real Time Clock
92 ff_slp_btn - Sleep Button
[all …]
/linux-3.3/drivers/gpu/drm/gma500/
Doaktrail_lvds.c2 * Copyright © 2006-2009 Intel Corporation
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
34 /* The max/min PWM frequency in BPCR[31:17] - */
36 * 15-bit field of the and then*/
37 /* shifts to the left by one bit to get the actual 16-bit
38 * value that the 15-bits correspond to.*/
50 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_set_power()
61 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
62 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
63 dev_priv->ops->lvds_bl_power(dev, true); in oaktrail_lvds_set_power()
[all …]
/linux-3.3/Documentation/scsi/
DChangeLog.lpfc2 * Please read the associated RELEASE-NOTES file !!!
8 * Fixed build warning for 2.6.12-rc2 kernels: mempool_alloc now
19 * Removed FC_TRANSPORT_PATCHESxxx defines. They're in 2.6.12-rc1.
26 * Added PCI ID for LP10000-S.
31 * Zero-out response sense length in lpfc_scsi_prep_cmnd to prevent
33 - was causing spurious 0710 messages.
36 * Fixed a bunch of mixed tab/space indentation.
55 - stop using volatile. if you need special ordering use memory
57 - switch lpfc_sli_pcimem_bcopy to take void * arguments.
58 - remove typecast for constants - a U postfix marks them
[all …]
DChangeLog.sym53c8xx1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version sym53c8xx-1.7.3c
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Backport from SYM-2 the work-around that allows to support
7 - Check that we received at least 8 bytes of INQUIRY response
9 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
10 - + A couple of minor changes.
12 Sat Apr 7 19:30 2001 Gerard Roudier (groudier@club-internet.fr)
13 * version sym53c8xx-1.7.3b
[all …]
/linux-3.3/arch/arm/plat-omap/include/plat/
Dclock.h2 * OMAP clock: data structure definitions, function prototypes, shared macros
4 * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
23 * struct clkops - some clock function pointers
24 * @enable: fn ptr that enables the current clock in hardware
25 * @disable: fn ptr that enables the current clock in hardware
26 * @find_idlest: function returning the IDLEST register for the clock's IP blk
27 * @find_companion: function returning the "companion" clk reg for the clock
28 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
29 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
31 * A "companion" clk is an accompanying clock to the one being queried
[all …]
/linux-3.3/arch/cris/kernel/
Dtime.c7 * 1994-07-02 Alan Modra
8 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
9 * 1995-03-26 Markus Kuhn
10 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
11 * precision CMOS clock update
12 * 1996-05-03 Ingo Molnar
13 * fixed time warps in do_[slow|fast]_gettimeoffset()
14 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
33 #include <linux/sched.h> /* just for sched_clock() - funny that */
79 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) in set_rtc_mmss()
[all …]
/linux-3.3/drivers/net/ethernet/freescale/
Dgianfar_ptp.c2 * PTP 1588 clock using the eTSEC
60 u32 tmr_fiper1; /* Timer fixed period interval */
61 u32 tmr_fiper2; /* Timer fixed period interval */
62 u32 tmr_fiper3; /* Timer fixed period interval */
76 #define TCLK_PERIOD_SHIFT (16) /* 1588 timer reference clock period. */
84 #define COPH (1<<7) /* Generated clock output phase. */
85 #define CIPH (1<<6) /* External oscillator input clock phase */
87 #define BYP (1<<3) /* Bypass drift compensated clock */
89 #define CKSEL_SHIFT (0) /* 1588 Timer reference clock source */
124 #define PRSC_OCK_SHIFT (0) /* Output clock division/prescale factor. */
[all …]
/linux-3.3/drivers/video/kyro/
DSTG4000InitDevice.c20 /* SDRAM fixed settings */
41 /* Core clock freq */
44 /* Reference Clock freq */
61 /* PLL Clock */
62 #define STG4K3_PLL_SCALER 8 /* scale numbers by 2^8 for fixed point calc */
101 /* Program SD-RAM interface */ in InitSDRAMRegisters()
129 /* Translate clock in Hz */ in ProgramClock()
133 /* Work out acceptable clock in ProgramClock()
134 * The method calculates ~ +- 0.4% (1/256) in ProgramClock()
136 ulMinClock = coreClock - (coreClock >> 8); in ProgramClock()
[all …]
/linux-3.3/arch/arm/mach-omap2/
Dboard-4430sdp.c8 * Based on mach-omap2/board-3430sdp.c
25 #include <linux/regulator/fixed.h>
31 #include <asm/mach-types.h>
39 #include <plat/omap4-keypad.h>
41 #include <video/omap-panel-nokia-dsi.h>
42 #include <video/omap-panel-picodlp.h>
48 #include "common-board-devices.h"
280 .id = -1,
305 .name = "gpio-keys",
306 .id = -1,
[all …]
/linux-3.3/drivers/i2c/busses/
Di2c-sis630.c22 Fixed the typo in sis630_access (Thanks to Mark M. Hoffman)
28 used Host Master Clock 56KHz (default 14KHz).For now we save old Host
29 Master Clock and after transaction completed restore (otherwise
32 Fixed typo in sis630_access
33 Fixed logical error by restoring of Host Master Clock
99 MODULE_PARM_DESC(high_clock, "Set Host Master Clock to 56KHz (default 14KHz).");
129 dev_dbg(&adap->dev, "SMBus busy (%02x).Resetting...\n",temp); in sis630_transaction_start()
134 dev_dbg(&adap->dev, "Failed! (%02x)\n", temp); in sis630_transaction_start()
135 return -EBUSY; in sis630_transaction_start()
137 dev_dbg(&adap->dev, "Successful!\n"); in sis630_transaction_start()
[all …]
/linux-3.3/arch/arm/mach-ux500/
Dclock.h2 * Copyright (C) 2010 ST-Ericsson
11 * struct clkops - ux500 clock operations
12 * @enable: function to enable the clock
13 * @disable: function to disable the clock
14 * @get_rate: function to get the current clock rate
17 * control the clock. All of these functions are optional. If get_rate is
27 * struct clk - ux500 clock structure
28 * @ops: pointer to clkops struct used to control this clock
31 * @get_rate: custom callback for getting the clock rate
32 * @data: custom per-clock data for example for the get_rate
[all …]

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