Lines Matching +full:fixed +full:- +full:clock

2  * PTP 1588 clock using the eTSEC
60 u32 tmr_fiper1; /* Timer fixed period interval */
61 u32 tmr_fiper2; /* Timer fixed period interval */
62 u32 tmr_fiper3; /* Timer fixed period interval */
76 #define TCLK_PERIOD_SHIFT (16) /* 1588 timer reference clock period. */
84 #define COPH (1<<7) /* Generated clock output phase. */
85 #define CIPH (1<<6) /* External oscillator input clock phase */
87 #define BYP (1<<3) /* Bypass drift compensated clock */
89 #define CKSEL_SHIFT (0) /* 1588 Timer reference clock source */
124 #define PRSC_OCK_SHIFT (0) /* Output clock division/prescale factor. */
137 struct ptp_clock *clock; member
155 /* Caller must hold etsects->lock. */
161 lo = gfar_read(&etsects->regs->tmr_cnt_l); in tmr_cnt_read()
162 hi = gfar_read(&etsects->regs->tmr_cnt_h); in tmr_cnt_read()
168 /* Caller must hold etsects->lock. */
174 gfar_write(&etsects->regs->tmr_cnt_l, lo); in tmr_cnt_write()
175 gfar_write(&etsects->regs->tmr_cnt_h, hi); in tmr_cnt_write()
178 /* Caller must hold etsects->lock. */
186 ns -= etsects->tclk_period; in set_alarm()
189 gfar_write(&etsects->regs->tmr_alarm1_l, lo); in set_alarm()
190 gfar_write(&etsects->regs->tmr_alarm1_h, hi); in set_alarm()
193 /* Caller must hold etsects->lock. */
197 gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1); in set_fipers()
198 gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2); in set_fipers()
212 val = gfar_read(&etsects->regs->tmr_tevent); in isr()
216 hi = gfar_read(&etsects->regs->tmr_etts1_h); in isr()
217 lo = gfar_read(&etsects->regs->tmr_etts1_l); in isr()
222 ptp_clock_event(etsects->clock, &event); in isr()
227 hi = gfar_read(&etsects->regs->tmr_etts2_h); in isr()
228 lo = gfar_read(&etsects->regs->tmr_etts2_l); in isr()
233 ptp_clock_event(etsects->clock, &event); in isr()
238 if (etsects->alarm_value) { in isr()
241 event.timestamp = etsects->alarm_value; in isr()
242 ptp_clock_event(etsects->clock, &event); in isr()
244 if (etsects->alarm_interval) { in isr()
245 ns = etsects->alarm_value + etsects->alarm_interval; in isr()
248 spin_lock(&etsects->lock); in isr()
249 gfar_write(&etsects->regs->tmr_alarm2_l, lo); in isr()
250 gfar_write(&etsects->regs->tmr_alarm2_h, hi); in isr()
251 spin_unlock(&etsects->lock); in isr()
252 etsects->alarm_value = ns; in isr()
254 gfar_write(&etsects->regs->tmr_tevent, ALM2); in isr()
255 spin_lock(&etsects->lock); in isr()
256 mask = gfar_read(&etsects->regs->tmr_temask); in isr()
258 gfar_write(&etsects->regs->tmr_temask, mask); in isr()
259 spin_unlock(&etsects->lock); in isr()
260 etsects->alarm_value = 0; in isr()
261 etsects->alarm_interval = 0; in isr()
268 ptp_clock_event(etsects->clock, &event); in isr()
272 gfar_write(&etsects->regs->tmr_tevent, ack); in isr()
279 * PTP clock operations
291 ppb = -ppb; in ptp_gianfar_adjfreq()
293 tmr_add = etsects->tmr_add; in ptp_gianfar_adjfreq()
298 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff; in ptp_gianfar_adjfreq()
300 gfar_write(&etsects->regs->tmr_add, tmr_add); in ptp_gianfar_adjfreq()
311 spin_lock_irqsave(&etsects->lock, flags); in ptp_gianfar_adjtime()
317 spin_unlock_irqrestore(&etsects->lock, flags); in ptp_gianfar_adjtime()
331 spin_lock_irqsave(&etsects->lock, flags); in ptp_gianfar_gettime()
335 spin_unlock_irqrestore(&etsects->lock, flags); in ptp_gianfar_gettime()
337 ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder); in ptp_gianfar_gettime()
338 ts->tv_nsec = remainder; in ptp_gianfar_gettime()
349 ns = ts->tv_sec * 1000000000ULL; in ptp_gianfar_settime()
350 ns += ts->tv_nsec; in ptp_gianfar_settime()
352 spin_lock_irqsave(&etsects->lock, flags); in ptp_gianfar_settime()
357 spin_unlock_irqrestore(&etsects->lock, flags); in ptp_gianfar_settime()
369 switch (rq->type) { in ptp_gianfar_enable()
371 switch (rq->extts.index) { in ptp_gianfar_enable()
379 return -EINVAL; in ptp_gianfar_enable()
381 spin_lock_irqsave(&etsects->lock, flags); in ptp_gianfar_enable()
382 mask = gfar_read(&etsects->regs->tmr_temask); in ptp_gianfar_enable()
387 gfar_write(&etsects->regs->tmr_temask, mask); in ptp_gianfar_enable()
388 spin_unlock_irqrestore(&etsects->lock, flags); in ptp_gianfar_enable()
392 spin_lock_irqsave(&etsects->lock, flags); in ptp_gianfar_enable()
393 mask = gfar_read(&etsects->regs->tmr_temask); in ptp_gianfar_enable()
398 gfar_write(&etsects->regs->tmr_temask, mask); in ptp_gianfar_enable()
399 spin_unlock_irqrestore(&etsects->lock, flags); in ptp_gianfar_enable()
406 return -EOPNOTSUPP; in ptp_gianfar_enable()
411 .name = "gianfar clock",
432 return -1; in get_of_u32()
439 struct device_node *node = dev->dev.of_node; in gianfar_ptp_probe()
442 int err = -ENOMEM; in gianfar_ptp_probe()
450 err = -ENODEV; in gianfar_ptp_probe()
452 etsects->caps = ptp_gianfar_caps; in gianfar_ptp_probe()
453 etsects->cksel = DEFAULT_CKSEL; in gianfar_ptp_probe()
455 if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) || in gianfar_ptp_probe()
456 get_of_u32(node, "fsl,tmr-prsc", &etsects->tmr_prsc) || in gianfar_ptp_probe()
457 get_of_u32(node, "fsl,tmr-add", &etsects->tmr_add) || in gianfar_ptp_probe()
458 get_of_u32(node, "fsl,tmr-fiper1", &etsects->tmr_fiper1) || in gianfar_ptp_probe()
459 get_of_u32(node, "fsl,tmr-fiper2", &etsects->tmr_fiper2) || in gianfar_ptp_probe()
460 get_of_u32(node, "fsl,max-adj", &etsects->caps.max_adj)) { in gianfar_ptp_probe()
465 etsects->irq = platform_get_irq(dev, 0); in gianfar_ptp_probe()
467 if (etsects->irq == NO_IRQ) { in gianfar_ptp_probe()
471 if (request_irq(etsects->irq, isr, 0, DRIVER, etsects)) { in gianfar_ptp_probe()
476 etsects->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0); in gianfar_ptp_probe()
477 if (!etsects->rsrc) { in gianfar_ptp_probe()
481 if (request_resource(&ioport_resource, etsects->rsrc)) { in gianfar_ptp_probe()
486 spin_lock_init(&etsects->lock); in gianfar_ptp_probe()
488 etsects->regs = ioremap(etsects->rsrc->start, in gianfar_ptp_probe()
489 resource_size(etsects->rsrc)); in gianfar_ptp_probe()
490 if (!etsects->regs) { in gianfar_ptp_probe()
495 ptp_gianfar_settime(&etsects->caps, &now); in gianfar_ptp_probe()
498 (etsects->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | in gianfar_ptp_probe()
499 (etsects->cksel & CKSEL_MASK) << CKSEL_SHIFT; in gianfar_ptp_probe()
501 spin_lock_irqsave(&etsects->lock, flags); in gianfar_ptp_probe()
503 gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl); in gianfar_ptp_probe()
504 gfar_write(&etsects->regs->tmr_add, etsects->tmr_add); in gianfar_ptp_probe()
505 gfar_write(&etsects->regs->tmr_prsc, etsects->tmr_prsc); in gianfar_ptp_probe()
506 gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1); in gianfar_ptp_probe()
507 gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2); in gianfar_ptp_probe()
509 gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl|FS|RTPE|TE|FRD); in gianfar_ptp_probe()
511 spin_unlock_irqrestore(&etsects->lock, flags); in gianfar_ptp_probe()
513 etsects->clock = ptp_clock_register(&etsects->caps); in gianfar_ptp_probe()
514 if (IS_ERR(etsects->clock)) { in gianfar_ptp_probe()
515 err = PTR_ERR(etsects->clock); in gianfar_ptp_probe()
519 dev_set_drvdata(&dev->dev, etsects); in gianfar_ptp_probe()
525 release_resource(etsects->rsrc); in gianfar_ptp_probe()
527 free_irq(etsects->irq, etsects); in gianfar_ptp_probe()
536 struct etsects *etsects = dev_get_drvdata(&dev->dev); in gianfar_ptp_remove()
538 gfar_write(&etsects->regs->tmr_temask, 0); in gianfar_ptp_remove()
539 gfar_write(&etsects->regs->tmr_ctrl, 0); in gianfar_ptp_remove()
541 ptp_clock_unregister(etsects->clock); in gianfar_ptp_remove()
542 iounmap(etsects->regs); in gianfar_ptp_remove()
543 release_resource(etsects->rsrc); in gianfar_ptp_remove()
544 free_irq(etsects->irq, etsects); in gianfar_ptp_remove()
551 { .compatible = "fsl,etsec-ptp" },
568 MODULE_DESCRIPTION("PTP clock using the eTSEC");