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/linux-3.3/Documentation/hwmon/
Ddme1737143 attribute that needs to be set to the maximum attainable RPM (fan at 100% duty-
155 manual mode, the fan speed is set by writing the duty-cycle value to the
157 current duty-cycle as set by the fan controller in the chip. All PWM outputs
168 duty-cycles: full, low, and min. Full is internally hard-wired to 255 (100%)
174 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%)
175 pwm[1-3]_auto_point1_pwm low-speed duty-cycle
176 pwm[1-3]_auto_pwm_min min-speed duty-cycle
183 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm
186 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min
189 duty-cycle. If any of the temperatures rise above the auto_point3_temp value,
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Dvt1211167 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
172 thermal thresholds exist that controls both PWMs output duty-cycles. The
179 PWM Auto Point PWM Output Duty-Cycle
181 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
182 pwm[1-2]_auto_point3_pwm high speed duty-cycle
183 pwm[1-2]_auto_point2_pwm low speed duty-cycle
184 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
194 PWM output duty-cycle based on the input temperature:
196 Thermal Threshold Output Duty-Cycle
199 full speed duty-cycle full speed duty-cycle
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Dlm9398 a minimum pulse width of 5 clocks (at 22.5kHz => 6.25% duty cycle), and
99 a maximum pulse width of 80 clocks (at 22.5kHz => 99.88% duty cycle).
104 contains a value controlling the duty cycle for the PWM signal used when
106 indicating minimum duty cycle and 15 indicating maximum.
137 and pwm2 are used to set the manual duty cycle; each is an integer (0-255)
138 where 0 is 0% duty cycle, and 255 is 100%. Note that the duty cycle values
141 PWM mode is disabled, the value of pwm1 and pwm2 indicates the current duty
218 A spin-up cycle occurs when a PWM output is commanded from 0% duty cycle to
219 some value > 0%. The LM93 supports a minimum duty cycle during spin-up. These
221 file has the same representation as other PWM duty cycle values. The
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Df71882fg99 There are 2 modes to specify the speed of the fan, PWM duty cycle (or DC
100 voltage) mode, where 0-100% duty cycle (0-100% of 12V) is specified. And RPM
122 You ask for a specific PWM duty cycle / DC voltage or a specific % of
133 * 3: Thermostat mode (Only available on the F8000 when in duty cycle mode)
Dw83792d134 specific speed set by pwm# and automatically controlled its PWM duty cycle
137 (1) If the temperature still exceeds the high limit, PWM duty
144 (3) If the temperature goes below the low limit, PWM duty cycle will decrease
161 pwm[1-3] - this file stores PWM duty cycle or DC value (fan speed) in range:
Dmax663938 pwm1 RW Fan 1 target duty cycle (0..255)
39 pwm2 RW Fan 2 target duty cycle (0..255)
/linux-3.3/arch/cris/include/asm/
Detraxgpio.h148 PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */
161 * 6.1 kHz (81920ns + 81920ns) at 50% duty cycle, to 12.2 kHz at min/max duty
172 * For PWM_STANDARD, set duty cycle of 390 kHz PWM output signal, from
174 * For PWM_FAST, set duty cycle of PWM output signal from
176 * is a 10ns pulse surrounded by a high or low level depending on duty
178 * Resulting output frequency varies from 50 MHz at 50% duty cycle,
179 * down to 390 kHz at min/max duty cycle.
184 int duty; /* 0..255 */ member
214 /* Sets the duty cycles in steps of 1/256, 0 = 0%, 255 = 100% duty cycle */
218 int duty; /* 0..255 */ member
/linux-3.3/arch/blackfin/kernel/
Dpwm.c64 unsigned long period, duty; in pwm_config() local
76 duty = period - val; in pwm_config()
78 if (duty >= period) in pwm_config()
79 duty = period - 1; in pwm_config()
82 set_gptimer_pwidth(pwm->id, duty); in pwm_config()
/linux-3.3/arch/mips/jz4740/
Dpwm.c97 unsigned long period, duty; in pwm_config() local
120 duty = period - tmp; in pwm_config()
122 if (duty >= period) in pwm_config()
123 duty = period - 1; in pwm_config()
130 jz4740_timer_set_duty(id, duty); in pwm_config()
Dtimer.h95 static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty) in jz4740_timer_set_duty() argument
97 writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer)); in jz4740_timer_set_duty()
/linux-3.3/drivers/leds/
Dleds-atmel-pwm.c21 * of PWM duty cycle. However, a logarithmic function of duty cycle is
29 /* update the duty cycle for the *next* period */ in pwmled_brightness()
72 * the duty cycle gives us more time on (== brighter). in pwmled_probe()
81 * for scaling duty cycle: brightness * mult. in pwmled_probe()
Dleds-lp3944.c23 * - duty cycle: percentage of the period the led is on, from 0 to 100
61 /* duty cycle is a percentage */
133 * Set the duty cycle for DIM status
153 /* Convert duty cycle to PWM value */ in lp3944_dim_set_dutycycle()
254 /* invert duty cycle for inverted leds, this has the same effect of in lp3944_led_set_blink()
Dleds-pca955x.c151 * Write to PWM register, which determines the duty cycle of the
155 * Duty cycle is (256 - PWMx) / 256
326 /* PWM0 is used for half brightness or 50% duty cycle */ in pca955x_probe()
/linux-3.3/include/linux/
Datmel_pwm.h12 * polarity, and duty cycle by writing directly to the channel registers,
20 * Note that if the period or duty cycle need to be changed while the
54 #define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
Datmel-pwm-bl.h20 * @pwm_duty_max: maximum duty cycle value, must be less than or equal to
22 * @pwm_duty_min: minimum duty cycle value, must be less than pwm_duty_max.
/linux-3.3/drivers/gpu/drm/nouveau/
Dnouveau_pm.c44 u32 divs, duty; in nouveau_pwmfan_get() local
52 ret = pm->pwm_get(dev, gpio.line, &divs, &duty); in nouveau_pwmfan_get()
54 divs = max(divs, duty); in nouveau_pwmfan_get()
56 duty = divs - duty; in nouveau_pwmfan_get()
57 return (duty * 100) / divs; in nouveau_pwmfan_get()
72 u32 divs, duty; in nouveau_pwmfan_set() local
88 duty = ((divs * percent) + 99) / 100; in nouveau_pwmfan_set()
90 duty = divs - duty; in nouveau_pwmfan_set()
92 return pm->pwm_set(dev, gpio.line, divs, duty); in nouveau_pwmfan_set()
Dnv40_pm.c354 nv40_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty) in nv40_pm_pwm_get() argument
359 *duty = (reg & 0x7fff0000) >> 16; in nv40_pm_pwm_get()
368 *duty = (reg & 0x7fffffff); in nv40_pm_pwm_get()
380 nv40_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty) in nv40_pm_pwm_set() argument
383 nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs); in nv40_pm_pwm_set()
387 nv_wr32(dev, 0x0015f4, duty | 0x80000000); in nv40_pm_pwm_set()
/linux-3.3/sound/pcmcia/pdaudiocf/
Dpdaudiocf.h70 #define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */
72 #define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
75 #define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */
76 #define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */
/linux-3.3/drivers/hwmon/
Df75375s.c270 case 0: /* Manual, duty mode (full speed) */ in duty_mode_enabled()
271 case 1: /* Manual, duty mode */ in duty_mode_enabled()
272 case 4: /* Auto, duty mode */ in duty_mode_enabled()
285 case 0: /* Manual, duty mode (full speed) */ in auto_mode_enabled()
286 case 1: /* Manual, duty mode */ in auto_mode_enabled()
290 case 4: /* Auto, duty mode */ in auto_mode_enabled()
384 /* For now, deny dangerous toggling of duty mode */ in set_pwm_enable_direct()
778 bool manu, duty; in f75375_init() local
784 duty = ((mode >> F75387_FAN_DUTY_MODE(nr)) & 1); in f75375_init()
785 if (!manu && duty) in f75375_init()
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/linux-3.3/drivers/misc/
Dep93xx_pwm.c104 * /duty_percent read-write pwm duty cycle percent (1..99)
159 u32 term, duty; in ep93xx_pwm_set_freq() local
168 duty = ((val + 1) * pwm->duty_percent / 100) - 1; in ep93xx_pwm_set_freq()
173 ep93xx_pwm_write_dc(pwm, duty); in ep93xx_pwm_set_freq()
175 ep93xx_pwm_write_dc(pwm, duty); in ep93xx_pwm_set_freq()
/linux-3.3/arch/unicore32/include/mach/
Dregs-ost.h41 * PWM Duty Cycle Control Reg OST_PWMDCCR
89 * PWM Full Duty Cycle OST_PWMDCCR_FDCYCLE
/linux-3.3/drivers/cpufreq/
Dp4-clockmod.c40 * Duty Cycle (3bits), note DC_DISABLE is not specified in
78 pr_debug("CPU#%d setting duty cycle to %d%%\n", in cpufreq_p4_setdc()
82 * bits 3-1 : duty cycle in cpufreq_p4_setdc()
/linux-3.3/kernel/time/
Dtick-sched.c355 * which had the do_timer() duty last. If this cpu is in tick_nohz_stop_sched_tick()
356 * the one which had the do_timer() duty last, we in tick_nohz_stop_sched_tick()
628 * Check if the do_timer duty was dropped. We don't care about in tick_nohz_handler()
631 * this duty, then the jiffies update is still serialized by in tick_nohz_handler()
780 * Check if the do_timer duty was dropped. We don't care about in tick_sched_timer()
783 * this duty, then the jiffies update is still serialized by in tick_sched_timer()
/linux-3.3/drivers/media/rc/
Drc-loopback.c80 dprintk("invalid duty cycle: %u\n", duty_cycle); in loop_set_tx_duty_cycle()
84 dprintk("setting duty cycle: %u\n", duty_cycle); in loop_set_tx_duty_cycle()
/linux-3.3/Documentation/arm/Samsung-S3C24XX/
DDMA.txt9 duty of managing channel mappings, and programming the

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