Searched +full:qpic +full:- +full:spi +full:- +full:nand (Results 1 – 7 of 7) sorted by relevance
/linux-6.15/Documentation/devicetree/bindings/spi/ |
D | qcom,spi-qpic-snand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QPIC NAND controller 10 - Md sadre Alam <quic_mdalam@quicinc.com> 13 The QCOM QPIC-SPI-NAND flash controller is an extended version of 14 the QCOM QPIC NAND flash controller. It can work both in serial 15 and parallel mode. It supports typical SPI-NAND page cache 17 encoding/decoding using the QPIC ECC HW engine. [all …]
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/linux-6.15/include/linux/mtd/ |
D | nand-qpic-common.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * QCOM QPIC common APIs header file 155 /* NAND OP_CMDs */ 176 * the NAND controller performs reads/writes with ECC in 516 byte chunks. 200 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg)) 202 /* Returns the NAND register physical address */ 203 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset)) 207 ((chip)->reg_read_dma + \ 208 ((u8 *)(vaddr) - (u8 *)(chip)->reg_read_buf)) 236 * NAND transfers. [all …]
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/linux-6.15/drivers/spi/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # SPI driver configuration 5 menuconfig SPI config 6 bool "SPI support" 10 protocol. Chips that support SPI can have data transfer rates 12 controller and a chipselect. Most SPI slaves don't support 13 dynamic device discovery; some are even write-only or read-only. 15 SPI is widely used by microcontrollers to talk with sensors, 17 chips, analog to digital (and d-to-a) converters, and more. 18 MMC and SD cards can be accessed using SPI protocol; and for [all …]
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D | spi-qpic-snand.c | 2 * SPDX-License-Identifier: GPL-2.0 15 #include <linux/dma-mapping.h> 22 #include <linux/mtd/nand-qpic-common.h> 31 /* QSPI NAND config reg bits */ 141 snandc->regs->read_location0 = locreg_val; in qcom_spi_set_read_loc_first() 143 snandc->regs->read_location1 = locreg_val; in qcom_spi_set_read_loc_first() 145 snandc->regs->read_location2 = locreg_val; in qcom_spi_set_read_loc_first() 147 snandc->regs->read_location3 = locreg_val; in qcom_spi_set_read_loc_first() 162 snandc->regs->read_location_last0 = locreg_val; in qcom_spi_set_read_loc_last() 164 snandc->regs->read_location_last1 = locreg_val; in qcom_spi_set_read_loc_last() [all …]
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/linux-6.15/arch/arm/boot/dts/qcom/ |
D | qcom-ipq4019-ap.dk04.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; 17 stdout-path = "serial0:115200n8"; 27 serial_0_pins: serial0-state { 30 bias-disable; 33 serial_1_pins: serial1-state { 37 bias-disable; [all …]
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/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 15 interrupt-parent = <&intc>; 19 compatible = "fixed-clock"; 20 clock-frequency = <32768>; 21 #clock-cells = <0>; 25 compatible = "fixed-clock"; [all …]
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D | ipq6018.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 11 #include <dt-bindings/clock/qcom,apss-ipq.h> 12 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&intc>; 20 sleep_clk: sleep-clk { [all …]
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