Lines Matching +full:qpic +full:- +full:spi +full:- +full:nand
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * QCOM QPIC common APIs header file
155 /* NAND OP_CMDs */
176 * the NAND controller performs reads/writes with ECC in 516 byte chunks.
200 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
202 /* Returns the NAND register physical address */
203 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset))
207 ((chip)->reg_read_dma + \
208 ((u8 *)(vaddr) - (u8 *)(chip)->reg_read_buf))
236 * NAND transfers.
237 * @bam_ce - the array of BAM command elements
238 * @cmd_sgl - sgl for NAND BAM command pipe
239 * @data_sgl - sgl for NAND BAM consumer/producer pipe
240 * @last_data_desc - last DMA desc in data channel (tx/rx).
241 * @last_cmd_desc - last DMA desc in command channel.
242 * @txn_done - completion for NAND transfer.
243 * @bam_ce_pos - the index in bam_ce which is available for next sgl
244 * @bam_ce_start - the index in bam_ce which marks the start position ce
247 * @cmd_sgl_pos - current index in command sgl.
248 * @cmd_sgl_start - start index in command sgl.
249 * @tx_sgl_pos - current index in data sgl for tx.
250 * @tx_sgl_start - start index in data sgl for tx.
251 * @rx_sgl_pos - current index in data sgl for rx.
252 * @rx_sgl_start - start index in data sgl for rx.
275 * This data type corresponds to the nand dma descriptor
276 * @dma_desc - low level DMA engine descriptor
277 * @list - list for desc_info
279 * @adm_sgl - sgl which will be used for single sgl dma descriptor. Only used by
281 * @bam_sgl - sgl which will be used for dma descriptor. Only used by BAM
282 * @sgl_cnt - number of SGL in bam_sgl. Only used by BAM
283 * @dir - DMA transfer direction
342 * NAND controller data struct
356 * @props: properties of current NAND controller,
360 * @qspi: qpic spi structure
379 * @buf_size/count/start: markers for chip->legacy.read_buf/write_buf
381 * @max_cwperpage: maximum QPIC codewords required. calculated
382 * from all connected NAND devices pagesize
409 /* will be used only by QPIC for BAM DMA */
445 * This data type corresponds to the NAND controller properties which varies
446 * among different NAND controllers.
447 * @ecc_modes - ecc mode for NAND
448 * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
449 * @supports_bam - whether NAND controller is using BAM
450 * @nandc_part_of_qpic - whether NAND controller is part of qpic IP
451 * @qpic_version2 - flag to indicate QPIC IP version 2
452 * @use_codeword_fixup - whether NAND has different layout for boot partitions