| /qemu/docs/system/devices/ |
| H A D | nvme.rst | 13 Protection`_,
276 End-to-End Data Protection
279 The virtual namespace device supports DIF- and DIX-based protection information
283 Enable protection information of the specified type (type ``1``, ``2`` or
287 Controls the location of the protection information within the metadata. Set
288 to ``1`` to transfer protection information as the first bytes of metadata.
289 Otherwise, the protection information is transferred as the last bytes of
293 By default, the namespace device uses 16 bit guard protection information
294 format (``pif=0``). Set to ``2`` to enable 64 bit guard protection
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| /qemu/linux-headers/linux/ |
| H A D | userfaultfd.h | 218 * write-protection mode is supported on both shmem and hugetlbfs.
221 * write-protection mode will always apply to unpopulated pages
224 * when userfault write-protection mode is registered.
226 * UFFD_FEATURE_WP_ASYNC indicates that userfaultfd write-protection
228 * automatically resolved and write-protection is un-set.
312 * unset the flag to undo protection of a range which was previously
320 * protection (WP=0) in response to a page fault wakes the faulting
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| /qemu/include/exec/ |
| H A D | page-protection.h | 2 * QEMU page protection definitions.
23 * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs()
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| /qemu/include/hw/misc/ |
| H A D | tz-mpc.h | 2 * ARM AHB5 TrustZone Memory Protection Controller emulation
12 /* This is a model of the TrustZone memory protection controller (MPC).
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| H A D | tz-ppc.h | 2 * ARM TrustZone peripheral protection controller emulation
12 /* This is a model of the TrustZone peripheral protection controller (PPC).
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| /qemu/target/riscv/ |
| H A D | pmp.h | 2 * QEMU RISC-V PMP (Physical Memory Protection)
7 * This provides a RISC-V Physical Memory Protection interface
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| H A D | monitor.c | 227 monitor_printf(mon, "No translation or protection\n"); in hmp_info_mem()
232 monitor_printf(mon, "No translation or protection\n"); in hmp_info_mem()
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| H A D | pmp.c | 2 * QEMU RISC-V PMP (Physical Memory Protection)
7 * This provides a RISC-V Physical Memory Protection implementation
28 #include "exec/page-protection.h"
464 * If matching address range was found, the protection bits in pmp_hart_has_privs()
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| /qemu/tests/tcg/multiarch/ |
| H A D | vma-pthread.c | 8 * protection bits set.
11 * pages, which are guaranteed to have the respective protection bit set.
12 * Two mutator threads change the non-fixed protection bits randomly.
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| /qemu/target/s390x/ |
| H A D | mmu_helper.c | 26 #include "exec/page-protection.h"
52 /* check whether the address would be proteted by Low-Address Protection */
58 /* check whether Low-Address Protection is enabled for mmu_translate() */
337 * TODO: key-controlled protection. Only CPU accesses make use of the in mmu_handle_skey()
441 /* check for DAT protection */ in mmu_translate()
448 /* check for Instruction-Execution-Protection */ in mmu_translate()
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| /qemu/pc-bios/optionrom/ |
| H A D | Makefile | 29 # If -fcf-protection is enabled in flags or compiler defaults that will
32 $(quiet-@)($(call cc-option,-fcf-protection=none); \
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| /qemu/target/openrisc/ |
| H A D | interrupt.c | 71 [EXCP_DPF] = "DFP (data protection fault)", in openrisc_cpu_do_interrupt()
72 [EXCP_IPF] = "IPF (code protection fault)", in openrisc_cpu_do_interrupt()
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| /qemu/include/scsi/ |
| H A D | utils.h | 118 /* Data Protection, Write Protected */
120 /* Data Protection, Space Allocation Failed Write Protect */
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| /qemu/docs/system/arm/ |
| H A D | nuvoton.rst | 48 * OTP controllers (no protection features)
49 * Flash Interface Unit (FIU; no protection features)
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| /qemu/hw/intc/ |
| H A D | pl190.c | 126 case 8: /* PROTECTION */ in pl190_read()
197 case 8: /* PROTECTION */ in pl190_write()
198 /* TODO: Protection (supervisor only access) is not implemented. */ in pl190_write()
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| /qemu/hw/riscv/ |
| H A D | riscv-iommu.h | 109 uint64_t satp; /* S-Stage address translation and protection */
110 uint64_t gatp; /* G-Stage address translation and protection */
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| /qemu/tests/tcg/s390x/ |
| H A D | unaligned-lowcore.S | 15 .quad 0x10060000 /* lowcore protection, AFP, VX */
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| H A D | signals-s390x.c | 173 safe_puts("[ RUN ] Protection exception from stg"); in main_1()
177 safe_puts("[ RUN ] Protection exception from mvc"); in main_1()
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| /qemu/target/hppa/ |
| H A D | int_helper.c | 223 [EXCP_IMP] = "instruction memory protection trap", in hppa_cpu_do_interrupt()
234 [EXCP_DMP] = "data memory protection trap", in hppa_cpu_do_interrupt()
243 [EXCP_DMPI] = "data memory protection id trap", in hppa_cpu_do_interrupt()
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| H A D | cpu.h | 70 #define EXCP_IMP 7 /* instruction memory protection trap */
81 #define EXCP_DMP 18 /* data memory protection trap */
90 #define EXCP_DMPI 27 /* data memory protection id trap */
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| /qemu/accel/tcg/ |
| H A D | user-exec.c | 33 #include "user/page-protection.h"
34 #include "exec/page-protection.h"
140 * Fault caused by protection of cached translation; TBs in handle_sigsegv_accerr_write()
146 * Fault caused by protection of cached translation, and the in handle_sigsegv_accerr_write()
692 /* More than one protection region covers the one host page. */ in tb_lock_page0()
1026 /* Bypass the host page protection using ptrace. */ in cpu_memory_rw_debug()
1035 * host page protection, the memcpy() above would SEGV, in cpu_memory_rw_debug()
1051 /* Bypass the host page protection using ptrace. */ in cpu_memory_rw_debug()
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| H A D | tb-internal.h | 31 * account for other TBs on the same page, defer undoing any page protection
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| /qemu/bsd-user/ |
| H A D | mmap.c | 21 #include "exec/page-protection.h"
22 #include "user/page-protection.h"
199 /* get the protection of the target pages outside the mapping */ in mmap_frag()
224 /* adjust protection to be able to read */ in mmap_frag()
233 /* put final protection */ in mmap_frag()
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| /qemu/target/alpha/ |
| H A D | cpu.h | 321 PTE_FOR = 0x0002, /* used for page protection (fault on read) */
322 PTE_FOW = 0x0004, /* used for page protection (fault on write) */
323 PTE_FOE = 0x0008, /* used for page protection (fault on exec) */
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| /qemu/hw/nvme/ |
| H A D | dif.c | 2 * QEMU NVM Express End-to-End Data Protection support
327 * set the protection information to all ones to disable protection in nvme_dif_check()
680 /* splice generated protection information into the buffer */ in nvme_dif_rw()
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