xref: /qemu/docs/system/arm/nuvoton.rst (revision f41af4c5857b6983766aaffc041580ff170d0679)
1Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj``, ``npcm845-evb``)
2======================================================================================================================
3
4The `Nuvoton iBMC`_ chips are a family of Arm-based SoCs that are
5designed to be used as Baseboard Management Controllers (BMCs) in various
6servers. Currently there are two families: NPCM7XX series and
7NPCM8XX series. NPCM7XX series feature one or two Arm Cortex-A9 CPU cores,
8while NPCM8XX feature 4 Arm Cortex-A35 CPU cores. Both series contain a
9different assortment of peripherals targeted for either Enterprise or Data
10Center / Hyperscale applications.
11
12.. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
13
14The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise
15segment. The following machines are based on this chip :
16
17- ``npcm750-evb``       Nuvoton NPCM750 Evaluation board
18
19The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
20Hyperscale applications. The following machines are based on this chip :
21
22- ``quanta-gbs-bmc``    Quanta GBS server BMC
23- ``quanta-gsj``        Quanta GSJ server BMC
24- ``kudo-bmc``          Fii USA Kudo server BMC
25- ``mori-bmc``          Fii USA Mori server BMC
26
27There are also two more SoCs, NPCM710 and NPCM705, which are single-core
28variants of NPCM750 and NPCM730, respectively. These are currently not
29supported by QEMU.
30
31The NPCM8xx SoC is the successor of the NPCM7xx SoC. It has 4 Cortex-A35 cores.
32The following machines are based on this chip :
33
34- ``npcm845-evb``       Nuvoton NPCM845 Evaluation board
35
36Supported devices
37-----------------
38
39 * SMP (Dual Core Cortex-A9)
40 * Cortex-A9MPCore built-in peripherals: SCU, GIC, Global Timer, Private Timer
41   and Watchdog.
42 * SRAM, ROM and DRAM mappings
43 * System Global Control Registers (GCR)
44 * Clock and reset controller (CLK)
45 * Timer controller (TIM)
46 * Serial ports (16550-based)
47 * DDR4 memory controller (dummy interface indicating memory training is done)
48 * OTP controllers (no protection features)
49 * Flash Interface Unit (FIU; no protection features)
50 * Random Number Generator (RNG)
51 * USB host (USBH)
52 * GPIO controller
53 * Analog to Digital Converter (ADC)
54 * Pulse Width Modulation (PWM)
55 * SMBus controller (SMBF)
56 * Ethernet controller (EMC)
57 * Tachometer
58 * Peripheral SPI controller (PSPI)
59
60Missing devices
61---------------
62
63 * LPC/eSPI host-to-BMC interface, including
64
65   * Keyboard and mouse controller interface (KBCI)
66   * Keyboard Controller Style (KCS) channels
67   * BIOS POST code FIFO
68   * System Wake-up Control (SWC)
69   * Shared memory (SHM)
70   * eSPI slave interface
71   * Block-transfer interface (8XX only)
72   * Virtual UART (8XX only)
73
74 * Ethernet controller (GMAC)
75 * USB device (USBD)
76 * SD/MMC host
77 * PECI interface
78 * PCI and PCIe root complex and bridges
79 * VDM and MCTP support
80 * Serial I/O expansion
81 * LPC/eSPI host
82 * Coprocessor
83 * Graphics
84 * Video capture
85 * Encoding compression engine
86 * Security features
87 * I3C buses (8XX only)
88 * Temperature sensor interface (8XX only)
89 * Virtual UART (8XX only)
90 * Flash monitor (8XX only)
91 * JTAG master (8XX only)
92
93Boot options
94------------
95
96The Nuvoton machines can boot from an OpenBMC firmware image, or directly into
97a kernel using the ``-kernel`` option. OpenBMC images for ``quanta-gsj`` and
98possibly others can be downloaded from the OpenBMC jenkins :
99
100   https://jenkins.openbmc.org/
101
102The firmware image should be attached as an MTD drive. Example :
103
104.. code-block:: bash
105
106  $ qemu-system-arm -machine quanta-gsj -nographic \
107      -drive file=image-bmc,if=mtd,bus=0,unit=0,format=raw
108
109The default root password for test images is usually ``0penBmc``.
110