#
695a6fee |
| 06-Dec-2019 |
Krish Sadhukhan <krish.sadhukhan@oracle.com> |
kvm-unit-test: nVMX: Modify test_canonical() to process guest fields also
Signed-off-by: Krish Sadhukhkan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-
kvm-unit-test: nVMX: Modify test_canonical() to process guest fields also
Signed-off-by: Krish Sadhukhkan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
a299895b |
| 06-Dec-2019 |
Thomas Huth <thuth@redhat.com> |
Switch the order of the parameters in report() and report_xfail()
Commit c09c54c66b1df ("lib: use an argument which doesn't require default argument promotion") fixed a warning that occurs with Clan
Switch the order of the parameters in report() and report_xfail()
Commit c09c54c66b1df ("lib: use an argument which doesn't require default argument promotion") fixed a warning that occurs with Clang, but introduced a regression: If the "pass" parameter is a value which has only set the condition bits in the upper 32 bits of a 64 bit value, the condition is now false since the value is truncated to "unsigned int" so that the upper bits are simply discarded.
We fixed it by reverting the commit, but that of course also means trouble with Clang again. We can not use "bool" if it is the last parameter before the variable argument list. The proper fix is to swap the parameters around and make the format string the last parameter.
This patch (except the changes in lib/libcflat.h and lib/report.c and some rebase conflicts along the way) has basically been created with following coccinelle script (with some additional manual tweaking of long and disabled lines afterwards):
@@ expression fmt; expression pass; expression list args; @@ report( -fmt, pass +pass, fmt , args);
@@ expression fmt; expression pass; expression list args; @@ report_xfail( -fmt, xfail, pass +xfail, pass, fmt , args);
Tested-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20191206113102.14914-1-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
8542a8bc |
| 02-Dec-2019 |
Aaron Lewis <aaronlewis@google.com> |
x86: Add RDTSC test
Verify that the difference between a guest RDTSC instruction and the IA32_TIME_STAMP_COUNTER MSR value stored in the VMCS12's VM-exit MSR-store list is less than 750 cycles, 99.9
x86: Add RDTSC test
Verify that the difference between a guest RDTSC instruction and the IA32_TIME_STAMP_COUNTER MSR value stored in the VMCS12's VM-exit MSR-store list is less than 750 cycles, 99.9% of the time.
Testcase for Linux kernel commit 662f1d1d1931 ("KVM: nVMX: Add support for capturing highest observable L2 TSC”).
Signed-off-by: Aaron Lewis <aaronlewis@google.com> Reviewed-by: Jim Mattson <jmattson@google.com> Reviewed-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
19697109 |
| 09-Oct-2019 |
Nadav Amit <namit@vmware.com> |
x86: vmx: Fix the check whether CMCI is supported
The logic of figuring out whether CMCI is supported is broken, causing the CMCI accessing tests to fail on Skylake bare-metal.
Determine whether CM
x86: vmx: Fix the check whether CMCI is supported
The logic of figuring out whether CMCI is supported is broken, causing the CMCI accessing tests to fail on Skylake bare-metal.
Determine whether CMCI is supported according to the maximum entries in the LVT as encoded in the APIC version register.
Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Nadav Amit <namit@vmware.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
7aa46473 |
| 14-Nov-2019 |
Oliver Upton <oupton@google.com> |
x86: VMX: Add tests for nested "load IA32_PERF_GLOBAL_CTRL"
Tests to verify that KVM performs the correct checks on Host/Guest state at VM-entry, as described in SDM 26.3.1.1 "Checks on Guest Contro
x86: VMX: Add tests for nested "load IA32_PERF_GLOBAL_CTRL"
Tests to verify that KVM performs the correct checks on Host/Guest state at VM-entry, as described in SDM 26.3.1.1 "Checks on Guest Control Registers, Debug Registers, and MSRs" and SDM 26.2.2 "Checks on Host Control Registers and MSRs".
Test that KVM does the following:
If the "load IA32_PERF_GLOBAL_CTRL" VM-entry control is 1, the reserved bits of the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the GUEST_IA32_PERF_GLOBAL_CTRL VMCS field. Otherwise, the VM-entry should fail with an exit reason of "VM-entry failure due to invalid guest state" (33). On a successful VM-entry, the correct value should be observed when the nested VM performs an RDMSR on IA32_PERF_GLOBAL_CTRL.
If the "load IA32_PERF_GLOBAL_CTRL" VM-exit control is 1, the reserved bits of the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the HOST_IA32_PERF_GLOBAL_CTRL VMCS field. Otherwise, the VM-entry should fail with a VM-instruction error of "VM entry with invalid host-state field(s)" (8). On a successful VM-exit, the correct value should be observed when L1 performs an RDMSR on IA32_PERF_GLOBAL_CTRL.
Suggested-by: Jim Mattson <jmattson@google.com> Co-developed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Oliver Upton <oupton@google.com> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
e31194e7 |
| 14-Nov-2019 |
Oliver Upton <oupton@google.com> |
x86: VMX: Make guest_state_test_main() check state from nested VM
Introduce the vmx_state_area_test_data struct for sharing test expectation data with the nested VM.
Signed-off-by: Oliver Upton <ou
x86: VMX: Make guest_state_test_main() check state from nested VM
Introduce the vmx_state_area_test_data struct for sharing test expectation data with the nested VM.
Signed-off-by: Oliver Upton <oupton@google.com> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
fc47ccc1 |
| 11-Nov-2019 |
Liran Alon <liran.alon@oracle.com> |
x86: vmx: Verify pending LAPIC INIT event consume when exit on VMX_INIT
Intel SDM section 25.2 OTHER CAUSES OF VM EXITS specifies the following on INIT signals: "Such exits do not modify register st
x86: vmx: Verify pending LAPIC INIT event consume when exit on VMX_INIT
Intel SDM section 25.2 OTHER CAUSES OF VM EXITS specifies the following on INIT signals: "Such exits do not modify register state or clear pending events as they would outside of VMX operation."
When commit 48adfb0f2e8e ("x86: vmx: Test INIT processing during various CPU VMX states") was applied, I interepted above Intel SDM statement such that VMX_INIT exit don’t consume the pending LAPIC INIT event.
However, when Nadav Amit run the unit-test on a bare-metal machine, it turned out my interpetation was wrong. i.e. VMX_INIT exit does consume the pending LAPIC INIT event. (See: https://www.spinics.net/lists/kvm/msg196757.html)
Therefore, fix unit-test code to behave as observed on bare-metal. i.e. End unit-test with the following steps: 1) Exit VMX operation and verify it still continues to run properly as pending LAPIC INIT event should have been already consumed by VMX_INIT exit. 2) Re-enter VMX operation and send another INIT signal to keep it blocked until exit from VMX operation. 3) Exit VMX operation and verify that pending LAPIC INIT signal is processed when exiting VMX operation.
Fixes: 48adfb0f2e8e ("x86: vmx: Test INIT processing during various CPU VMX states") Reported-by: Nadav Amit <nadav.amit@gmail.com> Reviewed-by: Mihai Carabas <mihai.carabas@oracle.com> Signed-off-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
7c0ce8fa |
| 11-Nov-2019 |
Liran Alon <liran.alon@oracle.com> |
x86: vmx: Verify L2 modification to L1 LAPIC TPR works when L0 use TPR threshold
Test aims to verify that the issue fixed by commit ("KVM: nVMX: Update vmcs01 TPR_THRESHOLD if L2 changed L1 TPR") is
x86: vmx: Verify L2 modification to L1 LAPIC TPR works when L0 use TPR threshold
Test aims to verify that the issue fixed by commit ("KVM: nVMX: Update vmcs01 TPR_THRESHOLD if L2 changed L1 TPR") is indeed fixed.
Test performs the following steps: 1) Disable interrupts. 2) Raise TPR to high value and queue a pending interrupt in LAPIC by issueing a self-IPI with lower priority. 3) Launch guest such that it is provided with passthrough access to LAPIC. 4) Inside guest, disable interrupts and lower TPR to 0 and then exit guest. 5) Back on host, verify that indeed TPR was set to 0 and that enabling interrupts indeed deliever pending interrupt in LAPIC.
Without above mentioned commit in L0, step (2) will cause L0 to raise TPR-threshold to self-IPI vector priority and step (4) will *not* change vmcs01 TPR-threshold to 0. This will result in infinite loop of VMExits on TPR_BELOW_THRESHOLD every time L0 attempts to enter L1. Which will cause test to hang and eventually fail on timeout.
Reviewed-by: Joao Martins <joao.m.martins@oracle.com> Signed-off-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
1cf12996 |
| 03-Oct-2019 |
Nadav Amit <namit@vmware.com> |
x86: VMX: Mask advanced VM-exit info
Bits [9:11] are undefined in the VM-exit qualification when "advanced VM-exit information for EPT violations" is not supported.
Mask these bits for now to avoid
x86: VMX: Mask advanced VM-exit info
Bits [9:11] are undefined in the VM-exit qualification when "advanced VM-exit information for EPT violations" is not supported.
Mask these bits for now to avoid false failures. If KVM supports this feature, the tests would need to be adapted, and the masking would need to be removed.
Unfortunately, I do not have hardware that supports this feature available for my use to make a better fix.
Signed-off-by: Nadav Amit <namit@vmware.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
e329c328 |
| 10-Sep-2019 |
Jim Mattson <jmattson@google.com> |
x86: Skip APIC-access address tests beyond mapped RAM
We no longer have any tests in vmx_tests.c that use xfail_beyond_mapped_ram. However, an upcoming change to kvm will exit to userspace with a kv
x86: Skip APIC-access address tests beyond mapped RAM
We no longer have any tests in vmx_tests.c that use xfail_beyond_mapped_ram. However, an upcoming change to kvm will exit to userspace with a kvm internal error whenever launching a nested VM with the vmcs12 APIC-access address set to a non-cacheable address in L1. Reuse the xfail_beyond_mapped_ram plumbing to support skip_beyond_mapped_ram, and skip any APIC-access address tests that use addresses beyond mapped RAM, so that the test won't induce a kvm internal error.
Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
22813e21 |
| 25-Sep-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: vmx_tests: add GUEST_EFER tests
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
#
e672c52e |
| 25-Sep-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: vmx_tests: prepare for extending guest state area tests
Move the test setup and teardown from test_pat to vmx_guest_state_area_test, so that we can add more tests after test_load_guest_pat.
Si
x86: vmx_tests: prepare for extending guest state area tests
Move the test setup and teardown from test_pat to vmx_guest_state_area_test, so that we can add more tests after test_load_guest_pat.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
a22d7b55 |
| 25-Sep-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: vmx_tests: extend HOST_EFER tests
Extend the tests to cover the host address size bit.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
#
e57d11fb |
| 25-Sep-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
x86: vmx_tests: gate load guest PAT tests on the correct bit
The tests should check the "load PAT" entry control, not the exit control.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
#
48adfb0f |
| 19-Sep-2019 |
Liran Alon <liran.alon@oracle.com> |
x86: vmx: Test INIT processing during various CPU VMX states
Add vmx test to verify the functionality introduced by KVM commit: 4b9852f4f389 ("KVM: x86: Fix INIT signal handling in various CPU state
x86: vmx: Test INIT processing during various CPU VMX states
Add vmx test to verify the functionality introduced by KVM commit: 4b9852f4f389 ("KVM: x86: Fix INIT signal handling in various CPU states").
The test verifies the following functionality: 1) An INIT signal received when CPU is in VMX operation is blocked until it exits VMX operation. 2) If there is an INIT signal pending when CPU is in VMX non-root mode, it result in VMExit with (reason == 3). 3) Exit from VMX non-root mode on VMExit do not clear pending INIT signal in LAPIC. 4) When CPU exits VMX operation, pending INIT signal in LAPIC is processed.
Note: The test is excluded from the "vmx" test-suite as it ruins the execution environment of CPU1 because during the test it process an INIT signal.
Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Liran Alon <liran.alon@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
e9554497 |
| 14-Sep-2019 |
Marc Orr <marcorr@google.com> |
x86: nvmx: test max atomic switch MSRs
Excerise nested VMX's atomic MSR switch code (e.g., VM-entry MSR-load list) at the maximum number of MSRs supported, as described in the SDM, in the appendix c
x86: nvmx: test max atomic switch MSRs
Excerise nested VMX's atomic MSR switch code (e.g., VM-entry MSR-load list) at the maximum number of MSRs supported, as described in the SDM, in the appendix chapter titled "MISCELLANEOUS DATA".
Suggested-by: Jim Mattson <jmattson@google.com> Signed-off-by: Marc Orr <marcorr@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
cd5d4208 |
| 12-Aug-2019 |
Krish Sadhukhan <krish.sadhukhan@oracle.com> |
kvm-unit-test: nVMX: Fix 95d6d2c32288 ("nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests")
Commit 95d6d2c32288 added a test for the Segment Selector VMCS field. Th
kvm-unit-test: nVMX: Fix 95d6d2c32288 ("nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests")
Commit 95d6d2c32288 added a test for the Segment Selector VMCS field. That test sets the "host address-space size" VM-exit control to zero and as a result, on VM-exit the guest exits as 32-bit. Since vmx tests are 64-bit, this results in a hardware error. This patch also cleans up a few other areas in commit 95d6d2c32288, including replacing make_non_canonical() with NONCANONICAL.
Reported-by: Nadav Amit <nadav.amit@gmail.com> Signed-off-by: Krish Sadhukhan <kris.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
0786c031 |
| 09-Aug-2019 |
Krish Sadhukhan <krish.sadhukhan@oracle.com> |
kvm-unit-test: nVMX: Check Host Address Space Size on vmentry of nested guests
According to section "Checks Related to Address-Space Size" in Intel SDM vol 3C, the following checks are performed on
kvm-unit-test: nVMX: Check Host Address Space Size on vmentry of nested guests
According to section "Checks Related to Address-Space Size" in Intel SDM vol 3C, the following checks are performed on vmentry of nested guests:
If the "host address-space size" VM-exit control is 0, the following must hold: - The "IA-32e mode guest" VM-entry control is 0. - Bit 17 of the CR4 field (corresponding to CR4.PCIDE) is 0. - Bits 63:32 in the RIP field are 0.
If the "host address-space size" VM-exit control is 1, the following must hold: - Bit 5 of the CR4 field (corresponding to CR4.PAE) is 1. - The RIP field contains a canonical address.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
5eb7ccf6 |
| 28-Aug-2019 |
Oliver Upton <oupton@google.com> |
x86: VMX: INVEPT after modifying PA mapping in ept_untwiddle
ept_untwiddle modifies a PA mapping in the EPT paging structure. According to the SDM 28.3.3.4, "Software should use the INVEPT instructi
x86: VMX: INVEPT after modifying PA mapping in ept_untwiddle
ept_untwiddle modifies a PA mapping in the EPT paging structure. According to the SDM 28.3.3.4, "Software should use the INVEPT instruction with the "single-context" INVEPT type after making any of the following changes to an EPT paging-structure entry ... Changing the physical address in bits 51:12".
Suggested-by: Peter Shier <pshier@google.com> Signed-off-by: Oliver Upton <oupton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
65d7e712 |
| 30-Aug-2019 |
Nadav Amit <namit@vmware.com> |
x86: nVMX: Fix wrong reserved bits of error-code
The SDM indeed says that "If deliver-error-code is 1, bits 31:15 of the VM-entry exception error-code field are 0." However, the SDM is wrong, and bi
x86: nVMX: Fix wrong reserved bits of error-code
The SDM indeed says that "If deliver-error-code is 1, bits 31:15 of the VM-entry exception error-code field are 0." However, the SDM is wrong, and bits that need to be zeroed are 31:16.
Our engineers confirmed that the SDM is wrong with Intel. Fix the test.
Note that KVM should be fixed as well.
Fixes: 8d2cdb35a07a ("x86: Add test for nested VM entry prereqs") Cc: Marc Orr <marcorr@google.com> Signed-off-by: Nadav Amit <namit@vmware.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
a987f487 |
| 30-Aug-2019 |
Nadav Amit <namit@vmware.com> |
x86: nVMX: Do not use test_skip() when multiple tests are run
Using test_skip() when multiple tests are run causes all the following tests to be skipped. Instead, just print a message and return.
F
x86: nVMX: Do not use test_skip() when multiple tests are run
Using test_skip() when multiple tests are run causes all the following tests to be skipped. Instead, just print a message and return.
Fixes: 47cc3d85c2fe ("nVMX x86: Check PML and EPT on vmentry of L2 guests") Fixes: 7fd449f2ed2e ("nVMX x86: Check VPID value on vmentry of L2 guests") Fixes: 181219bfd76b ("x86: Add test for checking NMI controls on vmentry of L2 guests") Fixes: 1d70eb823e12 ("nVMX x86: Check EPTP on vmentry of L2 guests") Cc: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Nadav Amit <namit@vmware.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
1a0ef4f8 |
| 22-Aug-2019 |
Sean Christopherson <sean.j.christopherson@intel.com> |
x86: Skip EPT tests that involve unrestricted guest when URG is disabled
Cc: Krish Sadhukhan <krish.sadhukhan@oracle.com> Fixes: f749ddc19bb2d ("nVMX x86: Check enable-EPT on vmentry of L2 guests")
x86: Skip EPT tests that involve unrestricted guest when URG is disabled
Cc: Krish Sadhukhan <krish.sadhukhan@oracle.com> Fixes: f749ddc19bb2d ("nVMX x86: Check enable-EPT on vmentry of L2 guests") Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
03b1e457 |
| 22-Jul-2019 |
Nadav Amit <nadav.amit@gmail.com> |
x86: Support environments without test-devices
Enable to run the tests when test-device is not present (e.g., bare-metal). Users can provide the number of CPUs and ram size through kernel parameters
x86: Support environments without test-devices
Enable to run the tests when test-device is not present (e.g., bare-metal). Users can provide the number of CPUs and ram size through kernel parameters.
On Ubuntu that uses grub, for example, the tests can be run by copying a test to the boot directory (/boot) and adding a menu-entry to grub (e.g., by editing /etc/grub.d/40_custom):
menuentry 'idt_test' { set root='[ROOT]' multiboot [BOOT_RELATIVE]/[TEST].flat [PARAMETERS] module params.initrd }
Replace: * [ROOT] with `grub-probe --target=bios_hints /boot` * [BOOT_RELATIVE] with `grub-mkrelpath /boot` * [TEST] with the test executed * [PARAMETERS] with the test parameters
params.initrd, which would be located on the boot directory should describe the machine and tell the test infrastructure that a test device is not present and boot-loader was used (the bootloader and qemu deliver test . For example for a 4 core machines with 4GB of memory:
NR_CPUS=4 MEMSIZE=4096 TEST_DEVICE=0 BOOTLOADER=1
Since we do not really use E820, using more than 4GB is likely to fail due to holes.
Finally, do not forget to run update-grub. Remember that the output goes to the serial port.
Cc: Andrew Jones <drjones@redhat.com> Signed-off-by: Nadav Amit <nadav.amit@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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|
#
86f69800 |
| 02-Aug-2019 |
Oliver Upton <oupton@google.com> |
x86: vmx: Fix comment typo for ept_access_paddr()
the comment for ept_access_paddr() referred to a nonexistent ept_access_data. Fixing the comment to correctly refer to ept_access_test_data.
Signed
x86: vmx: Fix comment typo for ept_access_paddr()
the comment for ept_access_paddr() referred to a nonexistent ept_access_data. Fixing the comment to correctly refer to ept_access_test_data.
Signed-off-by: Oliver Upton <oupton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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|
#
badc98ca |
| 30-Jul-2019 |
Krish Sadhukhan <krish.sadhukhan@oracle.com> |
kvm-unit-test: x86: Replace cpuid/cpuid_indexed calls with this_cpu_has()
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-b
kvm-unit-test: x86: Replace cpuid/cpuid_indexed calls with this_cpu_has()
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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