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/linux-6.15/include/drm/display/
Ddrm_dsc.h1 /* SPDX-License-Identifier: MIT
45 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
67 * struct drm_dsc_config - Parameters required to configure DSC
75 * Bits per component for previous reconstructed line buffer
79 * @bits_per_component: Bits per component to code (8/10/12)
84 * Flag to indicate if RGB - YCoCg conversion is needed
89 * @slice_count: Number fo slices per line used by the DSC encoder
93 * @slice_width: Width of each slice in pixels
97 * @slice_height: Slice height in pixels
124 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
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/linux-6.15/Documentation/accel/qaic/
Dqaic.rst1 .. SPDX-License-Identifier: GPL-2.0-only
14 --------------------
21 non-empty and generate MSIs at a rate equivalent to the speed of the
24 MSIs per second. It has been observed that most systems cannot tolerate this
29 QAIC receives an IRQ, it disables that line. This prevents the interrupt
33 line remains disabled during this time. If no activity is detected, QAIC exits
34 polling mode and reenables the IRQ line.
37 generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
42 ---------------
72 QAIC handles and enforces the required little endianness and 64-bit alignment,
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/linux-6.15/tools/perf/pmu-events/arch/powerpc/power9/
Dother.json25 "BriefDescription": "Cycles in which the SRQ has at least one (out of four) empty slice"
60 …"BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The strea…
65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
120 …"BriefDescription": "L3 TM CAM is full when a L2 castout of TM_SC line occurs. Line is pushed to …
125 "BriefDescription": "TEND latency per thread"
175 "BriefDescription": "Ic line invalidated"
190 …"BriefDescription": "TM snoop that is a store hits line in L3 in T, Tn or Te state (shared modifie…
200 "BriefDescription": "Read-write data cache collisions"
235 … "BriefDescription": "Core TM load hits line in L3 in TM_SC state and causes it to be invalidated"
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/linux-6.15/Documentation/scheduler/
Dsched-bwc.rst7 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst
14 microseconds of CPU time. That quota is assigned to per-cpu run queues in
22 is transferred to cpu-local "silos" on a demand basis. The amount transferred
23 within each of these updates is tunable and described as the "slice".
26 -------------
30 Traditional (UP-EDF) bandwidth control is something like:
46 the cost of missing deadlines when all the odds line up. However, it
66 https://lore.kernel.org/lkml/5371BD36-55AE-4F71-B9D7-B86DC32E3D2B@linux.alibaba.com/
69 ----------
75 :ref:`Documentation/admin-guide/cgroup-v2.rst <cgroup-v2-cpu>`.
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/linux-6.15/drivers/media/platform/samsung/s5p-mfc/
Dregs-mfc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define S5P_FIMV_REG_SIZE (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR)
16 #define S5P_FIMV_REG_COUNT ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4)
74 /* overlap transform line */
84 /* VC-1 decoding */
189 #define S5P_FIMV_CRC_LUMA0 0x2030 /* luma crc data per frame
191 #define S5P_FIMV_CRC_CHROMA0 0x2034 /* chroma crc data per frame
193 #define S5P_FIMV_CRC_LUMA1 0x2038 /* luma crc data per bottom
195 #define S5P_FIMV_CRC_CHROMA1 0x203c /* chroma crc data per bottom
265 #define S5P_FIMV_ENC_SI_SLICE_TYPE 0x2010 /* slice type(I/P/B/IDR) */
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/linux-6.15/block/partitions/
Dmsdos.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 1991-1998 Linus Torvalds
9 * in the early extended-partition checks and added DM partitions
16 * More flexible handling of extended partitions - aeb, 950831
20 * Re-organised Feb 1998 Russell King
43 return (sector_t)get_unaligned_le32(&p->nr_sects); in nr_sects()
48 return (sector_t)get_unaligned_le32(&p->start_sect); in start_sect()
53 return (p->sys_ind == DOS_EXTENDED_PARTITION || in is_extended_partition()
54 p->sys_ind == WIN98_EXTENDED_PARTITION || in is_extended_partition()
55 p->sys_ind == LINUX_EXTENDED_PARTITION); in is_extended_partition()
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/linux-6.15/kernel/sched/
Dext.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 * BPF extensible scheduler class: Documentation/scheduler/sched-ext.rst
36 SCX_EXIT_UNREG = 64, /* user-space initiated unregistration */
37 SCX_EXIT_UNREG_BPF, /* BPF-initiated unregistration */
38 SCX_EXIT_UNREG_KERN, /* kernel-initiated unregistration */
54 * SYS ACT: System-defined exit actions
55 * SYS RSN: System-defined exit reasons
56 * USR : User-defined exit codes and reasons
59 * actions and/or system reasons with a user-defined exit code.
74 /* %SCX_EXIT_* - broad category of the exit reason */
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/linux-6.15/arch/arm64/boot/dts/ti/
Dk3-am642-tqma64xxl-mbax4xxl.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pwm/pwm.h>
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/linux-6.15/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
24 - enum:
25 - mediatek,mt8173-disp-merge
26 - mediatek,mt8195-disp-merge
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/linux-6.15/drivers/base/
Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
23 /* pointer to per cpu cacheinfo */
26 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
27 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
44 * system-wide shared caches for all other levels. in cache_leaves_are_shared()
48 return (this_leaf->level != 1) && (sib_leaf->level != 1); in cache_leaves_are_shared()
50 if ((sib_leaf->attributes & CACHE_ID) && in cache_leaves_are_shared()
51 (this_leaf->attributes & CACHE_ID)) in cache_leaves_are_shared()
52 return sib_leaf->id == this_leaf->id; in cache_leaves_are_shared()
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/linux-6.15/tools/perf/Documentation/
Dperf-report.txt1 perf-report(1)
5 ----
6 perf-report - Read perf.data (created by perf record) and display the profile
9 --------
11 'perf report' [-i <file> | --input=file]
14 -----------
19 -------
20 -i::
21 --input=::
24 -v::
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Dperf-script.txt1 perf-script(1)
5 ----
6 perf-script - Read perf.data (created by perf record) and display trace output
9 --------
12 'perf script' [<options>] record <script> [<record-options>] <command>
13 'perf script' [<options>] report <script> [script-args]
14 'perf script' [<options>] <script> <required-script-args> [<record-options>] <command>
15 'perf script' [<options>] <top-script> [script-args]
18 -----------
26 You can also run a set of pre-canned scripts that aggregate and
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/
Ddc_dsc.c34 dsc->ctx->logger
55 /* Need to account for padding due to pixel-to-symbol packing
66 if (!timing->flags.DSC) { in apply_128b_132b_stream_overhead()
71 bpp = dc_fixpt_div_int(bpp, timing->pix_clk_100hz / 10); in apply_128b_132b_stream_overhead()
73 /* Symbols_per_HActive = HActive * bpp / (4 lanes * 32-bit symbol size) in apply_128b_132b_stream_overhead()
76 overhead_factor = dc_fixpt_from_int(timing->h_addressable); in apply_128b_132b_stream_overhead()
97 if (timing->flags.DSC) in dc_bandwidth_in_kbps_from_timing()
99 timing->dsc_cfg.bits_per_pixel, in dc_bandwidth_in_kbps_from_timing()
100 timing->dsc_cfg.num_slices_h, in dc_bandwidth_in_kbps_from_timing()
101 timing->dsc_cfg.is_dp); in dc_bandwidth_in_kbps_from_timing()
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/linux-6.15/drivers/dma/dw/
Didma32.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2013,2018,2020-2021 Intel Corporation
38 struct device *slave = dwc->chan.slave; in idma32_get_slave_devfn()
43 return to_pci_dev(slave)->devfn; in idma32_get_slave_devfn()
48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar()
58 value |= dwc->chan.chan_id; in idma32_initialize_chan_xbar()
63 value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
69 switch (dwc->direction) { in idma32_initialize_chan_xbar()
80 * Memory-to-Memory and Device-to-Device are ignored for now. in idma32_initialize_chan_xbar()
82 * For Memory-to-Memory transfers we would need to set mode in idma32_initialize_chan_xbar()
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/linux-6.15/drivers/gpu/drm/i915/display/
Dintel_hdmi.c3 * Copyright © 2006-2009 Intel Corporation
44 #include <media/cec-notifier.h>
76 drm_WARN(display->drm, in assert_hdmi_port_disabled()
77 intel_de_read(display, intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled()
85 drm_WARN(display->drm, in assert_hdmi_transcoder_func_disabled()
219 drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE), in g4x_write_infoframe()
270 if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(encoder->port)) in g4x_infoframes_enabled()
284 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_write_infoframe()
285 i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe); in ibx_write_infoframe()
289 drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE), in ibx_write_infoframe()
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Dintel_vdsc.c1 // SPDX-License-Identifier: MIT
26 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support()
50 drm_WARN_ON(display->drm, crtc->pipe == PIPE_A); in is_pipe_dsc()
59 int bpc = vdsc_cfg->bits_per_component; in intel_vdsc_set_min_max_qp()
62 vdsc_cfg->rc_range_params[buf].range_min_qp = in intel_vdsc_set_min_max_qp()
63 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
64 vdsc_cfg->rc_range_params[buf].range_max_qp = in intel_vdsc_set_min_max_qp()
65 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
71 return offset_low + DIV_ROUND_UP((offset_high - offset_low) * (bpp - bpp_low), in get_range_bpg_offset()
72 (bpp_low - bpp_high)); in get_range_bpg_offset()
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/linux-6.15/arch/arm64/boot/dts/freescale/
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn20/
Ddcn20_stream_encoder.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
36 enc1->base.ctx->logger
39 (enc1->regs->reg)
43 enc1->se_shift->field_name, enc1->se_mask->field_name
47 enc1->base.ctx
55 uint32_t cont, send, line; in enc2_update_hdmi_info_packet() local
57 if (info_packet->valid) { in enc2_update_hdmi_info_packet()
63 /* enable transmission of packet(s) - in enc2_update_hdmi_info_packet()
68 /* select line number to send packets on */ in enc2_update_hdmi_info_packet()
69 line = 2; in enc2_update_hdmi_info_packet()
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/linux-6.15/drivers/gpu/drm/i915/gt/
Dintel_engine_cs.c1 // SPDX-License-Identifier: MIT
40 * on HSW) - so the final size, including the extra state required for the
260 * intel_engine_context_size() - return the size of the context for an engine
275 struct intel_uncore *uncore = gt->uncore; in intel_engine_context_size()
284 switch (GRAPHICS_VER(gt->i915)) { in intel_engine_context_size()
286 MISSING_CASE(GRAPHICS_VER(gt->i915)); in intel_engine_context_size()
296 if (IS_HASWELL(gt->i915)) in intel_engine_context_size()
320 GRAPHICS_VER(gt->i915), cxt_size * 64, in intel_engine_context_size()
321 cxt_size - 1); in intel_engine_context_size()
337 if (GRAPHICS_VER(gt->i915) < 8) in intel_engine_context_size()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
96 dc->ctx->logger
101 #define UNABLE_TO_SPLIT -1
233 init_data->num_virtual_links, dc); in dc_create_resource_pool()
237 init_data->num_virtual_links, dc); in dc_create_resource_pool()
241 init_data->num_virtual_links, dc); in dc_create_resource_pool()
246 init_data->num_virtual_links, dc); in dc_create_resource_pool()
250 init_data->num_virtual_links, dc); in dc_create_resource_pool()
254 init_data->num_virtual_links, dc); in dc_create_resource_pool()
258 init_data->num_virtual_links, dc); in dc_create_resource_pool()
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/linux-6.15/include/uapi/drm/
Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
45 * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
46 * track of these events, and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
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/linux-6.15/tools/include/uapi/drm/
Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
45 * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
46 * track of these events, and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
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/linux-6.15/drivers/net/ethernet/myricom/myri10ge/
Dmyri10ge.c2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2011 Myricom, Inc.
34 * http://www.myri.com/scs/download-Myri10GE.html
49 #include <linux/dma-mapping.h>
78 #define MYRI10GE_VERSION_STR "1.5.3-1.534"
135 int mask; /* number of rx slots -1 */
146 int mask; /* number of transmit slots -1 */
274 {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
277 MODULE_PARM_DESC(myri10ge_fw_names, "Firmware image names per board");
281 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
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/linux-6.15/block/
Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 #include "blk-cgroup-rwstat.h"
29 * Soft real-time applications are extremely more latency sensitive
30 * than interactive ones. Over-raise the weight of the former to
38 * per-actuator data. The current value is hopefully a good upper
46 * struct bfq_service_tree - per ioprio_class service tree.
48 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
71 * struct bfq_sched_data - multi-class scheduler.
81 * queue requests are served according to B-WF2Q+.
86 * before the current in-service entity is expired, 2) the in-service
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn30/
Ddcn30_dio_stream_encoder.c34 enc1->base.ctx->logger
37 (enc1->regs->reg)
41 enc1->se_shift->field_name, enc1->se_mask->field_name
47 enc1->base.ctx
55 uint32_t cont, send, line; in enc3_update_hdmi_info_packet() local
57 if (info_packet->valid) { in enc3_update_hdmi_info_packet()
58 enc1->base.vpg->funcs->update_generic_info_packet( in enc3_update_hdmi_info_packet()
59 enc1->base.vpg, in enc3_update_hdmi_info_packet()
64 /* enable transmission of packet(s) - in enc3_update_hdmi_info_packet()
69 /* select line number to send packets on */ in enc3_update_hdmi_info_packet()
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