| /linux/drivers/pwm/ |
| H A D | Kconfig | 2 menuconfig PWM config
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
14 This framework provides a generic interface to PWM devices
16 to register and unregister a PWM chip, an abstraction of a PWM
17 controller, that supports one or more PWM devices. Client
18 drivers can request PWM devices and use the generic framework
21 This generic framework replaces the legacy PWM framework which
30 if PWM
33 bool "PWM lowlevel drivers additional checks and debug messages"
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| H A D | Makefile | 3 obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o
4 obj-$(CONFIG_PWM_ADP5585) += pwm-adp5585.o
5 obj-$(CONFIG_PWM_APPLE) += pwm-apple.o
6 obj-$(CONFIG_PWM_ARGON_FAN_HAT) += pwm-argon-fan-hat.o
7 obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o
8 obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o
9 obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o
10 obj-$(CONFIG_PWM_AXI_PWMGEN) += pwm-axi-pwmgen.o
11 obj-$(CONFIG_PWM_BCM2835) += pwm-bcm2835.o
12 obj-$(CONFIG_PWM_BCM_IPROC) += pwm-bcm-iproc.o
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| H A D | core.c | 9 #define DEFAULT_SYMBOL_NAMESPACE "PWM"
15 #include <linux/pwm.h>
24 #include <dt-bindings/pwm/pwm.h>
26 #include <uapi/linux/pwm.h>
29 #include <trace/events/pwm.h>
167 static int __pwm_round_waveform_tohw(struct pwm_chip *chip, struct pwm_device *pwm, in __pwm_round_waveform_tohw() argument
173 ret = ops->round_waveform_tohw(chip, pwm, wf, wfhw); in __pwm_round_waveform_tohw()
174 trace_pwm_round_waveform_tohw(pwm, wf, wfhw, ret); in __pwm_round_waveform_tohw()
179 static int __pwm_round_waveform_fromhw(struct pwm_chip *chip, struct pwm_device *pwm, in __pwm_round_waveform_fromhw() argument
185 ret = ops->round_waveform_fromhw(chip, pwm, wfhw, wf); in __pwm_round_waveform_fromhw()
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| H A D | pwm-twl.c | 12 #include <linux/pwm.h>
32 #define TWL4030_PWM_TOGGLE(pwm, x) ((x) << (pwm)) argument
46 #define TWL6030_PWM_TOGGLE(pwm, x) ((x) << (pwm * 3)) argument
59 static int twl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in twl_pwm_config() argument
75 * When on cycle == off cycle the PWM will be always on in twl_pwm_config()
82 base = pwm->hwpwm * 3; in twl_pwm_config()
88 dev_err(pwmchip_parent(chip), "%s: Failed to configure PWM\n", pwm->label); in twl_pwm_config()
93 static int twl4030_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) in twl4030_pwm_enable() argument
102 dev_err(pwmchip_parent(chip), "%s: Failed to read GPBR1\n", pwm->label); in twl4030_pwm_enable()
106 val |= TWL4030_PWM_TOGGLE(pwm->hwpwm, TWL4030_PWMXCLK_ENABLE); in twl4030_pwm_enable()
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| H A D | pwm-vt8500.c | 3 * drivers/pwm/pwm-vt8500.c
16 #include <linux/pwm.h>
28 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) argument
29 #define REG_SCALAR(pwm) (((pwm) << 4) + 0x04) argument
30 #define REG_PERIOD(pwm) (((pwm) << 4) + 0x08) argument
31 #define REG_DUTY(pwm) (((pwm) << 4) + 0x0C) argument
72 static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in vt8500_pwm_config() argument
108 writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm)); in vt8500_pwm_config()
109 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_SCALAR_UPDATE); in vt8500_pwm_config()
111 writel(pv, vt8500->base + REG_PERIOD(pwm->hwpwm)); in vt8500_pwm_config()
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| H A D | pwm-twl-led.c | 8 * This driver is a complete rewrite of the former pwm-twl6030.c authorded by:
31 #include <linux/pwm.h>
36 * This driver handles the PWM driven LED terminals of TWL4030 and TWL6030.
69 static int twl4030_pwmled_config(struct pwm_chip *chip, struct pwm_device *pwm, in twl4030_pwmled_config() argument
85 * When on cycle == off cycle the PWM will be always on in twl4030_pwmled_config()
92 base = pwm->hwpwm * 2 + TWL4030_PWMA_REG; in twl4030_pwmled_config()
98 dev_err(pwmchip_parent(chip), "%s: Failed to configure PWM\n", pwm->label); in twl4030_pwmled_config()
103 static int twl4030_pwmled_enable(struct pwm_chip *chip, struct pwm_device *pwm) in twl4030_pwmled_enable() argument
110 dev_err(pwmchip_parent(chip), "%s: Failed to read LEDEN\n", pwm->label); in twl4030_pwmled_enable()
114 val |= TWL4030_LED_TOGGLE(pwm->hwpwm, TWL4030_LED_PINS); in twl4030_pwmled_enable()
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| H A D | pwm-lpss.c | 3 * Intel Low Power Subsystem PWM controller driver
22 #include <linux/pwm.h>
25 #include "pwm-lpss.h"
27 #define PWM 0x00000000 macro
33 /* Size of each PWM register space if multiple */
75 static inline u32 pwm_lpss_read(const struct pwm_device *pwm) in pwm_lpss_read() argument
77 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip); in pwm_lpss_read()
79 return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM); in pwm_lpss_read()
82 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value) in pwm_lpss_write() argument
84 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip); in pwm_lpss_write()
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| H A D | pwm-mediatek.c | 18 #include <linux/pwm.h>
22 /* PWM registers and bits definitions */
45 * struct pwm_mediatek_chip - struct representing PWM chip
46 * @regs: base address of PWM chip
48 * @clk_main: the clock used by PWM core
49 * @clk_pwms: the clock used by each PWM channel
68 /* PWM IP Version 3.0.2 */
80 struct pwm_device *pwm) in pwm_mediatek_clk_enable() argument
93 ret = clk_prepare_enable(pc->clk_pwms[pwm->hwpwm]); in pwm_mediatek_clk_enable()
108 struct pwm_device *pwm) in pwm_mediatek_clk_disable() argument
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| /linux/drivers/clocksource/ |
| H A D | samsung_pwm_timer.c | 79 static struct samsung_pwm_clocksource pwm; variable
92 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
95 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
107 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
111 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
114 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
129 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_stop()
131 writel_relaxed(tcon, pwm.base + REG_TCON); in samsung_time_stop()
147 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_setup()
152 writel_relaxed(tcnt, pwm.base + REG_TCNTB(channel)); in samsung_time_setup()
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm-amlogic.yaml | 4 $id: http://devicetree.org/schemas/pwm/pwm-amlogic.yaml#
7 title: Amlogic PWM
16 - amlogic,meson8b-pwm
17 - amlogic,meson-gxbb-pwm
18 - amlogic,meson-gxbb-ao-pwm
19 - amlogic,meson-axg-ee-pwm
20 - amlogic,meson-axg-ao-pwm
21 - amlogic,meson-g12a-ee-pwm
22 - amlogic,meson-g12a-ao-pwm-ab
23 - amlogic,meson-g12a-ao-pwm-cd
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| H A D | pwm.txt | 1 Specifying PWM information for devices
4 1) PWM user nodes
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
18 An optional property "pwm-names" may contain a list of strings to label
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| H A D | pwm-samsung.yaml | 4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
7 title: Samsung SoC PWM timers
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16 PWM timer block provides 5 PWM channels (not all of them can drive physical
25 - samsung,s3c2410-pwm # 16-bit, S3C24xx
26 - samsung,s3c6400-pwm # 32-bit, S3C64xx
27 - samsung,s5p6440-pwm # 32-bit, S5P64x0
28 - samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
29 - samsung,exynos4210-pwm # 32-bit, Exynos
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| H A D | renesas,pwm-rcar.yaml | 4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
7 title: Renesas R-Car PWM Timer Controller
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
19 - renesas,pwm-r8a7745 # RZ/G1E
20 - renesas,pwm-r8a77470 # RZ/G1C
21 - renesas,pwm-r8a774a1 # RZ/G2M
22 - renesas,pwm-r8a774b1 # RZ/G2N
23 - renesas,pwm-r8a774c0 # RZ/G2E
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| H A D | imx-pwm.yaml | 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
7 title: Freescale i.MX PWM controller
13 - $ref: pwm.yaml#
16 "#pwm-cells":
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
25 - fsl,imx1-pwm
26 - fsl,imx27-pwm
29 - fsl,imx25-pwm
30 - fsl,imx31-pwm
31 - fsl,imx50-pwm
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| H A D | pwm-rockchip.yaml | 4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
7 title: Rockchip PWM controller
15 - const: rockchip,rk2928-pwm
16 - const: rockchip,rk3288-pwm
17 - const: rockchip,rk3328-pwm
18 - const: rockchip,vop-pwm
20 - const: rockchip,rk3036-pwm
21 - const: rockchip,rk2928-pwm
24 - rockchip,rk3128-pwm
25 - rockchip,rk3368-pwm
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| H A D | allwinner,sun4i-a10-pwm.yaml | 4 $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
7 title: Allwinner A10 PWM
14 "#pwm-cells":
19 - const: allwinner,sun4i-a10-pwm
20 - const: allwinner,sun5i-a10s-pwm
21 - const: allwinner,sun5i-a13-pwm
22 - const: allwinner,sun7i-a20-pwm
23 - const: allwinner,sun8i-h3-pwm
25 - const: allwinner,sun8i-a83t-pwm
26 - const: allwinner,sun8i-h3-pwm
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| H A D | nvidia,tegra20-pwm.yaml | 4 $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
17 - nvidia,tegra20-pwm
18 - nvidia,tegra186-pwm
22 - nvidia,tegra30-pwm
23 - nvidia,tegra114-pwm
24 - nvidia,tegra124-pwm
25 - nvidia,tegra132-pwm
26 - nvidia,tegra210-pwm
28 - nvidia,tegra20-pwm
31 - const: nvidia,tegra194-pwm
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| H A D | pwm-sifive.yaml | 5 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
8 title: SiFive PWM controller
14 Unlike most other PWM controllers, the SiFive PWM controller currently
15 only supports one period for all channels in the PWM. All PWMs need to
18 achievable period. PWM RTL that corresponds to the IP block version
21 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
24 - $ref: pwm.yaml#
30 - sifive,fu540-c000-pwm
31 - sifive,fu740-c000-pwm
34 Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
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| H A D | pwm-nexus-node.yaml | 4 $id: http://devicetree.org/schemas/pwm/pwm-nexus-node.yaml#
7 title: PWM Nexus node properties
24 '#pwm-cells': true
26 pwm-map:
29 pwm-map-mask:
32 pwm-map-pass-thru:
36 pwm-map: ['#pwm-cells']
37 pwm-map-mask: [ pwm-map ]
38 pwm-map-pass-thru: [ pwm-map ]
44 pwm1: pwm@100 {
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| H A D | mediatek,pwm-disp.yaml | 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
13 - $ref: pwm.yaml#
19 - mediatek,mt2701-disp-pwm
20 - mediatek,mt6595-disp-pwm
21 - mediatek,mt8173-disp-pwm
22 - mediatek,mt8183-disp-pwm
25 - mediatek,mt6795-disp-pwm
26 - mediatek,mt8167-disp-pwm
27 - const: mediatek,mt8173-disp-pwm
30 - mediatek,mt6893-disp-pwm
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| H A D | marvell,pxa-pwm.yaml | 4 $id: http://devicetree.org/schemas/pwm/marvell,pxa-pwm.yaml#
7 title: Marvell PXA PWM
13 - $ref: pwm.yaml#
18 const: spacemit,k1-pwm
21 "#pwm-cells":
25 "#pwm-cells":
34 - marvell,pxa250-pwm
35 - marvell,pxa270-pwm
36 - marvell,pxa168-pwm
37 - marvell,pxa910-pwm
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| H A D | atmel,at91sam-pwm.yaml | 5 $id: http://devicetree.org/schemas/pwm/atmel,at91sam-pwm.yaml#
8 title: Atmel/Microchip PWM controller
14 - $ref: pwm.yaml#
21 - atmel,at91sam9rl-pwm
22 - atmel,sama5d3-pwm
23 - atmel,sama5d2-pwm
24 - microchip,sam9x60-pwm
27 - microchip,sama7d65-pwm
28 - microchip,sama7g5-pwm
29 - const: atmel,sama5d2-pwm
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| /linux/Documentation/driver-api/ |
| H A D | pwm.rst | 2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
39 consumer name. pwm_put() is used to free the PWM device. Managed variants of
42 After being requested, a PWM has to be configured using::
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-pwm | 1 What: /sys/class/pwm/
6 The pwm/ class sub-directory belongs to the Generic PWM
7 Framework and provides a sysfs interface for using PWM
10 What: /sys/class/pwm/pwmchip<N>/
15 A /sys/class/pwm/pwmchipN directory is created for each
16 probed PWM controller/chip where N is the base of the
17 PWM chip.
19 What: /sys/class/pwm/pwmchip<N>/npwm
24 The number of PWM channels supported by the PWM chip.
26 What: /sys/class/pwm/pwmchip<N>/export
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| /linux/arch/loongarch/boot/dts/ |
| H A D | loongson-2k0500.dtsi | 172 pwm@1ff5c000 {
173 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
178 #pwm-cells = <3>;
182 pwm@1ff5c010 {
183 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
188 #pwm-cells = <3>;
192 pwm@1ff5c020 {
193 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
198 #pwm-cells = <3>;
202 pwm@1ff5c030 {
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