Searched full:cache (Results 1 – 15 of 15) sorted by relevance
/kvm-unit-tests/lib/arm/asm/ |
H A D | assembler.h | 15 * dcache_line_size - get the minimum D-cache line size from the CTR register 21 and \tmp, \tmp, #0xf // cache line size encoding 23 mov \reg, \reg, lsl \tmp // actual cache line size 27 * Macro to perform a data cache maintenance for the interval
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H A D | sysreg.h | 26 #define CR_RR (1 << 14) /* Round Robin cache replacement */
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/kvm-unit-tests/lib/arm64/asm/ |
H A D | assembler.h | 19 * raw_dcache_line_size - get the minimum D-cache line size on this CPU 24 ubfx \tmp, \tmp, #16, #4 // cache line size encoding 26 lsl \reg, \reg, \tmp // actual cache line size 30 * Macro to perform a data cache maintenance for the interval
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/kvm-unit-tests/arm/ |
H A D | unittests.cfg | 267 # Cache emulation tests 268 [cache] 269 file = cache.flat 271 groups = cache
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H A D | Makefile.arm64 | 63 tests += $(TEST_DIR)/cache.$(exe)
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/kvm-unit-tests/ |
H A D | .travis.yml | 3 cache: ccache
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H A D | .gitlab-ci.yml | 32 cache 92 cache
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/kvm-unit-tests/x86/ |
H A D | memory.c | 2 * Test for x86 cache and memory instructions
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H A D | cet.c | 102 /* Flush the paging cache. */ in main()
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H A D | debug.c | 435 * Generate a bus lock (via a locked access that splits cache lines) in bus_lock_test()
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H A D | pmu.c | 815 * a warm-up state to warm up the cache, it leads to the measured cycles in warm_up()
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/kvm-unit-tests/lib/ppc64/asm/ |
H A D | pgtable-hwdef.h | 48 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
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/kvm-unit-tests/lib/x86/ |
H A D | io.c | 118 * The kernel sets PTEs for an ioremap() with page cache disabled, in ioremap()
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/kvm-unit-tests/lib/powerpc/ |
H A D | setup.c | 81 "i-cache-line-size", NULL); in cpu_set() 87 "d-cache-line-size", NULL); in cpu_set()
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/kvm-unit-tests/powerpc/ |
H A D | cstart64.S | 85 /* copy a cache line size */
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