1b5f659beSAlexandru Elisei /* SPDX-License-Identifier: GPL-2.0 */ 2b5f659beSAlexandru Elisei /* 3b5f659beSAlexandru Elisei * Based on several files from Linux version v5.10: arch/arm/mm/proc-macros.S, 4b5f659beSAlexandru Elisei * arch/arm/mm/proc-v7.S. 5b5f659beSAlexandru Elisei */ 6b5f659beSAlexandru Elisei 7*0cc3a351SSean Christopherson #ifndef __ASSEMBLER__ 8b5f659beSAlexandru Elisei #error "Only include this from assembly code" 9b5f659beSAlexandru Elisei #endif 10b5f659beSAlexandru Elisei 1116f52ec9SCornelia Huck #ifndef _ASMARM_ASSEMBLER_H_ 1216f52ec9SCornelia Huck #define _ASMARM_ASSEMBLER_H_ 13b5f659beSAlexandru Elisei 14b5f659beSAlexandru Elisei /* 15b5f659beSAlexandru Elisei * dcache_line_size - get the minimum D-cache line size from the CTR register 16b5f659beSAlexandru Elisei * on ARMv7. 17b5f659beSAlexandru Elisei */ 18b5f659beSAlexandru Elisei .macro dcache_line_size, reg, tmp 19b5f659beSAlexandru Elisei mrc p15, 0, \tmp, c0, c0, 1 // read ctr 20b5f659beSAlexandru Elisei lsr \tmp, \tmp, #16 21b5f659beSAlexandru Elisei and \tmp, \tmp, #0xf // cache line size encoding 22b5f659beSAlexandru Elisei mov \reg, #4 // bytes per word 23b5f659beSAlexandru Elisei mov \reg, \reg, lsl \tmp // actual cache line size 24b5f659beSAlexandru Elisei .endm 25b5f659beSAlexandru Elisei 26b5f659beSAlexandru Elisei /* 27b5f659beSAlexandru Elisei * Macro to perform a data cache maintenance for the interval 28b5f659beSAlexandru Elisei * [addr, addr + size). 29b5f659beSAlexandru Elisei * 30b5f659beSAlexandru Elisei * op: operation to execute 31b5f659beSAlexandru Elisei * domain domain used in the dsb instruction 32b5f659beSAlexandru Elisei * addr: starting virtual address of the region 33b5f659beSAlexandru Elisei * size: size of the region 34b5f659beSAlexandru Elisei * Corrupts: addr, size, tmp1, tmp2 35b5f659beSAlexandru Elisei */ 36b5f659beSAlexandru Elisei .macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2 37b5f659beSAlexandru Elisei dcache_line_size \tmp1, \tmp2 38b5f659beSAlexandru Elisei add \size, \addr, \size 39b5f659beSAlexandru Elisei sub \tmp2, \tmp1, #1 40b5f659beSAlexandru Elisei bic \addr, \addr, \tmp2 41b5f659beSAlexandru Elisei 9998: 42b5f659beSAlexandru Elisei .ifc \op, dccimvac 43b5f659beSAlexandru Elisei mcr p15, 0, \addr, c7, c14, 1 44b5f659beSAlexandru Elisei .else 45b5f659beSAlexandru Elisei .err 46b5f659beSAlexandru Elisei .endif 47b5f659beSAlexandru Elisei add \addr, \addr, \tmp1 48b5f659beSAlexandru Elisei cmp \addr, \size 49b5f659beSAlexandru Elisei blo 9998b 50b5f659beSAlexandru Elisei dsb \domain 51b5f659beSAlexandru Elisei .endm 52b5f659beSAlexandru Elisei 5316f52ec9SCornelia Huck #endif /* _ASMARM_ASSEMBLER_H_ */ 54