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/qemu/hw/m68k/
H A Dbootinfo.h15 #define BOOTINFO0(base, id) \ argument
17 stw_be_p(base, id); \
18 base += 2; \
19 stw_be_p(base, sizeof(struct bi_record)); \
20 base += 2; \
23 #define BOOTINFO1(base, id, value) \ argument
25 stw_be_p(base, id); \
26 base += 2; \
27 stw_be_p(base, sizeof(struct bi_record) + 4); \
28 base += 2; \
[all …]
/qemu/disas/
H A Dalpha.c65 #define AXP_OPCODE_BASE 0x0001 /* Base architecture -- all cpus. */
255 The information for the base instruction set was compiled from the
638 #define BASE AXP_OPCODE_BASE macro
710 { "halt", SPCD(0x00,0x0000), BASE, ARG_NONE },
711 { "draina", SPCD(0x00,0x0002), BASE, ARG_NONE },
712 { "bpt", SPCD(0x00,0x0080), BASE, ARG_NONE },
713 { "bugchk", SPCD(0x00,0x0081), BASE, ARG_NONE },
714 { "callsys", SPCD(0x00,0x0083), BASE, ARG_NONE },
715 { "chmk", SPCD(0x00,0x0083), BASE, ARG_NONE },
716 { "imb", SPCD(0x00,0x0086), BASE, ARG_NONE },
[all …]
/qemu/tests/tcg/xtensa/
H A Dtest_mmu.S6 #define BASE 0x20000000 macro
35 movi a2, BASE | XCHAL_SPANNING_WAY
48 movi a3, BASE + 0x01200004 /* VPN */
54 movi a3, BASE + 0x01000001
63 movi a3, BASE + 0x01234567
66 movi a3, BASE + 0x01234014
68 movi a3, BASE + 0x0123400c
73 movi a3, BASE + 0x01234567
87 movi a3, BASE + 0x00100000
101 movi a3, BASE + 0x00100000
[all …]
/qemu/tests/qtest/
H A Daspeed-hace-utils.c156 static void write_regs(QTestState *s, uint32_t base, uint64_t src, in write_regs() argument
159 qtest_writel(s, base + HACE_HASH_SRC, extract64(src, 0, 32)); in write_regs()
160 qtest_writel(s, base + HACE_HASH_SRC_HI, extract64(src, 32, 32)); in write_regs()
161 qtest_writel(s, base + HACE_HASH_DIGEST, extract64(out, 0, 32)); in write_regs()
162 qtest_writel(s, base + HACE_HASH_DIGEST_HI, extract64(out, 32, 32)); in write_regs()
163 qtest_writel(s, base + HACE_HASH_DATA_LEN, length); in write_regs()
164 qtest_writel(s, base + HACE_HASH_CMD, HACE_SHA_BE_EN | method); in write_regs()
167 void aspeed_test_md5(const char *machine, const uint32_t base, in aspeed_test_md5() argument
177 g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); in aspeed_test_md5()
182 write_regs(s, base, src_addr, sizeof(test_vector), in aspeed_test_md5()
[all …]
/qemu/tests/qemu-iotests/
H A D17952 TEST_IMG="$TEST_IMG.base" _make_test_img 64M
53 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
60 $QEMU_IO -c "write -z -u 2M 2M" "$TEST_IMG.base" | _filter_qemu_io
61 $QEMU_IO -c "write -z 6M 2M" "$TEST_IMG.base" | _filter_qemu_io
62 $QEMU_IO -c "map" "$TEST_IMG.base" | _filter_qemu_io
63 $QEMU_IMG map --output=json "$TEST_IMG.base" | _filter_qemu_img_map
67 $QEMU_IO -c "write -z -u 10485761 2097150" "$TEST_IMG.base" | _filter_qemu_io
68 $QEMU_IO -c "write -z 14680065 2097150" "$TEST_IMG.base" | _filter_qemu_io
69 $QEMU_IO -c "map" "$TEST_IMG.base" | _filter_qemu_io
70 $QEMU_IMG map --output=json "$TEST_IMG.base" | _filter_qemu_img_map
[all …]
H A D043.out7 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.base backi…
12 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.1.base bac…
13 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.2.base bac…
14 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.3.base bac…
17 qemu-img: Backing file 'TEST_DIR/t.IMGFMT.2.base' creates an infinite loop.
19 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.1.base bac…
20 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/t.IMGFMT.2.base bac…
27 backing file: TEST_DIR/t.IMGFMT.2.base
29 image: TEST_DIR/t.IMGFMT.2.base
33 backing file: TEST_DIR/t.IMGFMT.1.base
[all …]
H A D04333 for img in "$TEST_IMG".[123].base; do
57 mv "$TEST_IMG" "$TEST_IMG.base"
58 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT $size
59 $QEMU_IMG rebase -u -b "$TEST_IMG" -F $IMGFMT "$TEST_IMG.base"
66 mv "$TEST_IMG" "$TEST_IMG.1.base"
67 _make_test_img -b "$TEST_IMG.1.base" -F $IMGFMT $size
68 mv "$TEST_IMG" "$TEST_IMG.2.base"
69 _make_test_img -b "$TEST_IMG.2.base" -F $IMGFMT $size
70 mv "$TEST_IMG" "$TEST_IMG.3.base"
71 _make_test_img -b "$TEST_IMG.3.base" -F $IMGFMT $size
[all …]
H A D02854 # formats that use clusters. This will ensure that the base image doesn't end
58 # The base image is smaller than the image file
64 TEST_IMG="$TEST_IMG.base"
68 echo "Filling base image"
71 # Fill end of base image with a pattern, skipping every other sector
80 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT $image_size
85 # Write every other sector around where the base image ends
93 # Base image sectors
99 # Zero sectors beyond end of base image
104 # Rebase it on top of its base image
[all …]
H A D15453 CLUSTER_SIZE=512 TEST_IMG="$TEST_IMG.base" _make_test_img $size
54 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
77 CLUSTER_SIZE=512 TEST_IMG="$TEST_IMG.base" _make_test_img $size
78 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
82 $QEMU_IO -c "write -P 0x11 32k 1k" "$TEST_IMG.base" | _filter_qemu_io
89 $QEMU_IO -c "write -P 0x11 65k 1k" "$TEST_IMG.base" | _filter_qemu_io
100 CLUSTER_SIZE=512 TEST_IMG="$TEST_IMG.base" _make_test_img $size
101 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
105 $QEMU_IO -c "write -P 0x11 34k 1k" "$TEST_IMG.base" | _filter_qemu_io
113 $QEMU_IO -c "write -P 0x11 43k 1k" "$TEST_IMG.base" | _filter_qemu_io
[all …]
H A D191.out5 Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=67108864
6 Formatting 'TEST_DIR/t.IMGFMT.mid', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t.IMGFMT.base ba…
22 'base':'TEST_DIR/t.IMGFMT.base',
109 === Check that both top and top2 point to base now ===
121 "filename": "TEST_DIR/t.IMGFMT.base",
133 "full-backing-filename": "TEST_DIR/t.IMGFMT.base",
134 "backing-filename": "TEST_DIR/t.IMGFMT.base",
145 "backing_file": "TEST_DIR/t.IMGFMT.base",
192 "filename": "TEST_DIR/t.IMGFMT.base",
204 "full-backing-filename": "TEST_DIR/t.IMGFMT.base",
[all …]
H A D30147 TEST_IMG="$TEST_IMG.base" _make_test_img $size
48 _make_test_img -b "$TEST_IMG.base" $size
49 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT $size
55 _make_test_img -b "$TEST_IMG.base" -F vmdk
56 _make_test_img -b "$TEST_IMG.base" -F vmdk $size
59 _make_test_img -u -b "$TEST_IMG.base" -F vmdk
60 _make_test_img -u -b "$TEST_IMG.base" -F vmdk $size
63 _make_test_img -b "$TEST_IMG.base" -F garbage $size
64 _make_test_img -u -b "$TEST_IMG.base" -F garbage $size
70 rm "$TEST_IMG.base"
[all …]
H A D27434 iotests.qemu_img_create('-f', iotests.imgfmt, base, str(size_long))
35 iotests.qemu_img_create('-f', iotests.imgfmt, '-b', base,
40 iotests.qemu_io_log('-c', 'write -P 1 0 %d' % size_long, base)
44 vm.add_blockdev('file,filename=%s,node-name=base-file' % base)
45 vm.add_blockdev('%s,file=base-file,node-name=base' % iotests.imgfmt)
47 vm.add_blockdev('%s,file=mid-file,node-name=mid,backing=base'
52 with iotests.FilePath('base') as base, \
69 base)
81 iotests.qemu_img_log('map', '--output=json', base)
82 iotests.qemu_img_log('map', '--output=human', base)
[all …]
/qemu/target/loongarch/
H A Dcpu_helper.c52 uint64_t base; in loongarch_page_table_walker() local
56 base = env->CSR_PGDH; in loongarch_page_table_walker()
58 base = env->CSR_PGDL; in loongarch_page_table_walker()
60 base &= TARGET_PHYS_MASK; in loongarch_page_table_walker()
71 phys = base | index << 3; in loongarch_page_table_walker()
72 base = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK; in loongarch_page_table_walker()
73 if (FIELD_EX64(base, TLBENTRY, HUGE)) { in loongarch_page_table_walker()
74 /* base is a huge pte */ in loongarch_page_table_walker()
80 if (FIELD_EX64(base, TLBENTRY, HUGE)) { in loongarch_page_table_walker()
81 /* Huge Page. base is pte */ in loongarch_page_table_walker()
[all …]
/qemu/hw/tricore/
H A Dtc27x_soc.c68 * the memory map at @base.
71 hwaddr base, hwaddr size) in make_rom() argument
74 memory_region_add_subregion(get_system_memory(), base, mr); in make_rom()
79 * the memory map at @base.
82 hwaddr base, hwaddr size) in make_ram() argument
85 memory_region_add_subregion(get_system_memory(), base, mr); in make_ram()
90 * located at @base in the memory map.
93 MemoryRegion *orig, hwaddr base) in make_alias() argument
97 memory_region_add_subregion(get_system_memory(), base, mr); in make_alias()
106 sc->memmap[TC27XD_DSPR0].base, sc->memmap[TC27XD_DSPR0].size); in tc27x_soc_init_memory_mapping()
[all …]
/qemu/target/loongarch/tcg/
H A Dtranslate.c97 tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); in generate_exception()
99 ctx->base.is_jmp = DISAS_NORETURN; in generate_exception()
108 if (translator_use_goto_tb(&ctx->base, dest)) { in gen_goto_tb()
111 tcg_gen_exit_tb(ctx->base.tb, n); in gen_goto_tb()
123 DisasContext *ctx = container_of(dcbase, DisasContext, base); in loongarch_tr_init_disas_context()
125 ctx->page_start = ctx->base.pc_first & TARGET_PAGE_MASK; in loongarch_tr_init_disas_context()
126 ctx->plv = ctx->base.tb->flags & HW_FLAGS_PLV_MASK; in loongarch_tr_init_disas_context()
127 if (ctx->base.tb->flags & HW_FLAGS_CRMD_PG) { in loongarch_tr_init_disas_context()
134 bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; in loongarch_tr_init_disas_context()
135 ctx->base.max_insns = MIN(ctx->base.max_insns, bound); in loongarch_tr_init_disas_context()
[all …]
/qemu/tcg/tci/
H A Dtcg-target.c.inc111 static void stack_bounds_check(TCGReg base, intptr_t offset)
113 if (base == TCG_REG_CALL_STACK) {
306 TCGReg base, intptr_t offset)
308 stack_bounds_check(base, offset);
311 tcg_out_op_rrr(s, INDEX_op_add, TCG_REG_TMP, TCG_REG_TMP, base);
312 base = TCG_REG_TMP;
315 tcg_out_op_rrs(s, op, val, base, offset);
318 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg base,
326 tcg_out_ldst(s, op, val, base, offset);
369 .base.static_constraint = C_O1_I1(r, r),
[all …]
/qemu/qobject/
H A Dqobject.c20 offsetof(QNull, base) != 0 ||
21 offsetof(QNum, base) != 0 ||
22 offsetof(QString, base) != 0 ||
23 offsetof(QDict, base) != 0 ||
24 offsetof(QList, base) != 0 ||
25 offsetof(QBool, base) != 0,
26 "base qobject must be at offset 0");
40 assert(!obj->base.refcnt); in qobject_destroy()
41 assert(QTYPE_QNULL < obj->base.type && obj->base.type < QTYPE__MAX); in qobject_destroy()
42 qdestroy[obj->base.type](obj); in qobject_destroy()
[all …]
/qemu/tests/qemu-iotests/tests/
H A Dremove-bitmap-from-backing27 top, base = iotests.file_path('top', 'base') variable
30 qemu_img_create('-f', iotests.imgfmt, base, size)
31 qemu_img_create('-f', iotests.imgfmt, '-b', base,
34 qemu_img('bitmap', '--add', base, 'bitmap0')
36 assert 'bitmaps' in qemu_img_info(base)['format-specific']['data']
38 vm = iotests.VM().add_drive(top, 'backing.node-name=base')
41 log('Trying to remove persistent bitmap from r-o base node, should fail:')
42 vm.qmp_log('block-dirty-bitmap-remove', node='base', name='bitmap0')
46 'node-name': 'base',
50 'filename': base
[all …]
/qemu/hw/riscv/
H A Dopentitan.c100 memmap[IBEX_DEV_RAM].base, machine->ram); in opentitan_machine_init()
103 hwaddr firmware_load_addr = memmap[IBEX_DEV_RAM].base; in opentitan_machine_init()
110 memmap[IBEX_DEV_RAM].base, in opentitan_machine_init()
167 memmap[IBEX_DEV_ROM].base, &s->rom); in lowrisc_ibex_soc_realize()
175 memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, in lowrisc_ibex_soc_realize()
177 memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH_VIRTUAL].base, in lowrisc_ibex_soc_realize()
184 qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000); in lowrisc_ibex_soc_realize()
185 qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000); in lowrisc_ibex_soc_realize()
187 qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x200000); in lowrisc_ibex_soc_realize()
194 sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].base); in lowrisc_ibex_soc_realize()
[all …]
H A Dmicrochip_pfsoc.c155 qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); in microchip_pfsoc_soc_instance_init()
166 qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); in microchip_pfsoc_soc_instance_init()
221 memmap[MICROCHIP_PFSOC_RSVD0].base, in microchip_pfsoc_soc_realize()
228 memmap[MICROCHIP_PFSOC_E51_DTIM].base, in microchip_pfsoc_soc_realize()
233 memmap[MICROCHIP_PFSOC_BUSERR_UNIT0].base, in microchip_pfsoc_soc_realize()
236 memmap[MICROCHIP_PFSOC_BUSERR_UNIT1].base, in microchip_pfsoc_soc_realize()
239 memmap[MICROCHIP_PFSOC_BUSERR_UNIT2].base, in microchip_pfsoc_soc_realize()
242 memmap[MICROCHIP_PFSOC_BUSERR_UNIT3].base, in microchip_pfsoc_soc_realize()
245 memmap[MICROCHIP_PFSOC_BUSERR_UNIT4].base, in microchip_pfsoc_soc_realize()
249 riscv_aclint_swi_create(memmap[MICROCHIP_PFSOC_CLINT].base, in microchip_pfsoc_soc_realize()
[all …]
/qemu/crypto/
H A Dcipher-nettle.c.inc70 TYPE *ctx = container_of(cipher, TYPE, base); \
84 TYPE *ctx = container_of(cipher, TYPE, base); \
94 TYPE *ctx = container_of(cipher, TYPE, base); \
113 TYPE *ctx = container_of(cipher, TYPE, base); \
123 TYPE *ctx = container_of(cipher, TYPE, base); \
142 TYPE *ctx = container_of(cipher, TYPE, base); \
172 TYPE *ctx = container_of(cipher, TYPE, base); \
184 TYPE *ctx = container_of(cipher, TYPE, base); \
198 TYPE *ctx = container_of(cipher, TYPE, base); \
209 TYPE *ctx = container_of(cipher, TYPE, base); \
[all …]
/qemu/hw/xen/
H A Dxen-pvh-common.c41 block_len = s->cfg.ram_low.base + ram_size[0]; in xen_pvh_init_ram()
45 block_len = s->cfg.ram_high.base + ram_size[1]; in xen_pvh_init_ram()
52 s->cfg.ram_low.base, ram_size[0]); in xen_pvh_init_ram()
53 memory_region_add_subregion(sysmem, s->cfg.ram_low.base, &s->ram.low); in xen_pvh_init_ram()
56 s->cfg.ram_high.base, ram_size[1]); in xen_pvh_init_ram()
57 memory_region_add_subregion(sysmem, s->cfg.ram_high.base, &s->ram.high); in xen_pvh_init_ram()
80 * create a list of virtio-mmio buses with increasing base addresses. in xen_create_virtio_mmio_devices()
89 hwaddr base = s->cfg.virtio_mmio.base + i * s->cfg.virtio_mmio.size; in xen_create_virtio_mmio_devices() local
93 sysbus_create_simple("virtio-mmio", base, irq); in xen_create_virtio_mmio_devices()
97 base); in xen_create_virtio_mmio_devices()
[all …]
/qemu/block/
H A Dcommit.c40 BlockBackend *base; member
59 /* Remove base node parent that still uses BLK_PERM_WRITE/RESIZE before in commit_prepare()
61 blk_unref(s->base); in commit_prepare()
62 s->base = NULL; in commit_prepare()
87 if (s->base) { in commit_abort()
88 blk_unref(s->base); in commit_abort()
101 * something to base, the intermediate images aren't valid any more. */ in commit_abort()
120 /* restore base open flags here if appropriate (e.g., change the base back in commit_clean()
139 /* Copy if allocated above the base */ in commit_iteration()
155 * If the top (sub)clusters are smaller than the base in commit_iteration()
[all …]
/qemu/tcg/mips/
H A Dtcg-target.c.inc756 TCGReg base, intptr_t ofs)
759 tcg_out_st(s, type, TCG_REG_ZERO, base, ofs);
845 .base.static_constraint = C_O1_I2(r, r, rz),
869 .base.static_constraint = C_O1_I2(r, r, rz),
920 .base.static_constraint = C_O0_I2(r, rz),
970 .base.static_constraint = C_O1_I4(r, r, r, rz, rz),
991 .base.static_constraint = C_O0_I4(r, r, rz, rz),
1044 .base.static_constraint = (use_mips32r6_instructions
1147 TCGReg base;
1174 TCGReg base;
[all …]
/qemu/ui/
H A Dspice-input.c41 .base.type = SPICE_INTERFACE_KEYBOARD,
42 .base.description = "qemu keyboard",
43 .base.major_version = SPICE_INTERFACE_KEYBOARD_MAJOR,
44 .base.minor_version = SPICE_INTERFACE_KEYBOARD_MINOR,
161 .base.type = SPICE_INTERFACE_MOUSE,
162 .base.description = "mouse",
163 .base.major_version = SPICE_INTERFACE_MOUSE_MAJOR,
164 .base.minor_version = SPICE_INTERFACE_MOUSE_MINOR,
214 .base.type = SPICE_INTERFACE_TABLET,
215 .base.description = "tablet",
[all …]

12345678910>>...51