1258b2a40SEdgar E. Iglesias /*
2258b2a40SEdgar E. Iglesias * QEMU Xen PVH machine - common code.
3258b2a40SEdgar E. Iglesias *
4258b2a40SEdgar E. Iglesias * Copyright (c) 2024 Advanced Micro Devices, Inc.
5258b2a40SEdgar E. Iglesias *
6258b2a40SEdgar E. Iglesias * SPDX-License-Identifier: GPL-2.0-or-later
7258b2a40SEdgar E. Iglesias */
8258b2a40SEdgar E. Iglesias
9258b2a40SEdgar E. Iglesias #include "qemu/osdep.h"
10258b2a40SEdgar E. Iglesias #include "qemu/error-report.h"
114702dcd4SPhilippe Mathieu-Daudé #include "qemu/units.h"
12258b2a40SEdgar E. Iglesias #include "qapi/visitor.h"
13258b2a40SEdgar E. Iglesias #include "hw/boards.h"
14258b2a40SEdgar E. Iglesias #include "hw/irq.h"
1532cad1ffSPhilippe Mathieu-Daudé #include "system/tpm.h"
1632cad1ffSPhilippe Mathieu-Daudé #include "system/tpm_backend.h"
174702dcd4SPhilippe Mathieu-Daudé #include "system/runstate.h"
18258b2a40SEdgar E. Iglesias #include "hw/xen/xen-pvh-common.h"
19258b2a40SEdgar E. Iglesias #include "trace.h"
20258b2a40SEdgar E. Iglesias
21258b2a40SEdgar E. Iglesias static const MemoryListener xen_memory_listener = {
22258b2a40SEdgar E. Iglesias .region_add = xen_region_add,
23258b2a40SEdgar E. Iglesias .region_del = xen_region_del,
24258b2a40SEdgar E. Iglesias .log_start = NULL,
25258b2a40SEdgar E. Iglesias .log_stop = NULL,
26258b2a40SEdgar E. Iglesias .log_sync = NULL,
27258b2a40SEdgar E. Iglesias .log_global_start = NULL,
28258b2a40SEdgar E. Iglesias .log_global_stop = NULL,
29258b2a40SEdgar E. Iglesias .priority = MEMORY_LISTENER_PRIORITY_ACCEL,
30258b2a40SEdgar E. Iglesias };
31258b2a40SEdgar E. Iglesias
xen_pvh_init_ram(XenPVHMachineState * s,MemoryRegion * sysmem)32258b2a40SEdgar E. Iglesias static void xen_pvh_init_ram(XenPVHMachineState *s,
33258b2a40SEdgar E. Iglesias MemoryRegion *sysmem)
34258b2a40SEdgar E. Iglesias {
35258b2a40SEdgar E. Iglesias MachineState *ms = MACHINE(s);
36258b2a40SEdgar E. Iglesias ram_addr_t block_len, ram_size[2];
37258b2a40SEdgar E. Iglesias
38258b2a40SEdgar E. Iglesias if (ms->ram_size <= s->cfg.ram_low.size) {
39258b2a40SEdgar E. Iglesias ram_size[0] = ms->ram_size;
40258b2a40SEdgar E. Iglesias ram_size[1] = 0;
41258b2a40SEdgar E. Iglesias block_len = s->cfg.ram_low.base + ram_size[0];
42258b2a40SEdgar E. Iglesias } else {
43258b2a40SEdgar E. Iglesias ram_size[0] = s->cfg.ram_low.size;
44258b2a40SEdgar E. Iglesias ram_size[1] = ms->ram_size - s->cfg.ram_low.size;
45258b2a40SEdgar E. Iglesias block_len = s->cfg.ram_high.base + ram_size[1];
46258b2a40SEdgar E. Iglesias }
47258b2a40SEdgar E. Iglesias
48258b2a40SEdgar E. Iglesias memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
49258b2a40SEdgar E. Iglesias &error_fatal);
50258b2a40SEdgar E. Iglesias
51258b2a40SEdgar E. Iglesias memory_region_init_alias(&s->ram.low, NULL, "xen.ram.lo", &xen_memory,
52258b2a40SEdgar E. Iglesias s->cfg.ram_low.base, ram_size[0]);
53258b2a40SEdgar E. Iglesias memory_region_add_subregion(sysmem, s->cfg.ram_low.base, &s->ram.low);
54258b2a40SEdgar E. Iglesias if (ram_size[1] > 0) {
55258b2a40SEdgar E. Iglesias memory_region_init_alias(&s->ram.high, NULL, "xen.ram.hi", &xen_memory,
56258b2a40SEdgar E. Iglesias s->cfg.ram_high.base, ram_size[1]);
57258b2a40SEdgar E. Iglesias memory_region_add_subregion(sysmem, s->cfg.ram_high.base, &s->ram.high);
58258b2a40SEdgar E. Iglesias }
59258b2a40SEdgar E. Iglesias
60258b2a40SEdgar E. Iglesias /* Setup support for grants. */
61258b2a40SEdgar E. Iglesias memory_region_init_ram(&xen_grants, NULL, "xen.grants", block_len,
62258b2a40SEdgar E. Iglesias &error_fatal);
63258b2a40SEdgar E. Iglesias memory_region_add_subregion(sysmem, XEN_GRANT_ADDR_OFF, &xen_grants);
64258b2a40SEdgar E. Iglesias }
65258b2a40SEdgar E. Iglesias
xen_set_irq(void * opaque,int irq,int level)66258b2a40SEdgar E. Iglesias static void xen_set_irq(void *opaque, int irq, int level)
67258b2a40SEdgar E. Iglesias {
68258b2a40SEdgar E. Iglesias if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) {
69258b2a40SEdgar E. Iglesias error_report("xendevicemodel_set_irq_level failed");
70258b2a40SEdgar E. Iglesias }
71258b2a40SEdgar E. Iglesias }
72258b2a40SEdgar E. Iglesias
xen_create_virtio_mmio_devices(XenPVHMachineState * s)73258b2a40SEdgar E. Iglesias static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
74258b2a40SEdgar E. Iglesias {
75258b2a40SEdgar E. Iglesias int i;
76258b2a40SEdgar E. Iglesias
77692ec933SEdgar E. Iglesias /*
78692ec933SEdgar E. Iglesias * We create the transports in reverse order. Since qbus_realize()
79692ec933SEdgar E. Iglesias * prepends (not appends) new child buses, the decrementing loop below will
80692ec933SEdgar E. Iglesias * create a list of virtio-mmio buses with increasing base addresses.
81692ec933SEdgar E. Iglesias *
82692ec933SEdgar E. Iglesias * When a -device option is processed from the command line,
83692ec933SEdgar E. Iglesias * qbus_find_recursive() picks the next free virtio-mmio bus in forwards
84692ec933SEdgar E. Iglesias * order.
85692ec933SEdgar E. Iglesias *
86692ec933SEdgar E. Iglesias * This is what the Xen tools expect.
87692ec933SEdgar E. Iglesias */
88692ec933SEdgar E. Iglesias for (i = s->cfg.virtio_mmio_num - 1; i >= 0; i--) {
89258b2a40SEdgar E. Iglesias hwaddr base = s->cfg.virtio_mmio.base + i * s->cfg.virtio_mmio.size;
90258b2a40SEdgar E. Iglesias qemu_irq irq = qemu_allocate_irq(xen_set_irq, NULL,
91258b2a40SEdgar E. Iglesias s->cfg.virtio_mmio_irq_base + i);
92258b2a40SEdgar E. Iglesias
93258b2a40SEdgar E. Iglesias sysbus_create_simple("virtio-mmio", base, irq);
94258b2a40SEdgar E. Iglesias
95258b2a40SEdgar E. Iglesias trace_xen_create_virtio_mmio_devices(i,
96258b2a40SEdgar E. Iglesias s->cfg.virtio_mmio_irq_base + i,
97258b2a40SEdgar E. Iglesias base);
98258b2a40SEdgar E. Iglesias }
99258b2a40SEdgar E. Iglesias }
100258b2a40SEdgar E. Iglesias
101258b2a40SEdgar E. Iglesias #ifdef CONFIG_TPM
xen_enable_tpm(XenPVHMachineState * s)102258b2a40SEdgar E. Iglesias static void xen_enable_tpm(XenPVHMachineState *s)
103258b2a40SEdgar E. Iglesias {
104258b2a40SEdgar E. Iglesias Error *errp = NULL;
105258b2a40SEdgar E. Iglesias DeviceState *dev;
106258b2a40SEdgar E. Iglesias SysBusDevice *busdev;
107258b2a40SEdgar E. Iglesias
108258b2a40SEdgar E. Iglesias TPMBackend *be = qemu_find_tpm_be("tpm0");
109258b2a40SEdgar E. Iglesias if (be == NULL) {
110258b2a40SEdgar E. Iglesias error_report("Couldn't find tmp0 backend");
111258b2a40SEdgar E. Iglesias return;
112258b2a40SEdgar E. Iglesias }
113258b2a40SEdgar E. Iglesias dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
114258b2a40SEdgar E. Iglesias object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
115258b2a40SEdgar E. Iglesias object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
116258b2a40SEdgar E. Iglesias busdev = SYS_BUS_DEVICE(dev);
117258b2a40SEdgar E. Iglesias sysbus_realize_and_unref(busdev, &error_fatal);
118258b2a40SEdgar E. Iglesias sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);
119258b2a40SEdgar E. Iglesias
120258b2a40SEdgar E. Iglesias trace_xen_enable_tpm(s->cfg.tpm.base);
121258b2a40SEdgar E. Iglesias }
122258b2a40SEdgar E. Iglesias #endif
123258b2a40SEdgar E. Iglesias
124f22e598aSEdgar E. Iglesias /*
125f22e598aSEdgar E. Iglesias * We use the GPEX PCIe controller with its internal INTX PCI interrupt
126f22e598aSEdgar E. Iglesias * swizzling. This swizzling is emulated in QEMU and routes all INTX
127f22e598aSEdgar E. Iglesias * interrupts from endpoints down to only 4 INTX interrupts.
128f22e598aSEdgar E. Iglesias * See include/hw/pci/pci.h : pci_swizzle()
129f22e598aSEdgar E. Iglesias */
xenpvh_gpex_init(XenPVHMachineState * s,XenPVHMachineClass * xpc,MemoryRegion * sysmem)130f22e598aSEdgar E. Iglesias static inline void xenpvh_gpex_init(XenPVHMachineState *s,
131f22e598aSEdgar E. Iglesias XenPVHMachineClass *xpc,
132f22e598aSEdgar E. Iglesias MemoryRegion *sysmem)
133f22e598aSEdgar E. Iglesias {
134f22e598aSEdgar E. Iglesias MemoryRegion *ecam_reg;
135f22e598aSEdgar E. Iglesias MemoryRegion *mmio_reg;
136f22e598aSEdgar E. Iglesias DeviceState *dev;
137f22e598aSEdgar E. Iglesias int i;
138f22e598aSEdgar E. Iglesias
139f22e598aSEdgar E. Iglesias object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex,
140f22e598aSEdgar E. Iglesias TYPE_GPEX_HOST);
141f22e598aSEdgar E. Iglesias dev = DEVICE(&s->pci.gpex);
142f22e598aSEdgar E. Iglesias sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
143f22e598aSEdgar E. Iglesias
144f22e598aSEdgar E. Iglesias ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
145f22e598aSEdgar E. Iglesias memory_region_add_subregion(sysmem, s->cfg.pci_ecam.base, ecam_reg);
146f22e598aSEdgar E. Iglesias
147f22e598aSEdgar E. Iglesias mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
148f22e598aSEdgar E. Iglesias
149f22e598aSEdgar E. Iglesias if (s->cfg.pci_mmio.size) {
150f22e598aSEdgar E. Iglesias memory_region_init_alias(&s->pci.mmio_alias, OBJECT(dev), "pcie-mmio",
151f22e598aSEdgar E. Iglesias mmio_reg,
152f22e598aSEdgar E. Iglesias s->cfg.pci_mmio.base, s->cfg.pci_mmio.size);
153f22e598aSEdgar E. Iglesias memory_region_add_subregion(sysmem, s->cfg.pci_mmio.base,
154f22e598aSEdgar E. Iglesias &s->pci.mmio_alias);
155f22e598aSEdgar E. Iglesias }
156f22e598aSEdgar E. Iglesias
157f22e598aSEdgar E. Iglesias if (s->cfg.pci_mmio_high.size) {
158f22e598aSEdgar E. Iglesias memory_region_init_alias(&s->pci.mmio_high_alias, OBJECT(dev),
159f22e598aSEdgar E. Iglesias "pcie-mmio-high",
160f22e598aSEdgar E. Iglesias mmio_reg, s->cfg.pci_mmio_high.base, s->cfg.pci_mmio_high.size);
161f22e598aSEdgar E. Iglesias memory_region_add_subregion(sysmem, s->cfg.pci_mmio_high.base,
162f22e598aSEdgar E. Iglesias &s->pci.mmio_high_alias);
163f22e598aSEdgar E. Iglesias }
164f22e598aSEdgar E. Iglesias
165f22e598aSEdgar E. Iglesias /*
166f22e598aSEdgar E. Iglesias * PVH implementations with PCI enabled must provide set_pci_intx_irq()
167f22e598aSEdgar E. Iglesias * and optionally an implementation of set_pci_link_route().
168f22e598aSEdgar E. Iglesias */
169f22e598aSEdgar E. Iglesias assert(xpc->set_pci_intx_irq);
170f22e598aSEdgar E. Iglesias
171ff871d04SAlexander Graf for (i = 0; i < PCI_NUM_PINS; i++) {
172f22e598aSEdgar E. Iglesias qemu_irq irq = qemu_allocate_irq(xpc->set_pci_intx_irq, s, i);
173f22e598aSEdgar E. Iglesias
174f22e598aSEdgar E. Iglesias sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
175f22e598aSEdgar E. Iglesias gpex_set_irq_num(GPEX_HOST(dev), i, s->cfg.pci_intx_irq_base + i);
176f22e598aSEdgar E. Iglesias if (xpc->set_pci_link_route) {
177f22e598aSEdgar E. Iglesias xpc->set_pci_link_route(i, s->cfg.pci_intx_irq_base + i);
178f22e598aSEdgar E. Iglesias }
179f22e598aSEdgar E. Iglesias }
180f22e598aSEdgar E. Iglesias }
181f22e598aSEdgar E. Iglesias
xen_pvh_init(MachineState * ms)182258b2a40SEdgar E. Iglesias static void xen_pvh_init(MachineState *ms)
183258b2a40SEdgar E. Iglesias {
184258b2a40SEdgar E. Iglesias XenPVHMachineState *s = XEN_PVH_MACHINE(ms);
185258b2a40SEdgar E. Iglesias XenPVHMachineClass *xpc = XEN_PVH_MACHINE_GET_CLASS(s);
186258b2a40SEdgar E. Iglesias MemoryRegion *sysmem = get_system_memory();
187258b2a40SEdgar E. Iglesias
188258b2a40SEdgar E. Iglesias if (ms->ram_size == 0) {
189258b2a40SEdgar E. Iglesias warn_report("%s: ram size not specified. QEMU machine started"
190258b2a40SEdgar E. Iglesias " without IOREQ (no emulated devices including virtio)",
191258b2a40SEdgar E. Iglesias MACHINE_CLASS(object_get_class(OBJECT(ms)))->desc);
192258b2a40SEdgar E. Iglesias return;
193258b2a40SEdgar E. Iglesias }
194258b2a40SEdgar E. Iglesias
195258b2a40SEdgar E. Iglesias xen_pvh_init_ram(s, sysmem);
196b2150e40SEdgar E. Iglesias xen_register_ioreq(&s->ioreq, ms->smp.max_cpus,
197cb988a10SEdgar E. Iglesias xpc->handle_bufioreq,
198b2150e40SEdgar E. Iglesias &xen_memory_listener);
199258b2a40SEdgar E. Iglesias
200258b2a40SEdgar E. Iglesias if (s->cfg.virtio_mmio_num) {
201258b2a40SEdgar E. Iglesias xen_create_virtio_mmio_devices(s);
202258b2a40SEdgar E. Iglesias }
203258b2a40SEdgar E. Iglesias
204258b2a40SEdgar E. Iglesias #ifdef CONFIG_TPM
205258b2a40SEdgar E. Iglesias if (xpc->has_tpm) {
206258b2a40SEdgar E. Iglesias if (s->cfg.tpm.base) {
207258b2a40SEdgar E. Iglesias xen_enable_tpm(s);
208258b2a40SEdgar E. Iglesias } else {
209258b2a40SEdgar E. Iglesias warn_report("tpm-base-addr is not set. TPM will not be enabled");
210258b2a40SEdgar E. Iglesias }
211258b2a40SEdgar E. Iglesias }
212258b2a40SEdgar E. Iglesias #endif
213258b2a40SEdgar E. Iglesias
214f22e598aSEdgar E. Iglesias /* Non-zero pci-ecam-size enables PCI. */
215f22e598aSEdgar E. Iglesias if (s->cfg.pci_ecam.size) {
216f22e598aSEdgar E. Iglesias if (s->cfg.pci_ecam.size != 256 * MiB) {
217f22e598aSEdgar E. Iglesias error_report("pci-ecam-size only supports values 0 or 0x10000000");
218f22e598aSEdgar E. Iglesias exit(EXIT_FAILURE);
219f22e598aSEdgar E. Iglesias }
2203bcdba25SEdgar E. Iglesias if (!s->cfg.pci_intx_irq_base) {
2213bcdba25SEdgar E. Iglesias error_report("PCI enabled but pci-intx-irq-base not set");
2223bcdba25SEdgar E. Iglesias exit(EXIT_FAILURE);
2233bcdba25SEdgar E. Iglesias }
2243bcdba25SEdgar E. Iglesias
225f22e598aSEdgar E. Iglesias xenpvh_gpex_init(s, xpc, sysmem);
226f22e598aSEdgar E. Iglesias }
227f22e598aSEdgar E. Iglesias
228258b2a40SEdgar E. Iglesias /* Call the implementation specific init. */
229258b2a40SEdgar E. Iglesias if (xpc->init) {
230258b2a40SEdgar E. Iglesias xpc->init(ms);
231258b2a40SEdgar E. Iglesias }
232258b2a40SEdgar E. Iglesias }
233258b2a40SEdgar E. Iglesias
234258b2a40SEdgar E. Iglesias #define XEN_PVH_PROP_MEMMAP_SETTER(n, f) \
235258b2a40SEdgar E. Iglesias static void xen_pvh_set_ ## n ## _ ## f(Object *obj, Visitor *v, \
236258b2a40SEdgar E. Iglesias const char *name, void *opaque, \
237258b2a40SEdgar E. Iglesias Error **errp) \
238258b2a40SEdgar E. Iglesias { \
239258b2a40SEdgar E. Iglesias XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
240258b2a40SEdgar E. Iglesias uint64_t value; \
241258b2a40SEdgar E. Iglesias \
242258b2a40SEdgar E. Iglesias if (!visit_type_size(v, name, &value, errp)) { \
243258b2a40SEdgar E. Iglesias return; \
244258b2a40SEdgar E. Iglesias } \
245258b2a40SEdgar E. Iglesias xp->cfg.n.f = value; \
246258b2a40SEdgar E. Iglesias }
247258b2a40SEdgar E. Iglesias
248258b2a40SEdgar E. Iglesias #define XEN_PVH_PROP_MEMMAP_GETTER(n, f) \
249258b2a40SEdgar E. Iglesias static void xen_pvh_get_ ## n ## _ ## f(Object *obj, Visitor *v, \
250258b2a40SEdgar E. Iglesias const char *name, void *opaque, \
251258b2a40SEdgar E. Iglesias Error **errp) \
252258b2a40SEdgar E. Iglesias { \
253258b2a40SEdgar E. Iglesias XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
254258b2a40SEdgar E. Iglesias uint64_t value = xp->cfg.n.f; \
255258b2a40SEdgar E. Iglesias \
256258b2a40SEdgar E. Iglesias visit_type_uint64(v, name, &value, errp); \
257258b2a40SEdgar E. Iglesias }
258258b2a40SEdgar E. Iglesias
259258b2a40SEdgar E. Iglesias #define XEN_PVH_PROP_MEMMAP_BASE(n) \
260258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_SETTER(n, base) \
261258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_GETTER(n, base) \
262258b2a40SEdgar E. Iglesias
263258b2a40SEdgar E. Iglesias #define XEN_PVH_PROP_MEMMAP_SIZE(n) \
264258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_SETTER(n, size) \
265258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_GETTER(n, size)
266258b2a40SEdgar E. Iglesias
267258b2a40SEdgar E. Iglesias #define XEN_PVH_PROP_MEMMAP(n) \
268258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_BASE(n) \
269258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_SIZE(n)
270258b2a40SEdgar E. Iglesias
271258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(ram_low)
XEN_PVH_PROP_MEMMAP(ram_high)272258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(ram_high)
273258b2a40SEdgar E. Iglesias /* TPM only has a base-addr option. */
274258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP_BASE(tpm)
275258b2a40SEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(virtio_mmio)
276f22e598aSEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(pci_ecam)
277f22e598aSEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(pci_mmio)
278f22e598aSEdgar E. Iglesias XEN_PVH_PROP_MEMMAP(pci_mmio_high)
279258b2a40SEdgar E. Iglesias
2803bcdba25SEdgar E. Iglesias static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v,
2813bcdba25SEdgar E. Iglesias const char *name, void *opaque,
2823bcdba25SEdgar E. Iglesias Error **errp)
2833bcdba25SEdgar E. Iglesias {
2843bcdba25SEdgar E. Iglesias XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
2853bcdba25SEdgar E. Iglesias uint32_t value;
2863bcdba25SEdgar E. Iglesias
2873bcdba25SEdgar E. Iglesias if (!visit_type_uint32(v, name, &value, errp)) {
2883bcdba25SEdgar E. Iglesias return;
2893bcdba25SEdgar E. Iglesias }
2903bcdba25SEdgar E. Iglesias
2913bcdba25SEdgar E. Iglesias xp->cfg.pci_intx_irq_base = value;
2923bcdba25SEdgar E. Iglesias }
2933bcdba25SEdgar E. Iglesias
xen_pvh_get_pci_intx_irq_base(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)2943bcdba25SEdgar E. Iglesias static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v,
2953bcdba25SEdgar E. Iglesias const char *name, void *opaque,
2963bcdba25SEdgar E. Iglesias Error **errp)
2973bcdba25SEdgar E. Iglesias {
2983bcdba25SEdgar E. Iglesias XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
2993bcdba25SEdgar E. Iglesias uint32_t value = xp->cfg.pci_intx_irq_base;
3003bcdba25SEdgar E. Iglesias
3013bcdba25SEdgar E. Iglesias visit_type_uint32(v, name, &value, errp);
3023bcdba25SEdgar E. Iglesias }
3033bcdba25SEdgar E. Iglesias
xen_pvh_class_setup_common_props(XenPVHMachineClass * xpc)304258b2a40SEdgar E. Iglesias void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc)
305258b2a40SEdgar E. Iglesias {
306258b2a40SEdgar E. Iglesias ObjectClass *oc = OBJECT_CLASS(xpc);
307258b2a40SEdgar E. Iglesias MachineClass *mc = MACHINE_CLASS(xpc);
308258b2a40SEdgar E. Iglesias
309258b2a40SEdgar E. Iglesias #define OC_MEMMAP_PROP_BASE(c, prop_name, name) \
310258b2a40SEdgar E. Iglesias do { \
311258b2a40SEdgar E. Iglesias object_class_property_add(c, prop_name "-base", "uint64_t", \
312258b2a40SEdgar E. Iglesias xen_pvh_get_ ## name ## _base, \
313258b2a40SEdgar E. Iglesias xen_pvh_set_ ## name ## _base, NULL, NULL); \
314258b2a40SEdgar E. Iglesias object_class_property_set_description(oc, prop_name "-base", \
315258b2a40SEdgar E. Iglesias "Set base address for " prop_name); \
316258b2a40SEdgar E. Iglesias } while (0)
317258b2a40SEdgar E. Iglesias
318258b2a40SEdgar E. Iglesias #define OC_MEMMAP_PROP_SIZE(c, prop_name, name) \
319258b2a40SEdgar E. Iglesias do { \
320258b2a40SEdgar E. Iglesias object_class_property_add(c, prop_name "-size", "uint64_t", \
321258b2a40SEdgar E. Iglesias xen_pvh_get_ ## name ## _size, \
322258b2a40SEdgar E. Iglesias xen_pvh_set_ ## name ## _size, NULL, NULL); \
323258b2a40SEdgar E. Iglesias object_class_property_set_description(oc, prop_name "-size", \
324258b2a40SEdgar E. Iglesias "Set memory range size for " prop_name); \
325258b2a40SEdgar E. Iglesias } while (0)
326258b2a40SEdgar E. Iglesias
327258b2a40SEdgar E. Iglesias #define OC_MEMMAP_PROP(c, prop_name, name) \
328258b2a40SEdgar E. Iglesias do { \
329258b2a40SEdgar E. Iglesias OC_MEMMAP_PROP_BASE(c, prop_name, name); \
330258b2a40SEdgar E. Iglesias OC_MEMMAP_PROP_SIZE(c, prop_name, name); \
331258b2a40SEdgar E. Iglesias } while (0)
332258b2a40SEdgar E. Iglesias
333258b2a40SEdgar E. Iglesias /*
334258b2a40SEdgar E. Iglesias * We provide memmap properties to allow Xen to move things to other
335258b2a40SEdgar E. Iglesias * addresses for example when users need to accomodate the memory-map
336258b2a40SEdgar E. Iglesias * for 1:1 mapped devices/memory.
337258b2a40SEdgar E. Iglesias */
338258b2a40SEdgar E. Iglesias OC_MEMMAP_PROP(oc, "ram-low", ram_low);
339258b2a40SEdgar E. Iglesias OC_MEMMAP_PROP(oc, "ram-high", ram_high);
340258b2a40SEdgar E. Iglesias
341258b2a40SEdgar E. Iglesias if (xpc->has_virtio_mmio) {
342258b2a40SEdgar E. Iglesias OC_MEMMAP_PROP(oc, "virtio-mmio", virtio_mmio);
343258b2a40SEdgar E. Iglesias }
344258b2a40SEdgar E. Iglesias
345f22e598aSEdgar E. Iglesias if (xpc->has_pci) {
346f22e598aSEdgar E. Iglesias OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam);
347f22e598aSEdgar E. Iglesias OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio);
348f22e598aSEdgar E. Iglesias OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high);
3493bcdba25SEdgar E. Iglesias
3503bcdba25SEdgar E. Iglesias object_class_property_add(oc, "pci-intx-irq-base", "uint32_t",
3513bcdba25SEdgar E. Iglesias xen_pvh_get_pci_intx_irq_base,
3523bcdba25SEdgar E. Iglesias xen_pvh_set_pci_intx_irq_base,
3533bcdba25SEdgar E. Iglesias NULL, NULL);
3543bcdba25SEdgar E. Iglesias object_class_property_set_description(oc, "pci-intx-irq-base",
3553bcdba25SEdgar E. Iglesias "Set PCI INTX interrupt base line.");
356f22e598aSEdgar E. Iglesias }
357f22e598aSEdgar E. Iglesias
358258b2a40SEdgar E. Iglesias #ifdef CONFIG_TPM
359258b2a40SEdgar E. Iglesias if (xpc->has_tpm) {
360258b2a40SEdgar E. Iglesias object_class_property_add(oc, "tpm-base-addr", "uint64_t",
361258b2a40SEdgar E. Iglesias xen_pvh_get_tpm_base,
362258b2a40SEdgar E. Iglesias xen_pvh_set_tpm_base,
363258b2a40SEdgar E. Iglesias NULL, NULL);
364258b2a40SEdgar E. Iglesias object_class_property_set_description(oc, "tpm-base-addr",
365258b2a40SEdgar E. Iglesias "Set Base address for TPM device.");
366258b2a40SEdgar E. Iglesias
367258b2a40SEdgar E. Iglesias machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
368258b2a40SEdgar E. Iglesias }
369258b2a40SEdgar E. Iglesias #endif
370258b2a40SEdgar E. Iglesias }
371258b2a40SEdgar E. Iglesias
xen_pvh_class_init(ObjectClass * oc,const void * data)372*12d1a768SPhilippe Mathieu-Daudé static void xen_pvh_class_init(ObjectClass *oc, const void *data)
373258b2a40SEdgar E. Iglesias {
374258b2a40SEdgar E. Iglesias MachineClass *mc = MACHINE_CLASS(oc);
375258b2a40SEdgar E. Iglesias
376258b2a40SEdgar E. Iglesias mc->init = xen_pvh_init;
377258b2a40SEdgar E. Iglesias
378258b2a40SEdgar E. Iglesias mc->desc = "Xen PVH machine";
379258b2a40SEdgar E. Iglesias mc->max_cpus = 1;
380258b2a40SEdgar E. Iglesias mc->default_machine_opts = "accel=xen";
381258b2a40SEdgar E. Iglesias /* Set to zero to make sure that the real ram size is passed. */
382258b2a40SEdgar E. Iglesias mc->default_ram_size = 0;
383258b2a40SEdgar E. Iglesias }
384258b2a40SEdgar E. Iglesias
385258b2a40SEdgar E. Iglesias static const TypeInfo xen_pvh_info = {
386258b2a40SEdgar E. Iglesias .name = TYPE_XEN_PVH_MACHINE,
387258b2a40SEdgar E. Iglesias .parent = TYPE_MACHINE,
388258b2a40SEdgar E. Iglesias .abstract = true,
389258b2a40SEdgar E. Iglesias .instance_size = sizeof(XenPVHMachineState),
390258b2a40SEdgar E. Iglesias .class_size = sizeof(XenPVHMachineClass),
391258b2a40SEdgar E. Iglesias .class_init = xen_pvh_class_init,
392258b2a40SEdgar E. Iglesias };
393258b2a40SEdgar E. Iglesias
xen_pvh_register_types(void)394258b2a40SEdgar E. Iglesias static void xen_pvh_register_types(void)
395258b2a40SEdgar E. Iglesias {
396258b2a40SEdgar E. Iglesias type_register_static(&xen_pvh_info);
397258b2a40SEdgar E. Iglesias }
398258b2a40SEdgar E. Iglesias
399258b2a40SEdgar E. Iglesias type_init(xen_pvh_register_types);
400