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/linux/Documentation/devicetree/bindings/pci/
H A Drcar-pci-host.yaml115 reg = <0 0xfe000000 0 0x80000>;
118 bus-range = <0x00 0xff>;
120 ranges = <0x01000000 0 0x00000000 0
[all...]
H A Dcdns,cdns-pcie-host.yaml44 bus-range = <0x0 0xff>;
45 linux,pci-domain = <0>;
46 vendor-id = <0x17cd>;
47 device-id = <0x0200>;
49 reg = <0x0 0xfb000000 0x0 0x01000000>,
50 <0x
[all...]
H A Dapm,xgene-pcie.yaml69 reg = <0x00 0x1f2b0000 0x0 0x00010000>, /* Controller registers */
70 <0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
72 ranges = <0x01000000 0x0
[all...]
H A Dbrcm,stb-pcie.yaml197 reg = <0x0 0x7d500000 0x9310>;
205 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
206 interrupt-map = <0 0 0
[all...]
H A Dsophgo,sg2044-pcie.yaml53 const: 0
94 reg = <0x6c 0x00400000 0x0 0x00001000>,
95 <0x6c 0x00700000 0x0 0x00004000>,
96 <0x4
[all...]
H A Drcar-gen4-pci-host.yaml98 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
99 <0 0xe65d300
[all...]
/linux/drivers/of/unittest-data/
H A Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x7000000
[all...]
/linux/arch/powerpc/platforms/44x/
H A Dcanyonlands.c20 #define BCSR_USB_EN 0x11
34 return 0; in ppc460ex_device_probe()
54 int ret = 0; in ppc460ex_canyonlands_fixup()
62 bcsr = of_iomap(np, 0); in ppc460ex_canyonlands_fixup()
77 vaddr = of_iomap(np, 0); in ppc460ex_canyonlands_fixup()
100 setbits32((vaddr + GPIO0_OSRH), 0x42000000); in ppc460ex_canyonlands_fixup()
101 setbits32((vaddr + GPIO0_TSRH), 0x42000000); in ppc460ex_canyonlands_fixup()
/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x1000
[all...]
/linux/Documentation/devicetree/bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml45 implementation defined. Some SoCs can use 0x00000000-0x0fffffff and
46 0x40000000-0x4fffffff, while other SoCs only 0x40000000-0x4fffffff.
53 bank 0 to 0x42000000-0x43fffff
[all...]
/linux/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff
[all...]
H A Dapm-shadowcat.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
26 clocks = <&pmd0clk 0>;
31 reg = <0x0 0x001>;
33 cpu-release-addr = <0x
[all...]
/linux/arch/powerpc/boot/dts/
H A Dcurrituck.dts13 /memreserve/ 0x01f00000 0x00100000; // spin table
20 dcr-parent = <&{/cpus/cpu@0}>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
58 cpu-release-addr = <0x0 0x01f00000>;
64 reg = <0x0 0x
[all...]
H A Dakebono.dts14 /memreserve/ 0x01f00000 0x00100000; // spin table
21 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
59 cpu-release-addr = <0x0 0x01f00000>;
65 reg = <0x0 0x
[all...]
H A Dkatmai.dts22 dcr-parent = <&{/cpus/cpu@0}>;
33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
53 reg = <0x0 0x00000000 0x0 0x0000000
[all...]
H A Dredwood.dts18 dcr-parent = <&{/cpus/cpu@0}>;
27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
52 cell-index = <0>;
[all...]
H A Dicon.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
49 reg = <0x0 0x00000000 0x0 0x0000000
[all...]
H A Dpcm030.dts28 cell-index = <0>;
59 phy0: ethernet-phy@0 {
60 reg = <0>;
67 reg = <0x51>;
71 reg = <0x52>;
78 reg = <0x8000 0x4000>;
83 interrupt-map-mask = <0xf800 0 0
[all...]
H A Ddigsy_mtc.dts19 memory@0 {
20 reg = <0x00000000 0x02000000>; // 32MB
57 phy0: ethernet-phy@0 {
58 reg = <0>;
65 reg = <0x50>;
70 reg = <0x56>;
75 reg = <0x68>;
85 interrupt-map-mask = <0xf800 0
[all...]
/linux/arch/arm64/boot/dts/arm/
H A Dmorello-sdp.dts24 #clock-cells = <0>;
31 #clock-cells = <0>;
38 reg = <0x0 0x1c0f0000 0x0 0x1000>;
43 #size-cells = <0>;
49 reg = <0x70>;
50 video-ports = <0x234501>;
61 reg = <0x
[all...]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6
[all...]
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-support-card.dtsi10 ranges = <1 0x00000000 0x42000000 0x02000000>;
14 reg = <1 0x01f00000 0x1000>;
22 reg = <1 0x01fb0000 0x20>;
/linux/arch/arm/include/debug/
H A Ddc21285.S14 .equ dc21285_high, ARMCSR_BASE & 0xff000000
15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
21 mov \rp, #0
24 orr \rp, \rp, #0x42000000
28 str \rd, [\rx, #0x160] @ UARTDR
32 1001: ldr \rd, [\rx, #0x178] @ UARTFLG
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst-rproc.txt29 reg = <0x42000000 0x01000000>;
40 st,syscfg = <&syscfg_core 0x228>;
/linux/arch/arm/mach-footbridge/include/mach/
H A Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc00000
[all...]

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