1*f6b5ad2cSRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*f6b5ad2cSRob Herring (Arm)%YAML 1.2 3*f6b5ad2cSRob Herring (Arm)--- 4*f6b5ad2cSRob Herring (Arm)$id: http://devicetree.org/schemas/pci/apm,xgene-pcie.yaml# 5*f6b5ad2cSRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f6b5ad2cSRob Herring (Arm) 7*f6b5ad2cSRob Herring (Arm)title: AppliedMicro X-Gene PCIe interface 8*f6b5ad2cSRob Herring (Arm) 9*f6b5ad2cSRob Herring (Arm)maintainers: 10*f6b5ad2cSRob Herring (Arm) - Toan Le <toan@os.amperecomputing.com> 11*f6b5ad2cSRob Herring (Arm) 12*f6b5ad2cSRob Herring (Arm)allOf: 13*f6b5ad2cSRob Herring (Arm) - $ref: /schemas/pci/pci-host-bridge.yaml# 14*f6b5ad2cSRob Herring (Arm) 15*f6b5ad2cSRob Herring (Arm)properties: 16*f6b5ad2cSRob Herring (Arm) compatible: 17*f6b5ad2cSRob Herring (Arm) oneOf: 18*f6b5ad2cSRob Herring (Arm) - items: 19*f6b5ad2cSRob Herring (Arm) - const: apm,xgene-storm-pcie 20*f6b5ad2cSRob Herring (Arm) - const: apm,xgene-pcie 21*f6b5ad2cSRob Herring (Arm) - items: 22*f6b5ad2cSRob Herring (Arm) - const: apm,xgene-pcie 23*f6b5ad2cSRob Herring (Arm) 24*f6b5ad2cSRob Herring (Arm) reg: 25*f6b5ad2cSRob Herring (Arm) items: 26*f6b5ad2cSRob Herring (Arm) - description: Controller configuration registers 27*f6b5ad2cSRob Herring (Arm) - description: PCI configuration space registers 28*f6b5ad2cSRob Herring (Arm) 29*f6b5ad2cSRob Herring (Arm) reg-names: 30*f6b5ad2cSRob Herring (Arm) items: 31*f6b5ad2cSRob Herring (Arm) - const: csr 32*f6b5ad2cSRob Herring (Arm) - const: cfg 33*f6b5ad2cSRob Herring (Arm) 34*f6b5ad2cSRob Herring (Arm) clocks: 35*f6b5ad2cSRob Herring (Arm) maxItems: 1 36*f6b5ad2cSRob Herring (Arm) 37*f6b5ad2cSRob Herring (Arm) clock-names: 38*f6b5ad2cSRob Herring (Arm) items: 39*f6b5ad2cSRob Herring (Arm) - const: pcie 40*f6b5ad2cSRob Herring (Arm) 41*f6b5ad2cSRob Herring (Arm) dma-coherent: true 42*f6b5ad2cSRob Herring (Arm) 43*f6b5ad2cSRob Herring (Arm) msi-parent: 44*f6b5ad2cSRob Herring (Arm) maxItems: 1 45*f6b5ad2cSRob Herring (Arm) 46*f6b5ad2cSRob Herring (Arm)required: 47*f6b5ad2cSRob Herring (Arm) - compatible 48*f6b5ad2cSRob Herring (Arm) - reg 49*f6b5ad2cSRob Herring (Arm) - reg-names 50*f6b5ad2cSRob Herring (Arm) - '#interrupt-cells' 51*f6b5ad2cSRob Herring (Arm) - interrupt-map-mask 52*f6b5ad2cSRob Herring (Arm) - interrupt-map 53*f6b5ad2cSRob Herring (Arm) - clocks 54*f6b5ad2cSRob Herring (Arm) 55*f6b5ad2cSRob Herring (Arm)unevaluatedProperties: false 56*f6b5ad2cSRob Herring (Arm) 57*f6b5ad2cSRob Herring (Arm)examples: 58*f6b5ad2cSRob Herring (Arm) - | 59*f6b5ad2cSRob Herring (Arm) bus { 60*f6b5ad2cSRob Herring (Arm) #address-cells = <2>; 61*f6b5ad2cSRob Herring (Arm) #size-cells = <2>; 62*f6b5ad2cSRob Herring (Arm) 63*f6b5ad2cSRob Herring (Arm) pcie@1f2b0000 { 64*f6b5ad2cSRob Herring (Arm) compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie"; 65*f6b5ad2cSRob Herring (Arm) device_type = "pci"; 66*f6b5ad2cSRob Herring (Arm) #interrupt-cells = <1>; 67*f6b5ad2cSRob Herring (Arm) #size-cells = <2>; 68*f6b5ad2cSRob Herring (Arm) #address-cells = <3>; 69*f6b5ad2cSRob Herring (Arm) reg = <0x00 0x1f2b0000 0x0 0x00010000>, /* Controller registers */ 70*f6b5ad2cSRob Herring (Arm) <0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */ 71*f6b5ad2cSRob Herring (Arm) reg-names = "csr", "cfg"; 72*f6b5ad2cSRob Herring (Arm) ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000>, /* io */ 73*f6b5ad2cSRob Herring (Arm) <0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */ 74*f6b5ad2cSRob Herring (Arm) dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000>, 75*f6b5ad2cSRob Herring (Arm) <0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; 76*f6b5ad2cSRob Herring (Arm) interrupt-map-mask = <0x0 0x0 0x0 0x7>; 77*f6b5ad2cSRob Herring (Arm) interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1>, 78*f6b5ad2cSRob Herring (Arm) <0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1>, 79*f6b5ad2cSRob Herring (Arm) <0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1>, 80*f6b5ad2cSRob Herring (Arm) <0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>; 81*f6b5ad2cSRob Herring (Arm) dma-coherent; 82*f6b5ad2cSRob Herring (Arm) clocks = <&pcie0clk 0>; 83*f6b5ad2cSRob Herring (Arm) }; 84*f6b5ad2cSRob Herring (Arm) }; 85