Home
last modified time | relevance | path

Searched refs:pdev (Results 1 – 25 of 71) sorted by relevance

123

/qemu/tests/qtest/
H A Dnvme-test.c53 QPCIDevice *pdev = &nvme->dev; in nvmetest_oob_cmb_test() local
56 qpci_device_enable(pdev); in nvmetest_oob_cmb_test()
57 bar = qpci_iomap(pdev, 2, NULL); in nvmetest_oob_cmb_test()
59 qpci_io_writel(pdev, bar, 0, 0xccbbaa99); in nvmetest_oob_cmb_test()
60 g_assert_cmpint(qpci_io_readb(pdev, bar, 0), ==, 0x99); in nvmetest_oob_cmb_test()
61 g_assert_cmpint(qpci_io_readw(pdev, bar, 0), ==, 0xaa99); in nvmetest_oob_cmb_test()
64 qpci_io_writel(pdev, bar, cmb_bar_size - 1, 0x44332211); in nvmetest_oob_cmb_test()
65 g_assert_cmpint(qpci_io_readb(pdev, bar, cmb_bar_size - 1), ==, 0x11); in nvmetest_oob_cmb_test()
66 g_assert_cmpint(qpci_io_readw(pdev, bar, cmb_bar_size - 1), !=, 0x2211); in nvmetest_oob_cmb_test()
67 g_assert_cmpint(qpci_io_readl(pdev, bar, cmb_bar_size - 1), !=, 0x44332211); in nvmetest_oob_cmb_test()
[all …]
H A Dvirtio-blk-test.c467 QVirtioPCIDevice *pdev = &blk->pci_vdev; in msix() local
468 QVirtioDevice *dev = &pdev->vdev; in msix()
485 qpci_msix_enable(pdev->pdev); in msix()
486 qvirtio_pci_set_msix_configuration_vector(pdev, t_alloc, 0); in msix()
499 qvirtqueue_pci_msix_setup(pdev, (QVirtQueuePCI *)vq, t_alloc, 1); in msix()
568 qpci_msix_disable(pdev->pdev); in msix()
576 QVirtioPCIDevice *pdev = &blk->pci_vdev; in idx() local
577 QVirtioDevice *dev = &pdev->vdev; in idx()
595 qpci_msix_enable(pdev->pdev); in idx()
596 qvirtio_pci_set_msix_configuration_vector(pdev, t_alloc, 0); in idx()
[all …]
H A Dvhost-user-blk-test.c546 QVirtioPCIDevice *pdev = &blk->pci_vdev; in idx() local
547 QVirtioDevice *dev = &pdev->vdev; in idx()
565 qpci_msix_enable(pdev->pdev); in idx()
566 qvirtio_pci_set_msix_configuration_vector(pdev, t_alloc, 0); in idx()
579 qvirtqueue_pci_msix_setup(pdev, (QVirtQueuePCI *)vq, t_alloc, 1); in idx()
668 qpci_msix_disable(pdev->pdev); in idx()
677 QTestState *qts = dev1->pdev->bus->qts; in pci_hotplug()
679 if (dev1->pdev->bus->not_hotpluggable) { in pci_hotplug()
689 dev = virtio_pci_new(dev1->pdev->bus, in pci_hotplug()
707 QTestState *qts = pdev1->pdev->bus->qts; in multiqueue()
[all …]
H A Dvirtio-rng-test.c21 QTestState *qts = dev->pdev->bus->qts; in rng_hotplug()
23 if (dev->pdev->bus->not_hotpluggable) { in rng_hotplug()
/qemu/tests/qtest/libqos/
H A Dvirtio-pci.c40 #define CONFIG_BASE(dev) (VIRTIO_PCI_CONFIG_OFF((dev)->pdev->msix_enabled))
45 return qpci_io_readb(dev->pdev, dev->bar, CONFIG_BASE(dev) + off); in qvirtio_pci_config_readb()
60 value = qpci_io_readw(dev->pdev, dev->bar, CONFIG_BASE(dev) + off); in qvirtio_pci_config_readw()
72 value = qpci_io_readl(dev->pdev, dev->bar, CONFIG_BASE(dev) + off); in qvirtio_pci_config_readl()
84 val = qpci_io_readq(dev->pdev, dev->bar, CONFIG_BASE(dev) + off); in qvirtio_pci_config_readq()
95 return qpci_io_readl(dev->pdev, dev->bar, VIRTIO_PCI_HOST_FEATURES); in qvirtio_pci_get_features()
101 qpci_io_writel(dev->pdev, dev->bar, VIRTIO_PCI_GUEST_FEATURES, features); in qvirtio_pci_set_features()
107 return qpci_io_readl(dev->pdev, dev->bar, VIRTIO_PCI_GUEST_FEATURES); in qvirtio_pci_get_guest_features()
113 return qpci_io_readb(dev->pdev, dev->bar, VIRTIO_PCI_STATUS); in qvirtio_pci_get_status()
119 qpci_io_writeb(dev->pdev, dev->bar, VIRTIO_PCI_STATUS, status); in qvirtio_pci_set_status()
[all …]
H A Dvirtio-pci-modern.c19 return qpci_io_readb(dev->pdev, dev->bar, dev->device_cfg_offset + addr); in config_readb()
25 return qpci_io_readw(dev->pdev, dev->bar, dev->device_cfg_offset + addr); in config_readw()
31 return qpci_io_readl(dev->pdev, dev->bar, dev->device_cfg_offset + addr); in config_readl()
37 return qpci_io_readq(dev->pdev, dev->bar, dev->device_cfg_offset + addr); in config_readq()
45 qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset + in get_features()
49 lo = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset + in get_features()
52 qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset + in get_features()
56 hi = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset + in get_features()
69 qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset + in set_features()
73 qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset + in set_features()
[all …]
/qemu/hw/vfio/
H A Dpci.c98 pci_irq_assert(&vdev->pdev); in vfio_intx_interrupt()
117 pci_irq_deassert(&vdev->pdev); in vfio_intx_eoi()
136 pci_irq_deassert(&vdev->pdev); in vfio_intx_enable_kvm()
195 pci_irq_deassert(&vdev->pdev); in vfio_intx_disable_kvm()
242 static void vfio_intx_routing_notifier(PCIDevice *pdev) in vfio_intx_routing_notifier() argument
244 VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev); in vfio_intx_routing_notifier()
251 route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin); in vfio_intx_routing_notifier()
268 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1); in vfio_intx_enable()
281 pci_config_set_interrupt_pin(vdev->pdev.config, pin); in vfio_intx_enable()
289 vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev, in vfio_intx_enable()
508 vfio_update_kvm_msi_virq(VFIOMSIVector * vector,MSIMessage msg,PCIDevice * pdev) vfio_update_kvm_msi_virq() argument
514 vfio_msix_vector_do_use(PCIDevice * pdev,unsigned int nr,MSIMessage * msg,IOHandler * handler) vfio_msix_vector_do_use() argument
615 vfio_msix_vector_use(PCIDevice * pdev,unsigned int nr,MSIMessage msg) vfio_msix_vector_use() argument
621 vfio_msix_vector_release(PCIDevice * pdev,unsigned int nr) vfio_msix_vector_release() argument
1197 vfio_sub_page_bar_update_mapping(PCIDevice * pdev,int bar) vfio_sub_page_bar_update_mapping() argument
1243 vfio_pci_read_config(PCIDevice * pdev,uint32_t addr,int len) vfio_pci_read_config() argument
1276 vfio_pci_write_config(PCIDevice * pdev,uint32_t addr,uint32_t val,int len) vfio_pci_write_config() argument
1886 vfio_std_cap_max_size(PCIDevice * pdev,uint8_t pos) vfio_std_cap_max_size() argument
2180 PCIDevice *pdev = &vdev->pdev; vfio_add_vendor_specific_cap() local
2202 PCIDevice *pdev = &vdev->pdev; vfio_add_std_cap() local
2336 PCIDevice *pdev = &vdev->pdev; vfio_add_ext_cap() local
2430 PCIDevice *pdev = &vdev->pdev; vfio_add_capabilities() local
2447 PCIDevice *pdev = &vdev->pdev; vfio_pci_pre_reset() local
2606 PCIDevice *pdev = opaque; vfio_msix_present() local
2664 PCIDevice *pdev = &vdev->pdev; vfio_pci_load_config() local
3006 PCIDevice *pdev = &vdev->pdev; vfio_pci_config_setup() local
3099 PCIDevice *pdev = &vdev->pdev; vfio_interrupt_setup() local
3129 vfio_realize(PCIDevice * pdev,Error ** errp) vfio_realize() argument
3319 vfio_exitfn(PCIDevice * pdev) vfio_exitfn() argument
[all...]
H A Digd.c202 if (vdev->pdev.qdev.hotplugged) { in vfio_pci_igd_opregion_detect()
238 static int vfio_pci_igd_copy(VFIOPCIDevice *vdev, PCIDevice *pdev,
245 ret = pread(vdev->vbasedev.fd, pdev->config + list[i].offset, in vfio_pci_igd_copy()
266 bus = pci_device_root_bus(&vdev->pdev); in vfio_pci_igd_host_init()
289 static void vfio_pci_igd_lpc_bridge_realize(PCIDevice *pdev, Error **errp)
291 if (pdev->devfn != PCI_DEVFN(0x1f, 0)) { in vfio_pci_igd_lpc_bridge_realize() argument
332 lpc_bridge = pci_find_device(pci_device_root_bus(&vdev->pdev), in type_init()
335 lpc_bridge = pci_create_simple(pci_device_root_bus(&vdev->pdev), in type_init()
358 if (vdev->pdev.qdev.hotplugged) { in vfio_pci_igd_setup_lpc_bridge()
368 lpc_bridge = pci_find_device(pci_device_root_bus(&vdev->pdev), in vfio_pci_igd_setup_lpc_bridge()
240 vfio_pci_igd_copy(VFIOPCIDevice * vdev,PCIDevice * pdev,struct vfio_region_info * info,const IGDHostInfo * list,int len) vfio_pci_igd_copy() argument
[all...]
H A Dpci-quirks.c123 data = vfio_pci_read_config(&vdev->pdev, window->address_val, size); in vfio_generic_window_quirk_data_read()
138 vfio_pci_write_config(&vdev->pdev, window->address_val, data, size); in vfio_generic_window_quirk_data_write()
166 data = vfio_pci_read_config(&vdev->pdev, addr, size); in vfio_generic_quirk_mirror_read()
180 vfio_pci_write_config(&vdev->pdev, addr, data, size); in vfio_generic_quirk_mirror_write()
214 uint64_t data = vfio_pci_read_config(&vdev->pdev, in vfio_ati_3c3_quirk_read()
576 data = vfio_pci_read_config(&vdev->pdev, offset, size); in vfio_nvidia_3d0_quirk_read()
602 vfio_pci_write_config(&vdev->pdev, offset, data, size); in vfio_nvidia_3d0_quirk_write()
818 PCIDevice *pdev = &vdev->pdev; in vfio_nvidia_quirk_mirror_write() local
828 if ((pdev->cap_present & QEMU_PCI_CAP_MSI) && in vfio_nvidia_quirk_mirror_write()
829 vfio_range_contained(addr, size, pdev->msi_cap, PCI_MSI_FLAGS)) { in vfio_nvidia_quirk_mirror_write()
[all …]
H A Dpci.h133 PCIDevice pdev; member
207 PCIDevice *pdev = &vdev->pdev; in vfio_is_vga() local
208 uint16_t class = pci_get_word(pdev->config + PCI_CLASS_DEVICE); in vfio_is_vga()
213 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
214 void vfio_pci_write_config(PCIDevice *pdev,
/qemu/hw/remote/
H A Dproxy.c128 static void pci_proxy_dev_exit(PCIDevice *pdev) in pci_proxy_dev_exit() argument
130 PCIProxyDev *dev = PCI_PROXY_DEV(pdev); in pci_proxy_dev_exit()
144 static void config_op_send(PCIProxyDev *pdev, uint32_t addr, uint32_t *val, in config_op_send() argument
157 ret = mpqemu_msg_send_and_await_reply(&msg, pdev, &local_err); in config_op_send()
231 static void send_bar_access_msg(PCIProxyDev *pdev, MemoryRegion *mr, in type_init()
251 ret = mpqemu_msg_send_and_await_reply(&msg, pdev, &local_err); in type_init()
295 PCIProxyDev *pdev = PCI_PROXY_DEV(dev); in probe_pci_info() local
300 config_op_send(pdev, PCI_VENDOR_ID, &val, 2, MPQEMU_CMD_PCI_CFGREAD); in probe_pci_info()
303 config_op_send(pdev, PCI_DEVICE_ID, &val, 2, MPQEMU_CMD_PCI_CFGREAD); in probe_pci_info()
306 config_op_send(pdev, PCI_CLASS_DEVICE, &val, 2, MPQEMU_CMD_PCI_CFGREAD); in probe_pci_info()
[all …]
H A Dmpqemu-link.c189 uint64_t mpqemu_msg_send_and_await_reply(MPQemuMsg *msg, PCIProxyDev *pdev, in mpqemu_msg_send_and_await_reply() argument
197 QEMU_LOCK_GUARD(&pdev->io_mutex); in mpqemu_msg_send_and_await_reply()
198 if (!mpqemu_msg_send(msg, pdev->ioc, errp)) { in mpqemu_msg_send_and_await_reply()
202 if (!mpqemu_msg_recv(&msg_reply, pdev->ioc, errp)) { in mpqemu_msg_send_and_await_reply()
/qemu/hw/ppc/
H A Dspapr_pci_vfio.c150 static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev, in spapr_eeh_pci_find_device() argument
155 if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { in spapr_eeh_pci_find_device()
237 PCIDevice *pdev, in spapr_phb_vfio_eeh_clear_dev_msix() argument
241 if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { in spapr_phb_vfio_eeh_clear_dev_msix()
251 if (msix_enabled(pdev)) { in spapr_phb_vfio_eeh_clear_dev_msix()
254 flags = pci_host_config_read_common(pdev, in spapr_phb_vfio_eeh_clear_dev_msix()
255 pdev->msix_cap + PCI_MSIX_FLAGS, in spapr_phb_vfio_eeh_clear_dev_msix()
256 pci_config_size(pdev), 2); in spapr_phb_vfio_eeh_clear_dev_msix()
258 pci_host_config_write_common(pdev, in spapr_phb_vfio_eeh_clear_dev_msix()
259 pdev->msix_cap + PCI_MSIX_FLAGS, in spapr_phb_vfio_eeh_clear_dev_msix()
[all …]
H A Dspapr_pci.c246 static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr, bool msix, in spapr_msi_setmsg() argument
253 msi_set_message(pdev, msg); in spapr_msi_setmsg()
254 trace_spapr_pci_msi_setup(pdev->name, 0, msg.address); in spapr_msi_setmsg()
259 msix_set_message(pdev, i, msg); in spapr_msi_setmsg()
260 trace_spapr_pci_msi_setup(pdev->name, i, msg.address); in spapr_msi_setmsg()
281 PCIDevice *pdev = NULL; in rtas_ibm_change_msi() local
290 pdev = spapr_pci_find_dev(spapr, buid, config_addr); in rtas_ibm_change_msi()
292 if (!phb || !pdev) { in rtas_ibm_change_msi()
299 if (msi_present(pdev)) { in rtas_ibm_change_msi()
301 } else if (msix_present(pdev)) { in rtas_ibm_change_msi()
[all …]
/qemu/hw/acpi/
H A Dpcihp.c247 PCIDevice *pdev = PCI_DEVICE(qdev); in acpi_pcihp_update_hotplug_bus() local
248 int slot = PCI_SLOT(pdev->devfn); in acpi_pcihp_update_hotplug_bus()
250 if (acpi_pcihp_pc_no_hotplug(s, pdev)) { in acpi_pcihp_update_hotplug_bus()
274 PCIDevice *pdev = PCI_DEVICE(dev); in acpi_pcihp_device_pre_plug_cb() local
278 acpi_pcihp_get_bsel(pci_get_bus(pdev)) < 0) { in acpi_pcihp_device_pre_plug_cb()
288 PCIDevice *pdev = PCI_DEVICE(dev); in acpi_pcihp_device_plug_cb() local
289 int slot = PCI_SLOT(pdev->devfn); in acpi_pcihp_device_plug_cb()
304 PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); in acpi_pcihp_device_plug_cb()
314 bus = pci_get_bus(pdev); in acpi_pcihp_device_plug_cb()
330 PCIDevice *pdev = PCI_DEVICE(dev); in acpi_pcihp_device_unplug_cb() local
[all …]
/qemu/hw/s390x/
H A Ds390-pci-vfio.c65 VFIOPCIDevice *vpdev = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in s390_pci_start_dma_count()
111 VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in s390_pci_read_base()
165 VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in get_host_fh()
188 VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in s390_pci_read_group()
267 VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in s390_pci_read_util()
294 VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in s390_pci_read_pfip()
317 VFIOPCIDevice *vfio_pci = container_of(pbdev->pdev, VFIOPCIDevice, pdev); in get_device_info()
H A Ds390-pci-bus.c154 pci_device_reset(pbdev->pdev); in s390_pci_shutdown_notifier()
166 if (pbdev->pdev) { in s390_pci_perform_unplug()
167 DeviceState *pdev = DEVICE(pbdev->pdev); in s390_pci_perform_unplug() local
169 hotplug_ctrl = qdev_get_hotplug_handler(pdev); in s390_pci_perform_unplug()
170 hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort); in s390_pci_perform_unplug()
171 object_unparent(OBJECT(pdev)); in s390_pci_perform_unplug()
262 if (pbdev->pdev == pci_dev) { in s390_pci_find_dev_by_pci()
912 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); in s390_pci_msix_init()
917 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, in s390_pci_msix_init()
918 pci_config_size(pbdev->pdev), sizeof(ctrl)); in s390_pci_msix_init()
[all …]
/qemu/hw/misc/
H A Dedu.c48 PCIDevice pdev; member
82 return msi_enabled(&edu->pdev); in edu_msi_enabled()
90 msi_notify(&edu->pdev, 0); in edu_raise_irq()
92 pci_set_irq(&edu->pdev, 1); in edu_raise_irq()
102 pci_set_irq(&edu->pdev, 0); in edu_lower_irq()
153 pci_dma_read(&edu->pdev, edu_clamp_addr(edu, edu->dma.src), in edu_dma_timer()
159 pci_dma_write(&edu->pdev, edu_clamp_addr(edu, edu->dma.dst), in edu_dma_timer()
369 static void pci_edu_realize(PCIDevice *pdev, Error **errp) in pci_edu_realize() argument
371 EduState *edu = EDU(pdev); in pci_edu_realize()
372 uint8_t *pci_conf = pdev->config; in pci_edu_realize()
[all …]
H A Divshmem-pci.c83 PCIDevice *pdev; member
256 PCIDevice *pdev = entry->pdev; in ivshmem_vector_notify() local
257 IVShmemState *s = IVSHMEM_COMMON(pdev); in ivshmem_vector_notify()
265 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector); in ivshmem_vector_notify()
267 if (msix_enabled(pdev)) { in ivshmem_vector_notify()
268 msix_notify(pdev, vector); in ivshmem_vector_notify()
284 if (!v->pdev) { in ivshmem_vector_unmask()
313 if (!v->pdev) { in ivshmem_vector_mask()
356 assert(!s->msi_vectors[vector].pdev); in watch_vector_notifier()
357 s->msi_vectors[vector].pdev = PCI_DEVICE(s); in watch_vector_notifier()
[all …]
/qemu/hw/pci/
H A Dpci.c333 static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, Error **);
334 static void pci_del_option_rom(PCIDevice *pdev);
2389 static uint8_t pci_find_space(PCIDevice *pdev, uint8_t size) in pci_find_space() argument
2394 if (pdev->used[i]) in pci_find_space()
2402 static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id, in pci_find_capability_list() argument
2407 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST)) in pci_find_capability_list()
2410 for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]); in pci_find_capability_list()
2412 if (pdev->config[next + PCI_CAP_LIST_ID] == cap_id) in pci_find_capability_list()
2420 static uint8_t pci_find_capability_at_offset(PCIDevice *pdev, uint8_t offset) in pci_find_capability_at_offset() argument
2424 if (!(pdev->used[offset])) { in pci_find_capability_at_offset()
[all …]
/qemu/hw/cxl/
H A Dcxl-events.c245 PCIDevice *pdev = &ct3d->parent_obj; in cxl_event_irq_assert() local
256 if (msix_enabled(pdev)) { in cxl_event_irq_assert()
257 msix_notify(pdev, log->irq_vec); in cxl_event_irq_assert()
258 } else if (msi_enabled(pdev)) { in cxl_event_irq_assert()
259 msi_notify(pdev, log->irq_vec); in cxl_event_irq_assert()
H A Dcxl-component-utils.c381 PCIDevice *pdev = cxl->pdev; in cxl_component_create_dvsec() local
383 uint8_t *wmask = pdev->wmask; in cxl_component_create_dvsec()
391 pcie_add_capability(pdev, PCI_EXT_CAP_ID_DVSEC, 1, offset, length); in cxl_component_create_dvsec()
392 pci_set_long(pdev->config + offset + PCIE_DVSEC_HEADER1_OFFSET, in cxl_component_create_dvsec()
394 pci_set_word(pdev->config + offset + PCIE_DVSEC_ID_OFFSET, type); in cxl_component_create_dvsec()
395 memcpy(pdev->config + offset + sizeof(DVSECHeader), in cxl_component_create_dvsec()
/qemu/hw/pci-host/
H A Darticia.c153 static int amigaone_pcihost_bus0_map_irq(PCIDevice *pdev, int pin) in amigaone_pcihost_bus0_map_irq() argument
155 int devfn_slot = PCI_SLOT(pdev->devfn); in amigaone_pcihost_bus0_map_irq()
172 PCIDevice *pdev; in articia_realize() local
188 pdev = pci_create_simple_multifunction(h->bus, PCI_DEVFN(0, 0), in articia_realize()
190 ARTICIA_PCI_HOST(pdev)->as = s; in articia_realize()
H A Dpnv_phb4.c60 PCIDevice *pdev; in pnv_phb4_config_write() local
62 pdev = pnv_phb4_find_cfg_dev(phb); in pnv_phb4_config_write()
63 if (!pdev) { in pnv_phb4_config_write()
68 limit = pci_config_size(pdev); in pnv_phb4_config_write()
88 pci_host_config_write_common(pdev, cfg_addr, limit, val, size); in pnv_phb4_config_write()
95 PCIDevice *pdev; in pnv_phb4_config_read() local
98 pdev = pnv_phb4_find_cfg_dev(phb); in pnv_phb4_config_read()
99 if (!pdev) { in pnv_phb4_config_read()
104 limit = pci_config_size(pdev); in pnv_phb4_config_read()
112 val = pci_host_config_read_common(pdev, cfg_addr, limit, size); in pnv_phb4_config_read()
[all …]
/qemu/hw/i386/
H A Damd_iommu.c1555 static void amdvi_pci_realize(PCIDevice *pdev, Error **errp) in amdvi_pci_realize() argument
1557 AMDVIPCIState *s = AMD_IOMMU_PCI(pdev); in amdvi_pci_realize()
1560 ret = pci_add_capability(pdev, AMDVI_CAPAB_ID_SEC, 0, in amdvi_pci_realize()
1567 ret = pci_add_capability(pdev, PCI_CAP_ID_MSI, 0, in amdvi_pci_realize()
1572 ret = pci_add_capability(pdev, PCI_CAP_ID_HT, 0, in amdvi_pci_realize()
1578 if (msi_init(pdev, 0, 1, true, false, errp) < 0) { in amdvi_pci_realize()
1583 pci_config_set_prog_interface(pdev->config, 0); in amdvi_pci_realize()
1586 pci_set_long(pdev->config + s->capab_offset, AMDVI_CAPAB_FEATURES); in amdvi_pci_realize()
1587 pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_LOW, in amdvi_pci_realize()
1589 pci_set_long(pdev->config + s->capab_offset + AMDVI_CAPAB_BAR_HIGH, in amdvi_pci_realize()
[all …]

123