123         data = vfio_pci_read_config(&vdev->pdev, window->address_val, size);  in vfio_generic_window_quirk_data_read()
138         vfio_pci_write_config(&vdev->pdev, window->address_val, data, size);  in vfio_generic_window_quirk_data_write()
166     data = vfio_pci_read_config(&vdev->pdev, addr, size);  in vfio_generic_quirk_mirror_read()
180     vfio_pci_write_config(&vdev->pdev, addr, data, size);  in vfio_generic_quirk_mirror_write()
214     uint64_t data = vfio_pci_read_config(&vdev->pdev,  in vfio_ati_3c3_quirk_read()
576         data = vfio_pci_read_config(&vdev->pdev, offset, size);  in vfio_nvidia_3d0_quirk_read()
602             vfio_pci_write_config(&vdev->pdev, offset, data, size);  in vfio_nvidia_3d0_quirk_write()
818     PCIDevice *pdev = &vdev->pdev;  in vfio_nvidia_quirk_mirror_write()  local
828     if ((pdev->cap_present & QEMU_PCI_CAP_MSI) &&  in vfio_nvidia_quirk_mirror_write()
829         vfio_range_contained(addr, size, pdev->msi_cap, PCI_MSI_FLAGS)) {  in vfio_nvidia_quirk_mirror_write()
1016             if (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX) {  in vfio_rtl8168_quirk_address_write()
1024                 memory_region_dispatch_write(&vdev->pdev.msix_table_mmio,  in vfio_rtl8168_quirk_address_write()
1054     if (rtl->enabled && (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX)) {  in vfio_rtl8168_quirk_data_read()
1056         memory_region_dispatch_read(&vdev->pdev.msix_table_mmio, offset,  in vfio_rtl8168_quirk_data_read()
1300     PCIDevice *pdev = &vdev->pdev;  in vfio_radeon_reset()  local
1311     vfio_pci_write_config(pdev, PCI_COMMAND, PCI_COMMAND_MEMORY, 2);  in vfio_radeon_reset()
1324     vfio_pci_write_config(pdev, 0x7c, 0x39d5e86b, 4);  in vfio_radeon_reset()
1354     vfio_pci_write_config(pdev, PCI_COMMAND, 0, 2);  in vfio_radeon_reset()
1457     PCIDevice *pdev = &vdev->pdev;  in vfio_add_nv_gpudirect_cap()  local
1471     if (pci_get_byte(pdev->config + PCI_CLASS_DEVICE + 1) !=  in vfio_add_nv_gpudirect_cap()
1499         tmp = pdev->config[tmp + PCI_CAP_LIST_NEXT];  in vfio_add_nv_gpudirect_cap()
1511     ret = pci_add_capability(pdev, PCI_CAP_ID_VNDR, pos, 8, errp);  in vfio_add_nv_gpudirect_cap()
1519     pci_set_byte(pdev->config + pos++, 8);  in vfio_add_nv_gpudirect_cap()
1520     pci_set_byte(pdev->config + pos++, 'P');  in vfio_add_nv_gpudirect_cap()
1521     pci_set_byte(pdev->config + pos++, '2');  in vfio_add_nv_gpudirect_cap()
1522     pci_set_byte(pdev->config + pos++, 'P');  in vfio_add_nv_gpudirect_cap()
1523     pci_set_byte(pdev->config + pos++, vdev->nv_gpudirect_clique << 3);  in vfio_add_nv_gpudirect_cap()
1524     pci_set_byte(pdev->config + pos, 0);  in vfio_add_nv_gpudirect_cap()
1568     ret = pci_add_capability(&vdev->pdev, PCI_CAP_ID_VNDR, pos,  in vfio_add_vmd_shadow_cap()
1577     pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_LEN);  in vfio_add_vmd_shadow_cap()
1578     pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_VER);  in vfio_add_vmd_shadow_cap()
1579     pci_set_long(vdev->pdev.config + pos, 0x53484457); /* SHDW */  in vfio_add_vmd_shadow_cap()
1580     memcpy(vdev->pdev.config + pos + 4, membar_phys, 16);  in vfio_add_vmd_shadow_cap()