Home
last modified time | relevance | path

Searched refs:pci (Results 1 – 25 of 179) sorted by relevance

12345678

/qemu/hw/scsi/
H A Desp-pci.c80 static void esp_pci_update_irq(PCIESPState *pci) in esp_pci_update_irq() argument
82 int scsi_level = !!(pci->dma_regs[DMA_STAT] & DMA_STAT_SCSIINT); in esp_pci_update_irq()
83 int dma_level = (pci->dma_regs[DMA_CMD] & DMA_CMD_INTE_D) ? in esp_pci_update_irq()
84 !!(pci->dma_regs[DMA_STAT] & DMA_STAT_DONE) : 0; in esp_pci_update_irq()
87 pci_set_irq(PCI_DEVICE(pci), level); in esp_pci_update_irq()
92 PCIESPState *pci = PCI_ESP(opaque); in esp_irq_handler() local
95 pci->dma_regs[DMA_STAT] |= DMA_STAT_SCSIINT; in esp_irq_handler()
104 if ((pci->dma_regs[DMA_CMD] & DMA_CMD_MASK) == 0x3 && in esp_irq_handler()
105 pci->dma_regs[DMA_WBC] == 0) { in esp_irq_handler()
106 pci->dma_regs[DMA_STAT] |= DMA_STAT_DONE; in esp_irq_handler()
[all …]
/qemu/hw/pci-host/
H A Dmv64361.c136 MV64361PCIState pci[2]; member
215 return PCI_HOST_BRIDGE(&mv->pci[n])->bus; in mv64361_get_pci_bus()
252 p = &s->pci[0]; in set_mem_windows()
261 p = &s->pci[0]; in set_mem_windows()
270 p = &s->pci[0]; in set_mem_windows()
279 p = &s->pci[0]; in set_mem_windows()
288 p = &s->pci[0]; in set_mem_windows()
297 p = &s->pci[1]; in set_mem_windows()
306 p = &s->pci[1]; in set_mem_windows()
315 p = &s->pci[1]; in set_mem_windows()
[all …]
H A Dppc4xx_pci.c102 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reg_write4() local
110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
113 pci->pmm[0].ma = value; in ppc4xx_pci_reg_write4()
116 pci->pmm[0].pciha = value; in ppc4xx_pci_reg_write4()
119 pci->pmm[0].pcila = value; in ppc4xx_pci_reg_write4()
123 pci->pmm[1].la = value; in ppc4xx_pci_reg_write4()
126 pci->pmm[1].ma = value; in ppc4xx_pci_reg_write4()
129 pci->pmm[1].pciha = value; in ppc4xx_pci_reg_write4()
132 pci->pmm[1].pcila = value; in ppc4xx_pci_reg_write4()
136 pci->pmm[2].la = value; in ppc4xx_pci_reg_write4()
[all …]
H A Dppce500.c130 PPCE500PCIState *pci = opaque; in pci_reg_read4() local
145 value = pci->pob[idx].potar; in pci_reg_read4()
148 value = pci->pob[idx].potear; in pci_reg_read4()
151 value = pci->pob[idx].powbar; in pci_reg_read4()
154 value = pci->pob[idx].powar; in pci_reg_read4()
167 value = pci->pib[idx].pitar; in pci_reg_read4()
170 value = pci->pib[idx].piwbar; in pci_reg_read4()
173 value = pci->pib[idx].piwbear; in pci_reg_read4()
176 value = pci->pib[idx].piwar; in pci_reg_read4()
184 value = pci->gasket_time; in pci_reg_read4()
[all …]
H A Ddesignware.c103 qemu_set_irq(host->pci.msi, 1); in designware_pcie_root_msi_write()
339 qemu_set_irq(host->pci.msi, 0); in designware_pcie_root_config_write()
394 MemoryRegion *address_space = &host->pci.memory; in designware_pcie_root_realize()
433 source = &host->pci.address_space_root; in designware_pcie_root_realize()
457 destination = &host->pci.memory; in designware_pcie_root_realize()
517 qemu_set_irq(host->pci.irqs[irq_num], level); in designware_pcie_set_irq()
619 PCIHostState *pci = PCI_HOST_BRIDGE(opaque); in designware_pcie_host_mmio_read() local
620 PCIDevice *device = pci_find_device(pci->bus, 0, 0); in designware_pcie_host_mmio_read()
631 PCIHostState *pci = PCI_HOST_BRIDGE(opaque); in designware_pcie_host_mmio_write() local
632 PCIDevice *device = pci_find_device(pci->bus, 0, 0); in designware_pcie_host_mmio_write()
[all …]
/qemu/hw/char/
H A Ddiva-gsp.c59 PCIDivaSerialState *pci = DO_UPCAST(PCIDivaSerialState, dev, dev); in diva_pci_exit() local
63 for (i = 0; i < pci->ports; i++) { in diva_pci_exit()
64 s = pci->state + i; in diva_pci_exit()
66 memory_region_del_subregion(&pci->membar, &s->io); in diva_pci_exit()
67 g_free(pci->name[i]); in diva_pci_exit()
69 qemu_free_irqs(pci->irqs, pci->ports); in diva_pci_exit()
74 PCIDivaSerialState *pci = opaque; in multi_serial_irq_mux() local
77 pci->level[n] = level; in multi_serial_irq_mux()
78 for (i = 0; i < pci->ports; i++) { in multi_serial_irq_mux()
79 if (pci->level[i]) { in multi_serial_irq_mux()
[all …]
H A Dserial-pci-multi.c53 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); in multi_serial_pci_exit() local
57 for (i = 0; i < pci->ports; i++) { in multi_serial_pci_exit()
58 s = pci->state + i; in multi_serial_pci_exit()
60 memory_region_del_subregion(&pci->iobar, &s->io); in multi_serial_pci_exit()
61 g_free(pci->name[i]); in multi_serial_pci_exit()
67 PCIMultiSerialState *pci = opaque; in multi_serial_irq_mux() local
70 pci->level[n] = level; in multi_serial_irq_mux()
71 for (i = 0; i < pci->ports; i++) { in multi_serial_irq_mux()
72 if (pci->level[i]) { in multi_serial_irq_mux()
76 pci_set_irq(&pci->dev, pending); in multi_serial_irq_mux()
[all …]
H A Dserial-pci.c48 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); in OBJECT_DECLARE_SIMPLE_TYPE() local
49 SerialState *s = &pci->state; in OBJECT_DECLARE_SIMPLE_TYPE()
55 pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */ in OBJECT_DECLARE_SIMPLE_TYPE()
56 pci->dev.config[PCI_INTERRUPT_PIN] = 1; in OBJECT_DECLARE_SIMPLE_TYPE()
57 s->irq = pci_allocate_irq(&pci->dev); in OBJECT_DECLARE_SIMPLE_TYPE()
59 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8); in OBJECT_DECLARE_SIMPLE_TYPE()
60 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); in OBJECT_DECLARE_SIMPLE_TYPE()
65 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); in serial_pci_exit() local
66 SerialState *s = &pci->state; in serial_pci_exit()
/qemu/hw/virtio/
H A Dmeson.build4 system_virtio_ss.add(when: 'CONFIG_VIRTIO_PCI', if_true: files('virtio-pci.c'))
32 system_virtio_ss.add(when: 'CONFIG_VIRTIO_PCI', if_true: files('vhost-user-device-pci.c'))
34 if_true: files('vhost-user-gpio-pci.c'))
36 if_true: files('vhost-user-i2c-pci.c'))
38 if_true: files('vhost-user-rng-pci.c'))
40 if_true: files('vhost-user-snd-pci.c'))
42 if_true: files('vhost-user-input-pci.c'))
61 …add(when: ['CONFIG_VIRTIO_PCI', 'CONFIG_VHOST_USER_SCMI'], if_true: files('vhost-user-scmi-pci.c'))
64 virtio_pci_ss.add(when: 'CONFIG_VHOST_VSOCK', if_true: files('vhost-vsock-pci.c'))
65 virtio_pci_ss.add(when: 'CONFIG_VHOST_USER_VSOCK', if_true: files('vhost-user-vsock-pci.c'))
[all …]
/qemu/ui/
H A Dutil.c31 static bool append_pci_address(char *buf, size_t buf_size, const PCIDevice *pci) in append_pci_address() argument
33 PCIBus *bus = pci_get_bus(pci); in append_pci_address()
44 PCI_SLOT(pci->devfn), PCI_FUNC(pci->devfn)); in append_pci_address()
57 PCIDevice *pci = (PCIDevice *) object_dynamic_cast(OBJECT(dev), in qemu_console_fill_device_address() local
60 if (pci == NULL) { in qemu_console_fill_device_address()
67 if (!append_pci_address(device_address, size, pci)) { in qemu_console_fill_device_address()
/qemu/docs/
H A Dmultiseat.txt30 -device pci-bridge,addr=12.0,chassis_nr=2,id=head.2 \
36 This places a pci bridge in slot 12, connects a display adapter and
47 -device pci-bridge,addr=12.0,chassis_nr=2,id=head.2 \
49 -device virtio-keyboard-pci,bus=head.2,addr=03.0,display=video.2 \
50 -device virtio-tablet-pci,bus=head.2,addr=03.0,display=video.2
91 should list the pci bridge with the display adapter and usb controller:
99 Good. Now lets tell the system that the pci bridge and all devices
104 SUBSYSTEMS=="pci", DEVPATH=="*/0000:00:12.0", TAG+="seat", ENV{ID_AUTOSEAT}="1"
112 seat-pci-pci-0000_00_12_0
116 You can use "loginctl seat-status seat-pci-pci-0000_00_12_0" to list
[all …]
H A Dqemupciserial.inf4 ; just an inf file to tell windows which pci id the serial pci card
8 ; Installing the driver: Go to device manager. You should find a "pci
14 ; This file covers all options: pci-serial, pci-serial-2x, pci-serial-4x
/qemu/docs/devel/testing/
H A Dqgraph.rst167 # src='virtio-net-pci'
169 # src='pci-bus'
170 # |-> dest='virtio-net-pci' type=2 (node=0x55914210d880)
171 # src='pci-bus-pc'
172 # |-> dest='pci-bus' type=1 (node=0x559142103f40)
174 # |-> dest='pci-bus-pc' type=0 (node=0x55914210ac70)
191 'i440FX-pcihost' -> 'pci-bus-pc' -> 'pci-bus' -> 'virtio-net-pci' ->
226 ``pci-bus`` architecture so it ``contains`` a PCI driver,
227 ``pci-bus-pc``. The actual path is
230 pci-bus-pc --produces--> pci-bus``.
[all …]
/qemu/docs/system/i386/
H A Dxenpvh.rst20 - virtio-pci devices
22 The idea is to only connect virtio-pci devices but in theory any compatible
44 -device virtio-net-pci,id=nic0,netdev=net0,mac=00:16:3e:5c:81:78 \
48 …47483648,pci-ecam-base=824633720832,pci-ecam-size=268435456,pci-mmio-base=4026531840,pci-mmio-size…
/qemu/docs/specs/
H A Dstandard-vga.rst5 Exists in two variants, for isa and pci.
10 picks isa for -M isapc, otherwise pci
12 pci variant
16 legacy-free pci variant
22 Applies to the pci variant only for obvious reasons.
48 Doesn't apply to the legacy-free pci variant, use the MMIO bar instead.
66 The pci variant used to mirror the framebuffer bar here, QEMU 0.14+
73 Likewise applies to the pci variant only for obvious reasons.
87 The pci revision is 2 (or greater) when these registers are present.
H A Dpci-ids.rst14 The 1000 -> 10ff device ID range is used as follows for virtio-pci devices.
66 PCI serial port (16550A) adapter (:doc:`pci-serial`)
68 PCI Dual-port 16550A adapter (:doc:`pci-serial`)
70 PCI Quad-port 16550A adapter (:doc:`pci-serial`)
72 PCI test device (:doc:`pci-testdev`)
90 PCIe-to-PCI bridge (``-device pcie-pci-bridge``)
96 PCI PVPanic device (``-device pvpanic-pci``)
H A Dindex.rst11 pci-ids
12 pci-serial
13 pci-testdev
/qemu/tests/qtest/libqos/
H A Driscv-iommu.c32 QRISCVIOMMU *pci = (QRISCVIOMMU *)obj; in riscv_iommu_pci_start_hw() local
33 qpci_device_enable(&pci->dev); in riscv_iommu_pci_start_hw()
38 QRISCVIOMMU *pci = (QRISCVIOMMU *)obj; in riscv_iommu_pci_destructor() local
39 qpci_iounmap(&pci->dev, pci->reg_bar); in riscv_iommu_pci_destructor()
H A Dmeson.build7 'pci.c',
17 'pci-spapr.c',
20 'pci-pc.c',
41 'virtio-pci.c',
42 'virtio-pci-modern.c',
/qemu/hw/display/
H A Dapple-gfx-pci.m16 #include "hw/pci/pci_device.h"
17 #include "hw/pci/msi.h"
50 PCIDeviceClass *pci = PCI_DEVICE_CLASS(object_get_class(obj));
52 pci->romfile = apple_gfx_pci_option_rom_path;
127 PCIDeviceClass *pci = PCI_DEVICE_CLASS(klass);
135 pci->vendor_id = PG_PCI_VENDOR_ID;
136 pci->device_id = PG_PCI_DEVICE_ID;
137 pci->class_id = PCI_CLASS_DISPLAY_OTHER;
138 pci->realize = apple_gfx_pci_realize;
/qemu/docs/system/
H A Dsriov.rst13 only supported by virtio-net-pci.
16 virtio-net-pci functions to a bus. Below is a command line example:
23 -device virtio-net-pci,bus=b,addr=0x0.0x3,netdev=q,sriov-pf=f
24 -device virtio-net-pci,bus=b,addr=0x0.0x2,netdev=p,sriov-pf=f
25 -device virtio-net-pci,bus=b,addr=0x0.0x1,netdev=o,sriov-pf=f
26 -device virtio-net-pci,bus=b,addr=0x0.0x0,netdev=n,id=f
37 .. [1] https://docs.kernel.org/PCI/pci-iov-howto.html
/qemu/hw/pci/
H A Dmeson.build5 'pci.c',
8 'pci-hmp-cmds.c',
9 'pci-qmp-cmds.c',
22 system_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
/qemu/hw/riscv/
H A Driscv-iommu-pci.c63 PCIDevice pci; /* Parent PCIe device state */ member
82 if (msix_enabled(&(s->pci))) { in riscv_iommu_pci_notify()
83 msix_notify(&(s->pci), vector); in riscv_iommu_pci_notify()
89 RISCVIOMMUStatePci *s = DO_UPCAST(RISCVIOMMUStatePci, pci, dev); in riscv_iommu_pci_realize()
179 RISCVIOMMUStatePci *pci = RISCV_IOMMU_PCI(obj); in riscv_iommu_pci_reset_hold() local
180 RISCVIOMMUState *iommu = &pci->iommu; in riscv_iommu_pci_reset_hold()
/qemu/docs/devel/
H A Dvfio-iommufd.rst26 | pci | | platform | | ap | | ccw |
95 named iommufd which allows to pass an iommufd object. Take ``vfio-pci``
101 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0
110 -device vfio-pci,iommufd=iommufd0,fd=23
114 If no ``iommufd`` object is passed to the ``vfio-pci`` device, iommufd
120 -device vfio-pci,host=0000:02:00.0
140 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0,enable-migration=on
156 ``vfio-pci`` device checks sysfsdev property to decide if backend is a mdev.
163 …qemu-system-x86_64: -device vfio-pci,iommufd=iommufd0,x-balloon-allowed=on,fd=9: vfio VFIO_FD9: x-…
/qemu/hw/xtensa/
H A Dvirt.c60 PCIHostState *pci; in create_pcie() local
103 pci = PCI_HOST_BRIDGE(dev); in create_pcie()
104 if (pci->bus) { in create_pcie()
105 pci_init_nic_devices(pci->bus, mc->default_nic); in create_pcie()

12345678