Lines Matching refs:pci
136 MV64361PCIState pci[2]; member
215 return PCI_HOST_BRIDGE(&mv->pci[n])->bus; in mv64361_get_pci_bus()
252 p = &s->pci[0]; in set_mem_windows()
261 p = &s->pci[0]; in set_mem_windows()
270 p = &s->pci[0]; in set_mem_windows()
279 p = &s->pci[0]; in set_mem_windows()
288 p = &s->pci[0]; in set_mem_windows()
297 p = &s->pci[1]; in set_mem_windows()
306 p = &s->pci[1]; in set_mem_windows()
315 p = &s->pci[1]; in set_mem_windows()
324 p = &s->pci[1]; in set_mem_windows()
333 p = &s->pci[1]; in set_mem_windows()
381 ret = s->pci[0].io_base; in mv64361_read()
384 ret = s->pci[0].io_size; in mv64361_read()
387 ret = s->pci[0].remap[4] >> 16; in mv64361_read()
390 ret = s->pci[0].mem_base[0]; in mv64361_read()
393 ret = s->pci[0].mem_size[0]; in mv64361_read()
396 ret = (s->pci[0].remap[0] & 0xffff0000) >> 16; in mv64361_read()
399 ret = s->pci[0].remap[0] >> 32; in mv64361_read()
402 ret = s->pci[0].mem_base[1]; in mv64361_read()
405 ret = s->pci[0].mem_size[1]; in mv64361_read()
408 ret = (s->pci[0].remap[1] & 0xffff0000) >> 16; in mv64361_read()
411 ret = s->pci[0].remap[1] >> 32; in mv64361_read()
414 ret = s->pci[0].mem_base[2]; in mv64361_read()
417 ret = s->pci[0].mem_size[2]; in mv64361_read()
420 ret = (s->pci[0].remap[2] & 0xffff0000) >> 16; in mv64361_read()
423 ret = s->pci[0].remap[2] >> 32; in mv64361_read()
426 ret = s->pci[0].mem_base[3]; in mv64361_read()
429 ret = s->pci[0].mem_size[3]; in mv64361_read()
432 ret = (s->pci[0].remap[3] & 0xffff0000) >> 16; in mv64361_read()
435 ret = s->pci[0].remap[3] >> 32; in mv64361_read()
438 ret = s->pci[1].io_base; in mv64361_read()
441 ret = s->pci[1].io_size; in mv64361_read()
444 ret = s->pci[1].remap[4] >> 16; in mv64361_read()
447 ret = s->pci[1].mem_base[0]; in mv64361_read()
450 ret = s->pci[1].mem_size[0]; in mv64361_read()
453 ret = (s->pci[1].remap[0] & 0xffff0000) >> 16; in mv64361_read()
456 ret = s->pci[1].remap[0] >> 32; in mv64361_read()
459 ret = s->pci[1].mem_base[1]; in mv64361_read()
462 ret = s->pci[1].mem_size[1]; in mv64361_read()
465 ret = (s->pci[1].remap[1] & 0xffff0000) >> 16; in mv64361_read()
468 ret = s->pci[1].remap[1] >> 32; in mv64361_read()
471 ret = s->pci[1].mem_base[2]; in mv64361_read()
474 ret = s->pci[1].mem_size[2]; in mv64361_read()
477 ret = (s->pci[1].remap[2] & 0xffff0000) >> 16; in mv64361_read()
480 ret = s->pci[1].remap[2] >> 32; in mv64361_read()
483 ret = s->pci[1].mem_base[3]; in mv64361_read()
486 ret = s->pci[1].mem_size[3]; in mv64361_read()
489 ret = (s->pci[1].remap[3] & 0xffff0000) >> 16; in mv64361_read()
492 ret = s->pci[1].remap[3] >> 32; in mv64361_read()
501 ret = pci_host_conf_le_ops.read(PCI_HOST_BRIDGE(&s->pci[0]), 0, size); in mv64361_read()
505 ret = pci_host_data_le_ops.read(PCI_HOST_BRIDGE(&s->pci[0]), in mv64361_read()
509 ret = pci_host_conf_le_ops.read(PCI_HOST_BRIDGE(&s->pci[1]), 0, size); in mv64361_read()
513 ret = pci_host_data_le_ops.read(PCI_HOST_BRIDGE(&s->pci[1]), in mv64361_read()
595 s->pci[bus].remap[idx] = val; in mv64361_set_pci_mem_remap()
597 s->pci[bus].remap[idx] &= 0xffffffff00000000ULL; in mv64361_set_pci_mem_remap()
598 s->pci[bus].remap[idx] |= (val & 0xffffULL) << 16; in mv64361_set_pci_mem_remap()
614 s->pci[0].io_base = val & 0x30fffffULL; in mv64361_write()
617 s->pci[0].remap[4] = (val & 0xffffULL) << 16; in mv64361_write()
621 s->pci[0].io_size = val & 0xffffULL; in mv64361_write()
624 s->pci[0].remap[4] = (val & 0xffffULL) << 16; in mv64361_write()
627 s->pci[0].mem_base[0] = val & 0x70fffffULL; in mv64361_write()
634 s->pci[0].mem_size[0] = val & 0xffffULL; in mv64361_write()
642 s->pci[0].mem_base[1] = val & 0x70fffffULL; in mv64361_write()
649 s->pci[0].mem_size[1] = val & 0xffffULL; in mv64361_write()
657 s->pci[0].mem_base[2] = val & 0x70fffffULL; in mv64361_write()
664 s->pci[0].mem_size[2] = val & 0xffffULL; in mv64361_write()
672 s->pci[0].mem_base[3] = val & 0x70fffffULL; in mv64361_write()
679 s->pci[0].mem_size[3] = val & 0xffffULL; in mv64361_write()
687 s->pci[1].io_base = val & 0x30fffffULL; in mv64361_write()
690 s->pci[1].remap[4] = (val & 0xffffULL) << 16; in mv64361_write()
694 s->pci[1].io_size = val & 0xffffULL; in mv64361_write()
697 s->pci[1].mem_base[0] = val & 0x70fffffULL; in mv64361_write()
704 s->pci[1].mem_size[0] = val & 0xffffULL; in mv64361_write()
712 s->pci[1].mem_base[1] = val & 0x70fffffULL; in mv64361_write()
719 s->pci[1].mem_size[1] = val & 0xffffULL; in mv64361_write()
727 s->pci[1].mem_base[2] = val & 0x70fffffULL; in mv64361_write()
734 s->pci[1].mem_size[2] = val & 0xffffULL; in mv64361_write()
742 s->pci[1].mem_base[3] = val & 0x70fffffULL; in mv64361_write()
749 s->pci[1].mem_size[3] = val & 0xffffULL; in mv64361_write()
763 pci_host_conf_le_ops.write(PCI_HOST_BRIDGE(&s->pci[0]), 0, val, size); in mv64361_write()
767 pci_host_data_le_ops.write(PCI_HOST_BRIDGE(&s->pci[0]), in mv64361_write()
771 pci_host_conf_le_ops.write(PCI_HOST_BRIDGE(&s->pci[1]), 0, val, size); in mv64361_write()
775 pci_host_data_le_ops.write(PCI_HOST_BRIDGE(&s->pci[1]), in mv64361_write()
874 object_initialize_child(OBJECT(dev), name, &s->pci[i], in mv64361_realize()
876 DeviceState *pci = DEVICE(&s->pci[i]); in mv64361_realize() local
877 qdev_prop_set_uint8(pci, "index", i); in mv64361_realize()
878 sysbus_realize_and_unref(SYS_BUS_DEVICE(pci), &error_fatal); in mv64361_realize()
896 s->pci[0].io_base = 0x100f800; in mv64361_reset()
897 s->pci[0].io_size = 0xff; in mv64361_reset()
898 s->pci[0].mem_base[0] = 0x100c000; in mv64361_reset()
899 s->pci[0].mem_size[0] = 0x1fff; in mv64361_reset()
900 s->pci[0].mem_base[1] = 0x100f900; in mv64361_reset()
901 s->pci[0].mem_size[1] = 0xff; in mv64361_reset()
902 s->pci[0].mem_base[2] = 0x100f400; in mv64361_reset()
903 s->pci[0].mem_size[2] = 0x1ff; in mv64361_reset()
904 s->pci[0].mem_base[3] = 0x100f600; in mv64361_reset()
905 s->pci[0].mem_size[3] = 0x1ff; in mv64361_reset()
906 s->pci[1].io_base = 0x100fe00; in mv64361_reset()
907 s->pci[1].io_size = 0xff; in mv64361_reset()
908 s->pci[1].mem_base[0] = 0x1008000; in mv64361_reset()
909 s->pci[1].mem_size[0] = 0x3fff; in mv64361_reset()
910 s->pci[1].mem_base[1] = 0x100fd00; in mv64361_reset()
911 s->pci[1].mem_size[1] = 0xff; in mv64361_reset()
912 s->pci[1].mem_base[2] = 0x1002600; in mv64361_reset()
913 s->pci[1].mem_size[2] = 0x1ff; in mv64361_reset()
914 s->pci[1].mem_base[3] = 0x100ff80; in mv64361_reset()
915 s->pci[1].mem_size[3] = 0x7f; in mv64361_reset()
918 s->pci[i].remap[j] = s->pci[i].mem_base[j] << 16; in mv64361_reset()
921 s->pci[0].remap[1] = 0; in mv64361_reset()
922 s->pci[1].remap[1] = 0; in mv64361_reset()