1d09ecd8cSThomas Huth /*
2d09ecd8cSThomas Huth * QEMU 16550A multi UART emulation
3d09ecd8cSThomas Huth *
4d09ecd8cSThomas Huth * SPDX-License-Identifier: MIT
5d09ecd8cSThomas Huth *
6d09ecd8cSThomas Huth * Copyright (c) 2003-2004 Fabrice Bellard
7d09ecd8cSThomas Huth * Copyright (c) 2008 Citrix Systems, Inc.
8d09ecd8cSThomas Huth *
9d09ecd8cSThomas Huth * Permission is hereby granted, free of charge, to any person obtaining a copy
10d09ecd8cSThomas Huth * of this software and associated documentation files (the "Software"), to deal
11d09ecd8cSThomas Huth * in the Software without restriction, including without limitation the rights
12d09ecd8cSThomas Huth * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13d09ecd8cSThomas Huth * copies of the Software, and to permit persons to whom the Software is
14d09ecd8cSThomas Huth * furnished to do so, subject to the following conditions:
15d09ecd8cSThomas Huth *
16d09ecd8cSThomas Huth * The above copyright notice and this permission notice shall be included in
17d09ecd8cSThomas Huth * all copies or substantial portions of the Software.
18d09ecd8cSThomas Huth *
19d09ecd8cSThomas Huth * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20d09ecd8cSThomas Huth * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21d09ecd8cSThomas Huth * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22d09ecd8cSThomas Huth * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23d09ecd8cSThomas Huth * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24d09ecd8cSThomas Huth * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25d09ecd8cSThomas Huth * THE SOFTWARE.
26d09ecd8cSThomas Huth */
27d09ecd8cSThomas Huth
283669b594SPeter Maydell /* see docs/specs/pci-serial.rst */
29d09ecd8cSThomas Huth
30d09ecd8cSThomas Huth #include "qemu/osdep.h"
31d09ecd8cSThomas Huth #include "qapi/error.h"
32d09ecd8cSThomas Huth #include "hw/char/serial.h"
3364552b6bSMarkus Armbruster #include "hw/irq.h"
34edf5ca5dSMarkus Armbruster #include "hw/pci/pci_device.h"
35a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
36ce35e229SEduardo Habkost #include "hw/qdev-properties-system.h"
37d6454270SMarkus Armbruster #include "migration/vmstate.h"
38d09ecd8cSThomas Huth
39d09ecd8cSThomas Huth #define PCI_SERIAL_MAX_PORTS 4
40d09ecd8cSThomas Huth
41d09ecd8cSThomas Huth typedef struct PCIMultiSerialState {
42d09ecd8cSThomas Huth PCIDevice dev;
43d09ecd8cSThomas Huth MemoryRegion iobar;
44d09ecd8cSThomas Huth uint32_t ports;
45d09ecd8cSThomas Huth char *name[PCI_SERIAL_MAX_PORTS];
46d09ecd8cSThomas Huth SerialState state[PCI_SERIAL_MAX_PORTS];
47d09ecd8cSThomas Huth uint32_t level[PCI_SERIAL_MAX_PORTS];
484ef6d665SPhilippe Mathieu-Daudé IRQState irqs[PCI_SERIAL_MAX_PORTS];
49d09ecd8cSThomas Huth } PCIMultiSerialState;
50d09ecd8cSThomas Huth
multi_serial_pci_exit(PCIDevice * dev)51d09ecd8cSThomas Huth static void multi_serial_pci_exit(PCIDevice *dev)
52d09ecd8cSThomas Huth {
53d09ecd8cSThomas Huth PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
54d09ecd8cSThomas Huth SerialState *s;
55d09ecd8cSThomas Huth int i;
56d09ecd8cSThomas Huth
57d09ecd8cSThomas Huth for (i = 0; i < pci->ports; i++) {
58d09ecd8cSThomas Huth s = pci->state + i;
59981c3dcdSMarkus Armbruster qdev_unrealize(DEVICE(s));
60d09ecd8cSThomas Huth memory_region_del_subregion(&pci->iobar, &s->io);
61d09ecd8cSThomas Huth g_free(pci->name[i]);
62d09ecd8cSThomas Huth }
63d09ecd8cSThomas Huth }
64d09ecd8cSThomas Huth
multi_serial_irq_mux(void * opaque,int n,int level)65d09ecd8cSThomas Huth static void multi_serial_irq_mux(void *opaque, int n, int level)
66d09ecd8cSThomas Huth {
67d09ecd8cSThomas Huth PCIMultiSerialState *pci = opaque;
68d09ecd8cSThomas Huth int i, pending = 0;
69d09ecd8cSThomas Huth
70d09ecd8cSThomas Huth pci->level[n] = level;
71d09ecd8cSThomas Huth for (i = 0; i < pci->ports; i++) {
72d09ecd8cSThomas Huth if (pci->level[i]) {
73d09ecd8cSThomas Huth pending = 1;
74d09ecd8cSThomas Huth }
75d09ecd8cSThomas Huth }
76d09ecd8cSThomas Huth pci_set_irq(&pci->dev, pending);
77d09ecd8cSThomas Huth }
78d09ecd8cSThomas Huth
multi_serial_get_port_count(PCIDeviceClass * pc)794305d482SMarc-André Lureau static size_t multi_serial_get_port_count(PCIDeviceClass *pc)
804305d482SMarc-André Lureau {
814305d482SMarc-André Lureau switch (pc->device_id) {
824305d482SMarc-André Lureau case 0x0003:
834305d482SMarc-André Lureau return 2;
844305d482SMarc-André Lureau case 0x0004:
854305d482SMarc-André Lureau return 4;
864305d482SMarc-André Lureau }
874305d482SMarc-André Lureau
884305d482SMarc-André Lureau g_assert_not_reached();
894305d482SMarc-André Lureau }
904305d482SMarc-André Lureau
914305d482SMarc-André Lureau
multi_serial_pci_realize(PCIDevice * dev,Error ** errp)92d09ecd8cSThomas Huth static void multi_serial_pci_realize(PCIDevice *dev, Error **errp)
93d09ecd8cSThomas Huth {
94d09ecd8cSThomas Huth PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
95d09ecd8cSThomas Huth PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
96d09ecd8cSThomas Huth SerialState *s;
974305d482SMarc-André Lureau size_t i, nports = multi_serial_get_port_count(pc);
98d09ecd8cSThomas Huth
99*8dc4f981SBALATON Zoltan pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
100*8dc4f981SBALATON Zoltan pci->dev.config[PCI_INTERRUPT_PIN] = 1;
1014305d482SMarc-André Lureau memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
102d09ecd8cSThomas Huth pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
103d09ecd8cSThomas Huth
1044305d482SMarc-André Lureau for (i = 0; i < nports; i++) {
105d09ecd8cSThomas Huth s = pci->state + i;
106668f62ecSMarkus Armbruster if (!qdev_realize(DEVICE(s), NULL, errp)) {
107d09ecd8cSThomas Huth multi_serial_pci_exit(dev);
108d09ecd8cSThomas Huth return;
109d09ecd8cSThomas Huth }
1104ef6d665SPhilippe Mathieu-Daudé s->irq = &pci->irqs[i];
1114305d482SMarc-André Lureau pci->name[i] = g_strdup_printf("uart #%zu", i + 1);
112d09ecd8cSThomas Huth memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s,
113d09ecd8cSThomas Huth pci->name[i], 8);
114d09ecd8cSThomas Huth memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
115d09ecd8cSThomas Huth pci->ports++;
116d09ecd8cSThomas Huth }
117d09ecd8cSThomas Huth }
118d09ecd8cSThomas Huth
119d09ecd8cSThomas Huth static const VMStateDescription vmstate_pci_multi_serial = {
120d09ecd8cSThomas Huth .name = "pci-serial-multi",
121d09ecd8cSThomas Huth .version_id = 1,
122d09ecd8cSThomas Huth .minimum_version_id = 1,
1232f6cab05SRichard Henderson .fields = (const VMStateField[]) {
124d09ecd8cSThomas Huth VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState),
125d09ecd8cSThomas Huth VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS,
126d09ecd8cSThomas Huth 0, vmstate_serial, SerialState),
127d09ecd8cSThomas Huth VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS),
128d09ecd8cSThomas Huth VMSTATE_END_OF_LIST()
129d09ecd8cSThomas Huth }
130d09ecd8cSThomas Huth };
131d09ecd8cSThomas Huth
132312f37d1SRichard Henderson static const Property multi_2x_serial_pci_properties[] = {
133d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
134d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
135d09ecd8cSThomas Huth };
136d09ecd8cSThomas Huth
137312f37d1SRichard Henderson static const Property multi_4x_serial_pci_properties[] = {
138d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
139d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
140d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
141d09ecd8cSThomas Huth DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
142d09ecd8cSThomas Huth };
143d09ecd8cSThomas Huth
multi_2x_serial_pci_class_initfn(ObjectClass * klass,const void * data)14412d1a768SPhilippe Mathieu-Daudé static void multi_2x_serial_pci_class_initfn(ObjectClass *klass,
14512d1a768SPhilippe Mathieu-Daudé const void *data)
146d09ecd8cSThomas Huth {
147d09ecd8cSThomas Huth DeviceClass *dc = DEVICE_CLASS(klass);
148d09ecd8cSThomas Huth PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
149d09ecd8cSThomas Huth pc->realize = multi_serial_pci_realize;
150d09ecd8cSThomas Huth pc->exit = multi_serial_pci_exit;
151d09ecd8cSThomas Huth pc->vendor_id = PCI_VENDOR_ID_REDHAT;
152d09ecd8cSThomas Huth pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2;
153d09ecd8cSThomas Huth pc->revision = 1;
154d09ecd8cSThomas Huth pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
155d09ecd8cSThomas Huth dc->vmsd = &vmstate_pci_multi_serial;
1564f67d30bSMarc-André Lureau device_class_set_props(dc, multi_2x_serial_pci_properties);
157d09ecd8cSThomas Huth set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
158d09ecd8cSThomas Huth }
159d09ecd8cSThomas Huth
multi_4x_serial_pci_class_initfn(ObjectClass * klass,const void * data)16012d1a768SPhilippe Mathieu-Daudé static void multi_4x_serial_pci_class_initfn(ObjectClass *klass,
16112d1a768SPhilippe Mathieu-Daudé const void *data)
162d09ecd8cSThomas Huth {
163d09ecd8cSThomas Huth DeviceClass *dc = DEVICE_CLASS(klass);
164d09ecd8cSThomas Huth PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
165d09ecd8cSThomas Huth pc->realize = multi_serial_pci_realize;
166d09ecd8cSThomas Huth pc->exit = multi_serial_pci_exit;
167d09ecd8cSThomas Huth pc->vendor_id = PCI_VENDOR_ID_REDHAT;
168d09ecd8cSThomas Huth pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4;
169d09ecd8cSThomas Huth pc->revision = 1;
170d09ecd8cSThomas Huth pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
171d09ecd8cSThomas Huth dc->vmsd = &vmstate_pci_multi_serial;
1724f67d30bSMarc-André Lureau device_class_set_props(dc, multi_4x_serial_pci_properties);
173d09ecd8cSThomas Huth set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
174d09ecd8cSThomas Huth }
175d09ecd8cSThomas Huth
multi_serial_init(Object * o)1767781b88eSMarc-André Lureau static void multi_serial_init(Object *o)
1777781b88eSMarc-André Lureau {
1787781b88eSMarc-André Lureau PCIDevice *dev = PCI_DEVICE(o);
1797781b88eSMarc-André Lureau PCIMultiSerialState *pms = DO_UPCAST(PCIMultiSerialState, dev, dev);
1807781b88eSMarc-André Lureau size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev));
1817781b88eSMarc-André Lureau
1827781b88eSMarc-André Lureau for (i = 0; i < nports; i++) {
1834ef6d665SPhilippe Mathieu-Daudé qemu_init_irq(&pms->irqs[i], multi_serial_irq_mux, pms, i);
1849fc7fc4dSMarkus Armbruster object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL);
1857781b88eSMarc-André Lureau }
1867781b88eSMarc-André Lureau }
1877781b88eSMarc-André Lureau
188d09ecd8cSThomas Huth static const TypeInfo multi_2x_serial_pci_info = {
189d09ecd8cSThomas Huth .name = "pci-serial-2x",
190d09ecd8cSThomas Huth .parent = TYPE_PCI_DEVICE,
191d09ecd8cSThomas Huth .instance_size = sizeof(PCIMultiSerialState),
1927781b88eSMarc-André Lureau .instance_init = multi_serial_init,
193d09ecd8cSThomas Huth .class_init = multi_2x_serial_pci_class_initfn,
1942cd09e47SPhilippe Mathieu-Daudé .interfaces = (const InterfaceInfo[]) {
195d09ecd8cSThomas Huth { INTERFACE_CONVENTIONAL_PCI_DEVICE },
196d09ecd8cSThomas Huth { },
197d09ecd8cSThomas Huth },
198d09ecd8cSThomas Huth };
199d09ecd8cSThomas Huth
200d09ecd8cSThomas Huth static const TypeInfo multi_4x_serial_pci_info = {
201d09ecd8cSThomas Huth .name = "pci-serial-4x",
202d09ecd8cSThomas Huth .parent = TYPE_PCI_DEVICE,
203d09ecd8cSThomas Huth .instance_size = sizeof(PCIMultiSerialState),
2047781b88eSMarc-André Lureau .instance_init = multi_serial_init,
205d09ecd8cSThomas Huth .class_init = multi_4x_serial_pci_class_initfn,
2062cd09e47SPhilippe Mathieu-Daudé .interfaces = (const InterfaceInfo[]) {
207d09ecd8cSThomas Huth { INTERFACE_CONVENTIONAL_PCI_DEVICE },
208d09ecd8cSThomas Huth { },
209d09ecd8cSThomas Huth },
210d09ecd8cSThomas Huth };
211d09ecd8cSThomas Huth
multi_serial_pci_register_types(void)212d09ecd8cSThomas Huth static void multi_serial_pci_register_types(void)
213d09ecd8cSThomas Huth {
214d09ecd8cSThomas Huth type_register_static(&multi_2x_serial_pci_info);
215d09ecd8cSThomas Huth type_register_static(&multi_4x_serial_pci_info);
216d09ecd8cSThomas Huth }
217d09ecd8cSThomas Huth
218d09ecd8cSThomas Huth type_init(multi_serial_pci_register_types)
219