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Searched refs:TCG_TYPE_I64 (Results 1 – 25 of 25) sorted by relevance

/qemu/tcg/
H A Dtcg-op.c139 tcg_gen_op2(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2)); in tcg_gen_op2_i64()
152 tcg_gen_op3(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), in tcg_gen_op3_i64()
165 tcg_gen_op3(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3); in tcg_gen_op3i_i64()
178 tcg_gen_op3(opc, TCG_TYPE_I64, tcgv_i64_arg(val), in tcg_gen_ldst_op_i64()
192 tcg_gen_op4(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), in tcg_gen_op4_i64()
206 tcg_gen_op4(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), in tcg_gen_op4i_i64()
220 return tcg_gen_op4(opc, TCG_TYPE_I64, in tcg_gen_op4ii_i64()
234 tcg_gen_op5(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), in tcg_gen_op5_i64()
248 tcg_gen_op5(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), in tcg_gen_op5ii_i64()
264 tcg_gen_op6(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2), in tcg_gen_op6i_i64()
[all …]
H A Dtcg.c510 tcg_out_mov(s, TCG_TYPE_I64, dst, src); in tcg_out_movext()
1688 type = TCG_TYPE_I64; in init_call_layout()
1718 case TCG_TYPE_I64: in init_call_layout()
2059 s->nb_indirects += (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64 in tcg_global_mem_new_internal()
2067 if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) { in tcg_global_mem_new_internal()
2071 ts->base_type = TCG_TYPE_I64; in tcg_global_mem_new_internal()
2082 ts2->base_type = TCG_TYPE_I64; in tcg_global_mem_new_internal()
2112 TCGTemp *ts = tcg_global_mem_new_internal(reg, off, name, TCG_TYPE_I64); in tcg_global_mem_new_i64()
2152 case TCG_TYPE_I64: in tcg_temp_new_internal()
2198 return temp_tcgv_i64(tcg_temp_new_internal(TCG_TYPE_I64, TEMP_TB)); in tcg_temp_new_i64()
[all …]
H A Doptimize.c371 case TCG_TYPE_I64: in tcg_opt_gen_mov()
696 case TCG_TYPE_I64: in do_constant_folding_cond()
1112 case TCG_TYPE_I64: in fold_to_not()
1450 case TCG_TYPE_I64: in fold_andc()
1788 case TCG_TYPE_I64: in fold_count_zeros()
1813 case TCG_TYPE_I64: in fold_ctpop()
1917 case TCG_TYPE_I64: in fold_eqv()
2257 case TCG_TYPE_I64: in fold_orc()
2678 case TCG_TYPE_I64: in fold_sub_to_neg()
H A Dtcg-op-ldst.c110 gen_ldst2(INDEX_op_qemu_ld2, TCG_TYPE_I64, in gen_ld_i64()
114 gen_ldst1(INDEX_op_qemu_ld, TCG_TYPE_I64, tcgv_i64_temp(v), addr, oi); in gen_ld_i64()
121 gen_ldst2(INDEX_op_qemu_st2, TCG_TYPE_I64, in gen_st_i64()
125 gen_ldst1(INDEX_op_qemu_st, TCG_TYPE_I64, tcgv_i64_temp(v), addr, oi); in gen_st_i64()
/qemu/tcg/riscv/
H A Dtcg-target-has.h46 if (type == TCG_TYPE_I64 && ofs + len == 32) { in tcg_target_extract_valid()
63 if (type == TCG_TYPE_I64 && ofs + len == 32) { in tcg_target_sextract_valid()
H A Dtcg-target.c.inc765 case TCG_TYPE_I64:
997 case TCG_TYPE_I64:
1036 case TCG_TYPE_I64:
1106 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, arg);
1820 if (type == TCG_TYPE_I64) {
3047 tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
/qemu/tcg/i386/
H A Dtcg-target-has.h86 return type == TCG_TYPE_I64; in tcg_target_sextract_valid()
99 if (type == TCG_TYPE_I64 && ofs + len == 32) { in tcg_target_extract_valid()
H A Dtcg-target.c.inc927 case TCG_TYPE_I64:
1130 case TCG_TYPE_I64:
1204 case TCG_TYPE_I64:
1249 case TCG_TYPE_I64:
1294 if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64) {
2200 if (TCG_TYPE_PTR == TCG_TYPE_I64) {
2202 tlbtype = TCG_TYPE_I64;
2415 tcg_out_vec_to_pair(s, TCG_TYPE_I64, datalo, datahi, TCG_TMP_VEC);
2542 tcg_out_pair_to_vec(s, TCG_TYPE_I64, TCG_TMP_VEC, datalo, datahi);
4771 tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
/qemu/tcg/sparc64/
H A Dtcg-target-has.h16 ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32)
H A Dtcg-target.c.inc469 tcg_out_movi_int(s, TCG_TYPE_I64, ret, test, in_prologue, scratch);
1134 tcg_out_ld(s, TCG_TYPE_I64, TCG_REG_T2, TCG_REG_T1, cmp_off);
1411 if (use_vis3_instructions && type == TCG_TYPE_I64) {
1463 if (use_vis3_instructions && type == TCG_TYPE_I64) {
1523 if (use_popc_instructions && type == TCG_TYPE_I64) {
1697 return (type == TCG_TYPE_I64 && use_vis3_instructions
2116 tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
/qemu/tcg/mips/
H A Dtcg-target-has.h64 return type == TCG_TYPE_I64; in tcg_target_sextract_valid()
H A Dtcg-target.c.inc1308 if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64) {
1368 if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I64 && !sgn) {
2753 tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
/qemu/tcg/loongarch64/
H A Dtcg-target-has.h50 if (type == TCG_TYPE_I64 && ofs + len == 32) { in tcg_target_sextract_valid()
H A Dtcg-target.c.inc317 case TCG_TYPE_I64:
898 case TCG_TYPE_I64:
938 case TCG_TYPE_I64:
1154 if (type == TCG_TYPE_I64) {
2069 tcg_out_addi(s, TCG_TYPE_I64, TCG_REG_TMP0, base, offset);
2128 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, value);
2680 tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
/qemu/tcg/ppc/
H A Dtcg-target-has.h65 if (type == TCG_TYPE_I64 && ofs + len == 32) { in tcg_target_sextract_valid()
H A Dtcg-target.c.inc860 case TCG_TYPE_I64:
1262 case TCG_TYPE_I64:
1368 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_R0, c);
1544 case TCG_TYPE_I64:
1599 case TCG_TYPE_I64:
1741 op |= BF(cr) | ((type == TCG_TYPE_I64) << 21);
1750 if (neg && (TCG_TARGET_REG_BITS == 32 || type == TCG_TYPE_I64)) {
1777 if (!neg && (TCG_TARGET_REG_BITS == 32 || type == TCG_TYPE_I64)) {
1801 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_R0, arg2);
4505 tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
/qemu/tcg/s390x/
H A Dtcg-target-has.h73 return type == TCG_TYPE_I64; in tcg_target_sextract_valid()
H A Dtcg-target.c.inc891 case TCG_TYPE_I64:
1065 case TCG_TYPE_I64:
1098 case TCG_TYPE_I64:
1407 tcg_out_movi(s, TCG_TYPE_I64, dest, 0);
1486 tcg_out_movi(s, TCG_TYPE_I64, dest, 0);
1487 tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, neg ? -1 : 1);
2439 tcg_out_mov(s, TCG_TYPE_I64, dest, TCG_REG_R0);
2448 tgen_movcond_int(s, TCG_TYPE_I64, dest, a2, a2const, TCG_REG_R0, 8, 2);
2465 return type == TCG_TYPE_I64 ? C_O1_I2(r, r, rI) : C_NotImplemented;
2495 tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 0x0101010101010101ull);
[all …]
/qemu/include/tcg/
H A Dtcg.h139 TCG_TYPE_I64, enumerator
153 TCG_TYPE_REG = TCG_TYPE_I64,
160 TCG_TYPE_PTR = TCG_TYPE_I64,
H A Dtcg-op.h22 # define TCG_TYPE_TL TCG_TYPE_I64
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc31 QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1);
1106 case TCG_TYPE_I64:
1144 if (type == TCG_TYPE_I64) {
1221 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, offset);
1222 tcg_out_ldst_r(s, insn, rd, rn, TCG_TYPE_I64, TCG_REG_TMP0);
1232 case TCG_TYPE_I64:
1271 case TCG_TYPE_I64:
1300 case TCG_TYPE_I64:
1321 if (type <= TCG_TYPE_I64 && val == 0) {
1399 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP0, (intptr_t)target);
[all …]
/qemu/tcg/tci/
H A Dtcg-target.c.inc343 case TCG_TYPE_I64:
411 tcg_out_sextract(s, TCG_TYPE_I64, rd, rs, 0, 32);
417 tcg_out_extract(s, TCG_TYPE_I64, rd, rs, 0, 32);
660 tcg_out_extract(s, TCG_TYPE_I64, a0, a1, 32, 32);
1275 tcg_target_available_regs[TCG_TYPE_I64] = BIT(TCG_TARGET_NB_REGS) - 1;
/qemu/accel/tcg/
H A Dtranslate-all.c314 tcg_ctx->addr_type = target_long_bits() == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64; in tb_gen_code()
/qemu/docs/devel/
H A Dtcg-ops.rst111 * ``TCG_TYPE_I64``
114 of variables with ``type=TCG_TYPE_I32`` and ``base_type=TCG_TYPE_I64``.
120 An alias for ``TCG_TYPE_I32`` or ``TCG_TYPE_I64``, depending on the size
125 An alias for ``TCG_TYPE_I32`` or ``TCG_TYPE_I64``, depending on the size
/qemu/target/arm/tcg/
H A Dtranslate-sve.c632 if (tcg_op_supported(INDEX_op_orc, TCG_TYPE_I64, 0)) { in TRANS_FEAT()