1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define target-specific opcode support
4 * Copyright (c) 2018 SiFive, Inc
5 */
6
7 #ifndef TCG_TARGET_HAS_H
8 #define TCG_TARGET_HAS_H
9
10 #include "host/cpuinfo.h"
11
12 /* optional instructions */
13 #define TCG_TARGET_HAS_extr_i64_i32 1
14 #define TCG_TARGET_HAS_qemu_ldst_i128 0
15 #define TCG_TARGET_HAS_tst 0
16
17 /* vector instructions */
18 #define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_ZVE64X)
19 #define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_ZVE64X)
20 #define TCG_TARGET_HAS_v256 (cpuinfo & CPUINFO_ZVE64X)
21 #define TCG_TARGET_HAS_andc_vec 0
22 #define TCG_TARGET_HAS_orc_vec 0
23 #define TCG_TARGET_HAS_nand_vec 0
24 #define TCG_TARGET_HAS_nor_vec 0
25 #define TCG_TARGET_HAS_eqv_vec 0
26 #define TCG_TARGET_HAS_not_vec 1
27 #define TCG_TARGET_HAS_neg_vec 1
28 #define TCG_TARGET_HAS_abs_vec 0
29 #define TCG_TARGET_HAS_roti_vec 1
30 #define TCG_TARGET_HAS_rots_vec 1
31 #define TCG_TARGET_HAS_rotv_vec 1
32 #define TCG_TARGET_HAS_shi_vec 1
33 #define TCG_TARGET_HAS_shs_vec 1
34 #define TCG_TARGET_HAS_shv_vec 1
35 #define TCG_TARGET_HAS_mul_vec 1
36 #define TCG_TARGET_HAS_sat_vec 1
37 #define TCG_TARGET_HAS_minmax_vec 1
38 #define TCG_TARGET_HAS_bitsel_vec 0
39 #define TCG_TARGET_HAS_cmpsel_vec 1
40
41 #define TCG_TARGET_HAS_tst_vec 0
42
43 static inline bool
tcg_target_extract_valid(TCGType type,unsigned ofs,unsigned len)44 tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len)
45 {
46 if (type == TCG_TYPE_I64 && ofs + len == 32) {
47 /* ofs > 0 uses SRLIW; ofs == 0 uses add.uw. */
48 return ofs || (cpuinfo & CPUINFO_ZBA);
49 }
50 switch (len) {
51 case 1:
52 return (cpuinfo & CPUINFO_ZBS) && ofs != 0;
53 case 16:
54 return (cpuinfo & CPUINFO_ZBB) && ofs == 0;
55 }
56 return false;
57 }
58 #define TCG_TARGET_extract_valid tcg_target_extract_valid
59
60 static inline bool
tcg_target_sextract_valid(TCGType type,unsigned ofs,unsigned len)61 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
62 {
63 if (type == TCG_TYPE_I64 && ofs + len == 32) {
64 return true;
65 }
66 return (cpuinfo & CPUINFO_ZBB) && ofs == 0 && (len == 8 || len == 16);
67 }
68 #define TCG_TARGET_sextract_valid tcg_target_sextract_valid
69
70 #define TCG_TARGET_deposit_valid(type, ofs, len) 0
71
72 #endif
73