xref: /qemu/tcg/ppc/tcg-target-has.h (revision ffd642cb2ca25262342311a3bf2e8a77a00e6dfd)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific opcode support
4  * Copyright (c) 2008 Fabrice Bellard
5  */
6 
7 #ifndef TCG_TARGET_HAS_H
8 #define TCG_TARGET_HAS_H
9 
10 #include "host/cpuinfo.h"
11 
12 #define have_isa_2_06  (cpuinfo & CPUINFO_V2_06)
13 #define have_isa_2_07  (cpuinfo & CPUINFO_V2_07)
14 #define have_isa_3_00  (cpuinfo & CPUINFO_V3_0)
15 #define have_isa_3_10  (cpuinfo & CPUINFO_V3_1)
16 #define have_altivec   (cpuinfo & CPUINFO_ALTIVEC)
17 #define have_vsx       (cpuinfo & CPUINFO_VSX)
18 
19 /* optional instructions */
20 #if TCG_TARGET_REG_BITS == 64
21 #define TCG_TARGET_HAS_extr_i64_i32     0
22 #endif
23 
24 #define TCG_TARGET_HAS_qemu_ldst_i128   \
25     (TCG_TARGET_REG_BITS == 64 && have_isa_2_07)
26 
27 #define TCG_TARGET_HAS_tst              1
28 
29 /*
30  * While technically Altivec could support V64, it has no 64-bit store
31  * instruction and substituting two 32-bit stores makes the generated
32  * code quite large.
33  */
34 #define TCG_TARGET_HAS_v64              have_vsx
35 #define TCG_TARGET_HAS_v128             have_altivec
36 #define TCG_TARGET_HAS_v256             0
37 
38 #define TCG_TARGET_HAS_andc_vec         1
39 #define TCG_TARGET_HAS_orc_vec          have_isa_2_07
40 #define TCG_TARGET_HAS_nand_vec         have_isa_2_07
41 #define TCG_TARGET_HAS_nor_vec          1
42 #define TCG_TARGET_HAS_eqv_vec          have_isa_2_07
43 #define TCG_TARGET_HAS_not_vec          1
44 #define TCG_TARGET_HAS_neg_vec          have_isa_3_00
45 #define TCG_TARGET_HAS_abs_vec          0
46 #define TCG_TARGET_HAS_roti_vec         0
47 #define TCG_TARGET_HAS_rots_vec         0
48 #define TCG_TARGET_HAS_rotv_vec         1
49 #define TCG_TARGET_HAS_shi_vec          0
50 #define TCG_TARGET_HAS_shs_vec          0
51 #define TCG_TARGET_HAS_shv_vec          1
52 #define TCG_TARGET_HAS_mul_vec          1
53 #define TCG_TARGET_HAS_sat_vec          1
54 #define TCG_TARGET_HAS_minmax_vec       1
55 #define TCG_TARGET_HAS_bitsel_vec       have_vsx
56 #define TCG_TARGET_HAS_cmpsel_vec       1
57 #define TCG_TARGET_HAS_tst_vec          0
58 
59 #define TCG_TARGET_extract_valid(type, ofs, len)   1
60 #define TCG_TARGET_deposit_valid(type, ofs, len)   1
61 
62 static inline bool
tcg_target_sextract_valid(TCGType type,unsigned ofs,unsigned len)63 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
64 {
65     if (type == TCG_TYPE_I64 && ofs + len == 32) {
66         return true;
67     }
68     return ofs == 0 && (len == 8 || len == 16);
69 }
70 #define TCG_TARGET_sextract_valid  tcg_target_sextract_valid
71 
72 #endif
73