Home
last modified time | relevance | path

Searched refs:IRQ_M_TIMER (Results 1 – 7 of 7) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h743 #define IRQ_M_TIMER 7 macro
765 #define MIP_MTIP (1 << IRQ_M_TIMER)
H A Dcpu.c1027 case IRQ_M_TIMER: in riscv_cpu_set_irq()
/qemu/hw/riscv/
H A Dspike.c137 clint_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_M_TIMER); in create_fdt()
H A Dopentitan.c231 IRQ_M_TIMER)); in lowrisc_ibex_soc_realize()
H A Dvirt.c339 clint_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_M_TIMER); in create_fdt_socket_clint()
377 aclint_mtimer_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_M_TIMER); in create_fdt_socket_aclint()
H A Dsifive_u.c206 cells[cpu * 4 + 3] = cpu_to_be32(IRQ_M_TIMER); in create_fdt()
/qemu/hw/intc/
H A Driscv_aclint.c396 qdev_get_gpio_in(DEVICE(rvcpu), IRQ_M_TIMER)); in riscv_aclint_mtimer_create()