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Searched refs:IRQ_M_EXT (Results 1 – 10 of 10) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h747 #define IRQ_M_EXT 11 macro
769 #define MIP_MEIP (1 << IRQ_M_EXT)
H A Dcpu_helper.c394 if (!((extirq == IRQ_M_EXT) ? riscv_cpu_cfg(env)->ext_smaia : in riscv_cpu_pending_to_irq()
440 return riscv_cpu_pending_to_irq(env, IRQ_M_EXT, IPRIO_DEFAULT_M, in riscv_cpu_mirq_pending()
507 return riscv_cpu_pending_to_irq(env, IRQ_M_EXT, IPRIO_DEFAULT_M, in riscv_cpu_local_irq_pending()
H A Dcpu.c733 env->miprio[i] = (i == IRQ_M_EXT) ? 0 : iprio; in riscv_cpu_reset_hold()
1030 case IRQ_M_EXT: in riscv_cpu_set_irq()
H A Dcsr.c2675 (priv == PRV_M) ? IRQ_M_EXT : IRQ_S_EXT); in rmw_xireg_aia()
/qemu/hw/riscv/
H A Dopentitan.c200 qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); in lowrisc_ibex_soc_realize()
H A Dsifive_u.c257 cells[1] = cpu_to_be32(IRQ_M_EXT); in create_fdt()
260 cells[cpu * 4 - 1] = cpu_to_be32(IRQ_M_EXT); in create_fdt()
H A Dvirt.c487 plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT); in create_fdt_socket_plic()
544 imsic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); in create_fdt_one_imsic()
639 aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT : IRQ_S_EXT); in create_fdt_one_aplic()
/qemu/hw/intc/
H A Driscv_imsic.c475 (mmode) ? IRQ_M_EXT : IRQ_S_EXT)); in type_init()
H A Dsifive_plic.c512 qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); in type_init()
H A Driscv_aplic.c1082 (mmode) ? IRQ_M_EXT : IRQ_S_EXT)); in riscv_aplic_create()