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/linux/crypto/
H A Dsha3_generic.c47 static SHA3_INLINE void keccakf_round(u64 st[25]) in keccakf_round()
52 bc[0] = st[0] ^ st[5] ^ st[10] ^ st[15] ^ st[20]; in keccakf_round()
53 bc[1] = st[1] ^ st[6] ^ st[11] ^ st[16] ^ st[21]; in keccakf_round()
54 bc[2] = st[2] ^ st[7] ^ st[12] ^ st[17] ^ st[22]; in keccakf_round()
55 bc[3] = st[3] ^ st[8] ^ st[13] ^ st[18] ^ st[23]; in keccakf_round()
56 bc[4] = st[4] ^ st[9] ^ st[14] ^ st[19] ^ st[24]; in keccakf_round()
64 st[0] ^= t[0]; in keccakf_round()
67 tt = st[1]; in keccakf_round()
68 st[ 1] = rol64(st[ 6] ^ t[1], 44); in keccakf_round()
69 st[ 6] = rol64(st[ 9] ^ t[4], 20); in keccakf_round()
[all …]
/linux/drivers/iio/dac/
H A Dad5592r-base.c26 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_get() local
30 scoped_guard(mutex, &st->gpio_lock) { in ad5592r_gpio_get()
31 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
32 val = st->gpio_val; in ad5592r_gpio_get()
34 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
46 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_set() local
48 guard(mutex)(&st->gpio_lock); in ad5592r_gpio_set()
51 st->gpio_val |= BIT(offset); in ad5592r_gpio_set()
53 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_set()
55 return st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_gpio_set()
[all …]
H A Dad3552r-hs.c72 static int ad3552r_hs_reg_read(struct ad3552r_hs_state *st, u32 reg, u32 *val, in ad3552r_hs_reg_read() argument
76 WARN_ON_ONCE(st->config_d & AD3552R_MASK_SPI_CONFIG_DDR); in ad3552r_hs_reg_read()
78 return st->data->bus_reg_read(st->back, reg, val, xfer_size); in ad3552r_hs_reg_read()
81 static int ad3552r_hs_set_data_source(struct ad3552r_hs_state *st, in ad3552r_hs_set_data_source() argument
86 for (i = 0; i < st->model_data->num_hw_channels; ++i) { in ad3552r_hs_set_data_source()
87 ret = iio_backend_data_source_set(st->back, i, type); in ad3552r_hs_set_data_source()
95 static int ad3552r_hs_update_reg_bits(struct ad3552r_hs_state *st, u32 reg, in ad3552r_hs_update_reg_bits() argument
101 ret = ad3552r_hs_reg_read(st, reg, &rval, xfer_size); in ad3552r_hs_update_reg_bits()
107 return st->data->bus_reg_write(st->back, reg, rval, xfer_size); in ad3552r_hs_update_reg_bits()
114 struct ad3552r_hs_state *st = iio_priv(indio_dev); in ad3552r_hs_read_raw() local
[all …]
H A Dad5758.c186 static int ad5758_spi_reg_read(struct ad5758_state *st, unsigned int addr) in ad5758_spi_reg_read() argument
190 .tx_buf = &st->d32[0], in ad5758_spi_reg_read()
194 .tx_buf = &st->d32[1], in ad5758_spi_reg_read()
195 .rx_buf = &st->d32[2], in ad5758_spi_reg_read()
201 st->d32[0] = cpu_to_be32( in ad5758_spi_reg_read()
204 st->d32[1] = cpu_to_be32(AD5758_WR_FLAG_MSK(AD5758_NOP) << 24); in ad5758_spi_reg_read()
206 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); in ad5758_spi_reg_read()
210 return (be32_to_cpu(st->d32[2]) >> 8) & 0xFFFF; in ad5758_spi_reg_read()
213 static int ad5758_spi_reg_write(struct ad5758_state *st, in ad5758_spi_reg_write() argument
217 st->d32[0] = cpu_to_be32((AD5758_WR_FLAG_MSK(addr) << 24) | in ad5758_spi_reg_write()
[all …]
/linux/drivers/macintosh/
H A Dwindfarm_pid.c25 void wf_pid_init(struct wf_pid_state *st, struct wf_pid_param *param) in wf_pid_init() argument
27 memset(st, 0, sizeof(struct wf_pid_state)); in wf_pid_init()
28 st->param = *param; in wf_pid_init()
29 st->first = 1; in wf_pid_init()
33 s32 wf_pid_run(struct wf_pid_state *st, s32 new_sample) in wf_pid_run() argument
37 int i, hlen = st->param.history_len; in wf_pid_run()
40 error = new_sample - st->param.itarget; in wf_pid_run()
43 if (st->first) { in wf_pid_run()
45 st->samples[i] = new_sample; in wf_pid_run()
46 st->errors[i] = error; in wf_pid_run()
[all …]
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_private_obj.c11 komeda_component_state_reset(struct komeda_component_state *st) in komeda_component_state_reset() argument
13 st->binding_user = NULL; in komeda_component_state_reset()
14 st->affected_inputs = st->active_inputs; in komeda_component_state_reset()
15 st->active_inputs = 0; in komeda_component_state_reset()
16 st->changed_active_inputs = 0; in komeda_component_state_reset()
22 struct komeda_layer_state *st; in komeda_layer_atomic_duplicate_state() local
24 st = kmemdup(obj->state, sizeof(*st), GFP_KERNEL); in komeda_layer_atomic_duplicate_state()
25 if (!st) in komeda_layer_atomic_duplicate_state()
28 komeda_component_state_reset(&st->base); in komeda_layer_atomic_duplicate_state()
29 __drm_atomic_helper_private_obj_duplicate_state(obj, &st->base.obj); in komeda_layer_atomic_duplicate_state()
[all …]
/linux/drivers/iio/adc/
H A Dat91-sama5d2_adc.c441 #define at91_adc_readl(st, reg) \ argument
442 readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
443 #define at91_adc_read_chan(st, reg) \ argument
444 readl_relaxed((st)->base + reg)
445 #define at91_adc_writel(st, reg, val) \ argument
446 writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
781 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_active_scan_mask_to_reg() local
790 return mask & GENMASK(st->soc_info.platform->nr_channels, 0); in at91_adc_active_scan_mask_to_reg()
793 static void at91_adc_cor(struct at91_adc_state *st, in at91_adc_cor() argument
800 cur_cor = at91_adc_readl(st, COR); in at91_adc_cor()
[all …]
H A Dad7625.c176 static int ad7625_set_sampling_freq(struct ad7625_state *st, u32 freq) in ad7625_set_sampling_freq() argument
189 cnv_wf.duty_length_ns = st->info->timing_spec->conv_high_ns; in ad7625_set_sampling_freq()
191 ret = pwm_round_waveform_might_sleep(st->cnv_pwm, &cnv_wf); in ad7625_set_sampling_freq()
202 st->info->chan_spec.scan_type.realbits, in ad7625_set_sampling_freq()
203 st->ref_clk_rate_hz); in ad7625_set_sampling_freq()
206 clk_gate_wf.duty_offset_ns = st->info->timing_spec->conv_msb_ns; in ad7625_set_sampling_freq()
208 ret = pwm_round_waveform_might_sleep(st->clk_gate_pwm, &clk_gate_wf); in ad7625_set_sampling_freq()
212 st->cnv_wf = cnv_wf; in ad7625_set_sampling_freq()
213 st->clk_gate_wf = clk_gate_wf; in ad7625_set_sampling_freq()
216 target = DIV_ROUND_CLOSEST(st->ref_clk_rate_hz, freq); in ad7625_set_sampling_freq()
[all …]
H A Dat91_adc.c136 #define AT91_ADC_CHAN(st, ch) \ argument
137 (st->registers->channel_base + (ch * 4))
138 #define at91_adc_readl(st, reg) \ argument
139 (readl_relaxed(st->reg_base + reg))
140 #define at91_adc_writel(st, reg, val) \ argument
141 (writel_relaxed(val, st->reg_base + reg))
268 struct at91_adc_state *st = iio_priv(idev); in at91_adc_trigger_handler() local
274 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel)); in at91_adc_trigger_handler()
278 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp); in at91_adc_trigger_handler()
283 at91_adc_readl(st, AT91_ADC_LCDR); in at91_adc_trigger_handler()
[all …]
H A Dad7606.c276 int ad7606_reset(struct ad7606_state *st) in ad7606_reset() argument
278 if (st->gpio_reset) { in ad7606_reset()
279 gpiod_set_value(st->gpio_reset, 1); in ad7606_reset()
281 gpiod_set_value(st->gpio_reset, 0); in ad7606_reset()
292 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_16bit_chan_scale_setup() local
293 struct ad7606_chan_info *ci = &st->chan_info[chan->scan_index]; in ad7606_16bit_chan_scale_setup()
295 if (!st->sw_mode_en) { in ad7606_16bit_chan_scale_setup()
315 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_get_chan_config() local
317 unsigned int num_channels = st->chip_info->num_adc_channels; in ad7606_get_chan_config()
318 struct device *dev = st->dev; in ad7606_get_chan_config()
[all …]
H A Dad7887.c83 struct ad7887_state *st = iio_priv(indio_dev); in ad7887_ring_preenable() local
88 st->ring_msg = &st->msg[AD7887_CH0]; in ad7887_ring_preenable()
91 st->ring_msg = &st->msg[AD7887_CH1]; in ad7887_ring_preenable()
93 spi_sync(st->spi, st->ring_msg); in ad7887_ring_preenable()
96 st->ring_msg = &st->msg[AD7887_CH0_CH1]; in ad7887_ring_preenable()
105 struct ad7887_state *st = iio_priv(indio_dev); in ad7887_ring_postdisable() local
108 return spi_sync(st->spi, &st->msg[AD7887_CH0]); in ad7887_ring_postdisable()
115 struct ad7887_state *st = iio_priv(indio_dev); in ad7887_trigger_handler() local
118 b_sent = spi_sync(st->spi, st->ring_msg); in ad7887_trigger_handler()
122 iio_push_to_buffers_with_timestamp(indio_dev, st->data, in ad7887_trigger_handler()
[all …]
H A Dti-ads7950.c60 #define TI_ADS7950_MAN_CMD_SETTINGS(st) \ argument
61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
63 #define TI_ADS7950_GPIO_CMD_SETTINGS(st) \ argument
64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
286 struct ti_ads7950_state *st = iio_priv(indio_dev); in ti_ads7950_update_scan_mode() local
292 st->tx_buf[len++] = cmd; in ti_ads7950_update_scan_mode()
296 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
297 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
299 st->ring_xfer.len = len * 2; in ti_ads7950_update_scan_mode()
308 struct ti_ads7950_state *st = iio_priv(indio_dev); in ti_ads7950_trigger_handler() local
[all …]
H A Dad7298.c106 struct ad7298_state *st = iio_priv(indio_dev); in ad7298_update_scan_mode() local
115 command = AD7298_WRITE | st->ext_ref; in ad7298_update_scan_mode()
121 st->tx_buf[0] = cpu_to_be16(command); in ad7298_update_scan_mode()
124 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7298_update_scan_mode()
125 st->ring_xfer[0].len = 2; in ad7298_update_scan_mode()
126 st->ring_xfer[0].cs_change = 1; in ad7298_update_scan_mode()
127 st->ring_xfer[1].tx_buf = &st->tx_buf[1]; in ad7298_update_scan_mode()
128 st->ring_xfer[1].len = 2; in ad7298_update_scan_mode()
129 st->ring_xfer[1].cs_change = 1; in ad7298_update_scan_mode()
131 spi_message_init(&st->ring_msg); in ad7298_update_scan_mode()
[all …]
H A Dad7192.c232 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_set_syscalib_mode() local
234 st->syscalib_mode[chan->channel] = mode; in ad7192_set_syscalib_mode()
242 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_get_syscalib_mode() local
244 return st->syscalib_mode[chan->channel]; in ad7192_get_syscalib_mode()
252 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_write_syscalib() local
263 temp = st->syscalib_mode[chan->channel]; in ad7192_write_syscalib()
266 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_ZERO, in ad7192_write_syscalib()
269 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_FULL, in ad7192_write_syscalib()
305 struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); in ad7192_set_channel() local
307 st->conf &= ~AD7192_CONF_CHAN_MASK; in ad7192_set_channel()
[all …]
/linux/drivers/iio/accel/
H A Dsca3000.c277 static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val) in sca3000_write_reg() argument
279 st->tx[0] = SCA3000_WRITE_REG(address); in sca3000_write_reg()
280 st->tx[1] = val; in sca3000_write_reg()
281 return spi_write(st->us, st->tx, 2); in sca3000_write_reg()
284 static int sca3000_read_data_short(struct sca3000_state *st, in sca3000_read_data_short() argument
291 .tx_buf = st->tx, in sca3000_read_data_short()
294 .rx_buf = st->rx, in sca3000_read_data_short()
297 st->tx[0] = SCA3000_READ_REG(reg_address_high); in sca3000_read_data_short()
299 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); in sca3000_read_data_short()
308 static int sca3000_reg_lock_on(struct sca3000_state *st) in sca3000_reg_lock_on() argument
[all …]
H A Dadxl380.c268 static int adxl380_set_measure_en(struct adxl380_state *st, bool en) in adxl380_set_measure_en() argument
275 ret = regmap_read(st->regmap, ADXL380_ACT_INACT_CTL_REG, &act_inact_ctl); in adxl380_set_measure_en()
287 return regmap_update_bits(st->regmap, ADXL380_OP_MODE_REG, in adxl380_set_measure_en()
292 static void adxl380_scale_act_inact_thresholds(struct adxl380_state *st, in adxl380_scale_act_inact_thresholds() argument
296 st->act_threshold = mult_frac(st->act_threshold, in adxl380_scale_act_inact_thresholds()
299 st->inact_threshold = mult_frac(st->inact_threshold, in adxl380_scale_act_inact_thresholds()
304 static int adxl380_write_act_inact_threshold(struct adxl380_state *st, in adxl380_write_act_inact_threshold() argument
314 ret = regmap_write(st->regmap, reg + 1, th & GENMASK(7, 0)); in adxl380_write_act_inact_threshold()
318 ret = regmap_update_bits(st->regmap, reg, GENMASK(2, 0), th >> 8); in adxl380_write_act_inact_threshold()
323 st->act_threshold = th; in adxl380_write_act_inact_threshold()
[all …]
/linux/drivers/iio/frequency/
H A Dadf4350.c79 static int adf4350_sync_config(struct adf4350_state *st) in adf4350_sync_config() argument
84 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
93 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
94 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
97 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
98 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
99 i, (u32)st->regs[i] | i); in adf4350_sync_config()
109 struct adf4350_state *st = iio_priv(indio_dev); in adf4350_reg_access() local
115 mutex_lock(&st->lock); in adf4350_reg_access()
117 st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2)); in adf4350_reg_access()
[all …]
H A Dadf4377.c479 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_reg_access() local
482 return regmap_read(st->regmap, reg, read_val); in adf4377_reg_access()
484 return regmap_write(st->regmap, reg, write_val); in adf4377_reg_access()
491 static int adf4377_soft_reset(struct adf4377_state *st) in adf4377_soft_reset() argument
496 ret = regmap_update_bits(st->regmap, 0x0, ADF4377_0000_SOFT_RESET_MSK | in adf4377_soft_reset()
503 return regmap_read_poll_timeout(st->regmap, 0x0, read_val, in adf4377_soft_reset()
508 static int adf4377_get_freq(struct adf4377_state *st, u64 *freq) in adf4377_get_freq() argument
514 mutex_lock(&st->lock); in adf4377_get_freq()
515 ret = regmap_read(st->regmap, 0x12, &ref_div_factor); in adf4377_get_freq()
519 ret = regmap_bulk_read(st->regmap, 0x10, st->buf, sizeof(st->buf)); in adf4377_get_freq()
[all …]
/linux/drivers/hwmon/
H A Dltc4282.c161 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_set_rate() local
168 return regmap_update_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK, in ltc4282_set_rate()
194 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_recalc_rate() local
199 ret = regmap_read(st->map, LTC4282_CLK_DIV, &clkdiv); in ltc4282_recalc_rate()
214 struct ltc4282_state *st = container_of(clk_hw, struct ltc4282_state, in ltc4282_disable() local
217 regmap_clear_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK); in ltc4282_disable()
220 static int ltc4282_read_voltage_word(const struct ltc4282_state *st, u32 reg, in ltc4282_read_voltage_word() argument
226 ret = regmap_bulk_read(st->map, reg, &in, sizeof(in)); in ltc4282_read_voltage_word()
238 static int ltc4282_read_voltage_byte_cached(const struct ltc4282_state *st, in ltc4282_read_voltage_byte_cached() argument
248 ret = regmap_read(st->map, reg, &in); in ltc4282_read_voltage_byte_cached()
[all …]
/linux/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_trigger.c15 struct inv_mpu6050_state *st = iio_priv(indio_dev); in inv_scan_query_mpu6050() local
24 st->chip_config.temp_fifo_enable = true; in inv_scan_query_mpu6050()
28 st->chip_config.gyro_fifo_enable = in inv_scan_query_mpu6050()
36 st->chip_config.accl_fifo_enable = in inv_scan_query_mpu6050()
44 st->chip_config.temp_fifo_enable = in inv_scan_query_mpu6050()
48 if (st->chip_config.gyro_fifo_enable) in inv_scan_query_mpu6050()
50 if (st->chip_config.accl_fifo_enable) in inv_scan_query_mpu6050()
52 if (st->chip_config.temp_fifo_enable) in inv_scan_query_mpu6050()
60 struct inv_mpu6050_state *st = iio_priv(indio_dev); in inv_scan_query_mpu9x50() local
66 if (st->magn_disabled) in inv_scan_query_mpu9x50()
[all …]
/linux/drivers/iio/addac/
H A Dad74413r.c175 struct ad74413r_state *st = context; in ad74413r_reg_write() local
177 ad74413r_format_reg_write(reg, val, st->reg_tx_buf); in ad74413r_reg_write()
179 return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE); in ad74413r_reg_write()
182 static int ad74413r_crc_check(struct ad74413r_state *st, u8 *buf) in ad74413r_crc_check() argument
187 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n", in ad74413r_crc_check()
197 struct ad74413r_state *st = context; in ad74413r_reg_read() local
200 .tx_buf = st->reg_tx_buf, in ad74413r_reg_read()
205 .rx_buf = st->reg_rx_buf, in ad74413r_reg_read()
212 st->reg_tx_buf); in ad74413r_reg_read()
214 ret = spi_sync_transfer(st->spi, reg_read_xfer, in ad74413r_reg_read()
[all …]
/linux/drivers/staging/iio/frequency/
H A Dad9834.c109 static int ad9834_write_frequency(struct ad9834_state *st, in ad9834_write_frequency() argument
115 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
122 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
124 st->freq_data[1] = cpu_to_be16(addr | ((regval >> in ad9834_write_frequency()
128 return spi_sync(st->spi, &st->freq_msg); in ad9834_write_frequency()
131 static int ad9834_write_phase(struct ad9834_state *st, in ad9834_write_phase() argument
136 st->data = cpu_to_be16(addr | phase); in ad9834_write_phase()
138 return spi_sync(st->spi, &st->msg); in ad9834_write_phase()
147 struct ad9834_state *st = iio_priv(indio_dev); in ad9834_write() local
156 mutex_lock(&st->lock); in ad9834_write()
[all …]
H A Dad9832.c128 static int ad9832_write_frequency(struct ad9832_state *st, in ad9832_write_frequency() argument
136 clk_freq = clk_get_rate(st->mclk); in ad9832_write_frequency()
147 st->freq_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, freq_cmd) | in ad9832_write_frequency()
152 return spi_sync(st->spi, &st->freq_msg); in ad9832_write_frequency()
155 static int ad9832_write_phase(struct ad9832_state *st, in ad9832_write_phase() argument
169 st->phase_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, phase_cmd) | in ad9832_write_phase()
174 return spi_sync(st->spi, &st->phase_msg); in ad9832_write_phase()
181 struct ad9832_state *st = iio_priv(indio_dev); in ad9832_write() local
190 mutex_lock(&st->lock); in ad9832_write()
194 ret = ad9832_write_frequency(st, this_attr->address, val); in ad9832_write()
[all …]
/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_core.c186 const struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_get_mount_matrix() local
188 return &st->orientation; in inv_icm42600_get_mount_matrix()
227 static int inv_icm42600_set_pwr_mgmt0(struct inv_icm42600_state *st, in inv_icm42600_set_pwr_mgmt0() argument
232 enum inv_icm42600_sensor_mode oldgyro = st->conf.gyro.mode; in inv_icm42600_set_pwr_mgmt0()
233 enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; in inv_icm42600_set_pwr_mgmt0()
234 bool oldtemp = st->conf.temp_en; in inv_icm42600_set_pwr_mgmt0()
247 ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val); in inv_icm42600_set_pwr_mgmt0()
251 st->conf.gyro.mode = gyro; in inv_icm42600_set_pwr_mgmt0()
252 st->conf.accel.mode = accel; in inv_icm42600_set_pwr_mgmt0()
253 st->conf.temp_en = temp; in inv_icm42600_set_pwr_mgmt0()
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H A Dinv_icm42600_buffer.c102 void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st) in inv_icm42600_buffer_update_fifo_period() argument
106 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
107 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
111 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
112 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
116 st->fifo.period = min(period_gyro, period_accel); in inv_icm42600_buffer_update_fifo_period()
119 int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, in inv_icm42600_buffer_set_fifo_en() argument
139 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
143 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
144 inv_icm42600_buffer_update_fifo_period(st); in inv_icm42600_buffer_set_fifo_en()
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