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Searched refs:GICD_CTLR (Results 1 – 5 of 5) sorted by relevance

/kvm-unit-tests/arm/
H A Dmicro-bench.c111 val = readl(vgic_dist_base + GICD_CTLR); in ipi_prep()
116 writel(val, vgic_dist_base + GICD_CTLR); in ipi_prep()
120 writel(val, vgic_dist_base + GICD_CTLR); in ipi_prep()
133 val = readl(vgic_dist_base + GICD_CTLR); in ipi_hw_prep()
138 writel(val, vgic_dist_base + GICD_CTLR); in ipi_hw_prep()
142 writel(val, vgic_dist_base + GICD_CTLR); in ipi_hw_prep()
/kvm-unit-tests/lib/arm/asm/
H A Dgic-v3.h21 #define GICD_CTLR 0x0000 macro
47 #define GICR_CTLR GICD_CTLR
110 while (readl(base + GICD_CTLR) & GICD_CTLR_RWP) { in gicv3_do_wait_for_rwp()
H A Dgic.h13 #define GICD_CTLR 0x0000 macro
/kvm-unit-tests/lib/arm/
H A Dgic-v3.c43 writel(0, dist + GICD_CTLR); in gicv3_enable_defaults()
47 dist + GICD_CTLR); in gicv3_enable_defaults()
H A Dgic-v2.c23 writel(GICD_ENABLE, dist + GICD_CTLR); in gicv2_enable_defaults()