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/qemu/include/accel/tcg/
H A Dcpu-ops.h04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/arm/tcg/
H A Dcpu-v7m.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/i386/tcg/
H A Dtcg-cpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/hexagon/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/alpha/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/rx/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/avr/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/tricore/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/sh4/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/openrisc/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/xtensa/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/hppa/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/m68k/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/ppc/
H A Dcpu_init.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/microblaze/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/riscv/tcg/
H A Dtcg-cpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/loongarch/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/sparc/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/mips/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/s390x/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
/qemu/target/arm/
H A Dcpu.c04583ce7e032ee8e0a12756b69dc67ad7b399997 Fri Mar 21 18:01:52 UTC 2025 Philippe Mathieu-Daudé <philmd@linaro.org> tcg: Define guest_default_memory_order in TCGCPUOps

Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>