| /linux-3.3/drivers/tty/serial/ |
| D | ifx6x60.c | 3 * Driver for the IFX 6x60 spi modem.
24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
32 * o The driver is intended to be big-endian safe but has never been
35 * o Some of the GPIO naming/setup assumptions may need revisiting if
39 #include <linux/dma-mapping.h>
44 #include <linux/spi/spi.h>
55 #include <linux/gpio.h>
61 #include <linux/spi/ifx_modem.h>
72 #define IFX_SPI_HEADER_0 (-1)
73 #define IFX_SPI_HEADER_F (-2)
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| D | max3107.h | 2 * max3107.h - spi uart protocol driver header for Maxim 3107
24 /* GPIO definitions */
29 /* GPIO connected to chip's reset pin */
47 /* Definitions for register access with SPI transfers
49 * SPI transfer format:
62 /* SPI speed */
68 /* SPI TX data mask */
71 /* SPI RX data mask */
100 #define MAX3107_GPIOCFG_REG (0x1800) /* GPIO config */
101 #define MAX3107_GPIODATA_REG (0x1900) /* GPIO data */
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| /linux-3.3/drivers/spi/ |
| D | spi-ath79.c | 2 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
4 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
6 * This driver has been based on the spi-gpio.c:
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_bitbang.h>
26 #include <linux/gpio.h>
28 #include <asm/mach-ath79/ar71xx_regs.h>
29 #include <asm/mach-ath79/ath79_spi_platform.h>
31 #define DRV_NAME "ath79-spi"
42 return ioread32(sp->base + reg); in ath79_spi_rr()
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| D | Kconfig | 2 # SPI driver configuration
4 # NOTE: the reason this doesn't show SPI slave support is mostly that
5 # nobody's needed a slave side API yet. The master-role API is not
8 menuconfig SPI config
9 bool "SPI support"
13 protocol. Chips that support SPI can have data transfer rates
15 controller and a chipselect. Most SPI slaves don't support
16 dynamic device discovery; some are even write-only or read-only.
18 SPI is widely used by microcontrollers to talk with sensors,
20 chips, analog to digital (and d-to-a) converters, and more.
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| D | spi-gpio.c | 2 * SPI master driver using generic bitbanged GPIO
24 #include <linux/gpio.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi_bitbang.h>
28 #include <linux/spi/spi_gpio.h>
32 * This bitbanging SPI master driver should help make systems usable
33 * when a native hardware SPI engine is not available, perhaps because
37 * platform_device->driver_data ... points to spi_gpio
39 * spi->controller_state ... reserved for bitbang framework code
40 * spi->controller_data ... holds chipselect GPIO
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| D | spi-ppc4xx.c | 2 * SPI_PPC4XX SPI controller driver.
8 * Based in part on drivers/spi/spi_s3c24xx.c
20 * The PPC4xx SPI controller has no FIFO so each sent/received byte will
23 * during SPI transfers by setting max_speed_hz via the device tree.
38 #include <linux/gpio.h>
39 #include <linux/spi/spi.h>
40 #include <linux/spi/spi_bitbang.h>
44 #include <asm/dcr-regs.h>
46 /* bits in mode register - bit 0 is MSb */
59 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
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| D | spi-fsl-spi.c | 2 * Freescale SPI controller driver.
9 * CPM SPI and QE buffer descriptors mode support:
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_bitbang.h>
28 #include <linux/dma-mapping.h>
33 #include <linux/gpio.h>
40 #include "spi-fsl-lib.h"
51 /* SPI Controller registers */
62 /* SPI Controller mode register definitions */
76 * Default for SPI Mode:
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| /linux-3.3/drivers/video/backlight/ |
| D | l4f00242t03.c | 2 * l4f00242t03.c -- support for Epson L4F00242T03 LCD
4 * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
18 #include <linux/gpio.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/l4f00242t03.h>
27 struct spi_device *spi; member
35 static void l4f00242t03_reset(unsigned int gpio) in l4f00242t03_reset() argument
38 gpio_set_value(gpio, 1); in l4f00242t03_reset()
40 gpio_set_value(gpio, 0); in l4f00242t03_reset()
42 gpio_set_value(gpio, 1); in l4f00242t03_reset()
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| D | lms283gf05.c | 2 * lms283gf05.c -- support for Samsung LMS283GF05 LCD
15 #include <linux/gpio.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/lms283gf05.h>
23 struct spi_device *spi; member
96 static void lms283gf05_reset(unsigned long gpio, bool inverted) in lms283gf05_reset() argument
98 gpio_set_value(gpio, !inverted); in lms283gf05_reset()
100 gpio_set_value(gpio, inverted); in lms283gf05_reset()
102 gpio_set_value(gpio, !inverted); in lms283gf05_reset()
106 static void lms283gf05_toggle(struct spi_device *spi, in lms283gf05_toggle() argument
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| /linux-3.3/arch/arm/include/asm/hardware/ |
| D | locomo.h | 53 #define LOCOMO_DAC_SDA 0x02 /* SDA pin level (read-only) */
56 /* SPI interface */
58 #define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59 #define LOCOMO_SPICT 0x04 /* SPI mode control */
60 #define LOCOMO_SPIST 0x08 /* SPI status */
66 #define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
67 #define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
68 #define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
69 #define LOCOMO_SPIIR 0x1c /* SPI interrupt request */
70 #define LOCOMO_SPITD 0x20 /* SPI transfer data write */
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| /linux-3.3/Documentation/blackfin/ |
| D | bfin-spi-notes.txt | 1 SPI Chip Select behavior:
3 With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA
5 controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that
7 the entire SPI transfer. - And not just bits_per_word duration.
9 In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this
10 behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2
11 timing, you can utilize the GPIO controlled SPI Slave Select option instead.
12 In this case, you should use GPIO based CS for all of your slaves and not just
16 but use it as a GPIO instead.
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| /linux-3.3/drivers/gpio/ |
| D | gpio-74x164.c | 2 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
14 #include <linux/spi/spi.h>
15 #include <linux/spi/74x164.h>
16 #include <linux/gpio.h>
21 struct spi_device *spi; member
34 return spi_write(chip->spi, in __gen_74x164_write_config()
35 &chip->port_config, sizeof(chip->port_config)); in __gen_74x164_write_config()
43 mutex_lock(&chip->lock); in gen_74x164_get_value()
44 ret = (chip->port_config >> offset) & 0x1; in gen_74x164_get_value()
45 mutex_unlock(&chip->lock); in gen_74x164_get_value()
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| D | gpio-mc33880.c | 2 * MC33880 high-side/low-side switch GPIO driver
20 * Freescale MC33880 high-side/low-side switch
25 #include <linux/spi/spi.h>
26 #include <linux/spi/mc33880.h>
27 #include <linux/gpio.h>
52 struct spi_device *spi; member
57 return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config)); in mc33880_write_config()
64 mc->port_config |= 1 << offset; in __mc33880_set()
66 mc->port_config &= ~(1 << offset); in __mc33880_set()
76 mutex_lock(&mc->lock); in mc33880_set()
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| /linux-3.3/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpc5200.txt | 2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
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| /linux-3.3/include/linux/spi/ |
| D | spi_gpio.h | 5 * For each bitbanged SPI bus, set up a platform_device node with:
6 * - name "spi_gpio"
7 * - id the same as the SPI bus number it implements
8 * - dev.platform data pointing to a struct spi_gpio_platform_data
15 * that the controller_data being the GPIO used for each device's
20 * // this slave uses GPIO 42 for its chipselect
23 * // this one uses GPIO 86 for its chipselect
39 #define SPI_GPIO_NO_CHIPSELECT ((unsigned long)-1l)
40 #define SPI_GPIO_NO_MISO ((unsigned long)-1l)
41 #define SPI_GPIO_NO_MOSI ((unsigned long)-1l)
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| /linux-3.3/Documentation/spi/ |
| D | ep93xx_spi | 1 Cirrus EP93xx SPI controller driver HOWTO
4 ep93xx_spi driver brings SPI master support for EP93xx SPI controller. Chip
5 selects are implemented with GPIO lines.
8 not work correctly (it cannot be controlled by software). Use GPIO lines
15 arch/arm/mach-ep93xx/*.c). In this example we configure MMC over SPI through
16 this driver on TS-7260 board. You can adapt the code to suit your needs.
23 arch/arm/mach-ep93xx/ts72xx.c:
26 #include <linux/gpio.h>
27 #include <linux/spi/spi.h>
31 /* this is our GPIO line used for chip select */
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| /linux-3.3/Documentation/devicetree/bindings/spi/ |
| D | fsl-spi.txt | 1 * SPI (Serial Peripheral Interface)
4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - interrupt-parent : the phandle for the interrupt controller that
19 - gpios : specifies the gpio pins to be used for chipselects.
20 The gpios will be referred to as reg = <index> in the SPI child nodes.
21 If unspecified, a single SPI device without a chip select can be used.
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| /linux-3.3/arch/arm/mach-pxa/ |
| D | cm-x270.c | 2 * linux/arch/arm/mach-pxa/cm-x270.c
14 #include <linux/gpio.h>
17 #include <linux/rtc-v3020.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/pxa2xx_spi.h>
22 #include <linux/spi/libertas_spi.h>
30 /* physical address if local-bus attached devices */
33 /* GPIO IRQ usage */
86 GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */
111 /* GPIO */
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| /linux-3.3/arch/arm/mach-u300/ |
| D | spi.c | 2 * arch/arm/mach-u300/spi.c
4 * Copyright (C) 2009 ST-Ericsson AB
11 #include <linux/spi/spi.h>
18 * The following is for the actual devices on the SSP/SPI bus
28 * Here you would write the chip select value to the GPIO pins if in select_dummy_chip()
48 * (usually GPIO) for a certain chip.
58 .modalias = "spi-dummy",
63 /* .irq - no external IRQ routed from this device */
74 /* If you have several SPI buses this varies, we have only bus 0 */
77 * On the APP CPU GPIO 4, 5 and 6 are connected as generic
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| /linux-3.3/arch/arm/plat-s3c24xx/ |
| D | Kconfig | 17 # low-level serial option nodes
31 low-level implementation needed
37 low-level implementation needed
58 # gpio configurations
70 Add an extra 64 gpio numbers to the available GPIO pool. This is
76 Add an extra 128 gpio numbers to the available GPIO pool. This is
101 # SPI default pin configuration code
106 SPI GPIO configuration code for BUS0 when connected to
112 SPI GPIO configuration code for BUS 1 when connected to
118 SPI GPIO configuration code for BUS 1 when connected to
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| /linux-3.3/arch/arm/mach-sa1100/include/mach/ |
| D | shannon.h | 7 #define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */
8 #define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
9 /* lcd lower = GPIO 2-9 */
10 #define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
11 #define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
12 #define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */
13 #define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */
14 #define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */
16 #define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */
19 #define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */
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| /linux-3.3/arch/arm/mach-davinci/ |
| D | board-tnetv107x-evm.c | 18 #include <linux/dma-mapping.h>
20 #include <linux/gpio.h>
28 #include <linux/spi/spi.h>
31 #include <asm/mach-types.h>
43 static int initialize_gpio(int gpio, char *desc) in initialize_gpio() argument
47 ret = gpio_request(gpio, desc); in initialize_gpio()
49 pr_err_ratelimited("cannot open %s gpio\n", desc); in initialize_gpio()
50 return -ENOSYS; in initialize_gpio()
52 gpio_direction_input(gpio); in initialize_gpio()
53 return gpio; in initialize_gpio()
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| /linux-3.3/arch/arm/mach-imx/ |
| D | mach-pcm037_eet.c | 9 #include <linux/gpio.h>
12 #include <linux/spi/spi.h>
15 #include <mach/iomux-mx3.h>
17 #include <asm/mach-types.h>
20 #include "devices-imx31.h"
23 /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
25 /* GPIO keys */
48 /* SPI */
67 /* GPIO-keys input device */
72 .gpio = 0,
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| /linux-3.3/arch/arm/mach-at91/ |
| D | board-carmeva.c | 2 * linux/arch/arm/mach-at91/board-carmeva.c
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/gpio.h>
30 #include <asm/mach-types.h>
67 .vbus_pin = {-EINVAL, -EINVAL},
68 .overcurrent_pin= {-EINVAL, -EINVAL},
80 // .irq_pin = -EINVAL,
81 // .vcc_pin = -EINVAL,
89 .vcc_pin = -EINVAL,
98 { /* User accessible spi - cs1 (250KHz) */
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| /linux-3.3/arch/cris/arch-v32/drivers/ |
| D | Kconfig | 10 This option enables the ETRAX FS built-in 10/100Mbit Ethernet
83 bool "Serial-port support"
92 bool "RS-485 support"
95 Enables support for RS-485 serial communication.
121 bool "Ser0 is a RS-232 port"
123 Configure serial port 0 to be a RS-232 port.
126 bool "Ser0 is a half duplex RS-485 port"
129 Configure serial port 0 to be a half duplex (two wires) RS-485 port.
132 bool "Ser0 is a full duplex RS-485 port"
135 Configure serial port 0 to be a full duplex (four wires) RS-485 port.
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