Lines Matching +full:spi +full:- +full:gpio
2 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
4 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
6 * This driver has been based on the spi-gpio.c:
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_bitbang.h>
26 #include <linux/gpio.h>
28 #include <asm/mach-ath79/ar71xx_regs.h>
29 #include <asm/mach-ath79/ath79_spi_platform.h>
31 #define DRV_NAME "ath79-spi"
42 return ioread32(sp->base + reg); in ath79_spi_rr()
47 iowrite32(val, sp->base + reg); in ath79_spi_wr()
50 static inline struct ath79_spi *ath79_spidev_to_sp(struct spi_device *spi) in ath79_spidev_to_sp() argument
52 return spi_master_get_devdata(spi->master); in ath79_spidev_to_sp()
55 static void ath79_spi_chipselect(struct spi_device *spi, int is_active) in ath79_spi_chipselect() argument
57 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_chipselect()
58 int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; in ath79_spi_chipselect()
62 if (spi->mode & SPI_CPOL) in ath79_spi_chipselect()
63 sp->ioc_base |= AR71XX_SPI_IOC_CLK; in ath79_spi_chipselect()
65 sp->ioc_base &= ~AR71XX_SPI_IOC_CLK; in ath79_spi_chipselect()
67 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); in ath79_spi_chipselect()
70 if (spi->chip_select) { in ath79_spi_chipselect()
71 struct ath79_spi_controller_data *cdata = spi->controller_data; in ath79_spi_chipselect()
73 /* SPI is normally active-low */ in ath79_spi_chipselect()
74 gpio_set_value(cdata->gpio, cs_high); in ath79_spi_chipselect()
77 sp->ioc_base |= AR71XX_SPI_IOC_CS0; in ath79_spi_chipselect()
79 sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; in ath79_spi_chipselect()
81 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); in ath79_spi_chipselect()
86 static int ath79_spi_setup_cs(struct spi_device *spi) in ath79_spi_setup_cs() argument
88 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_setup_cs()
91 cdata = spi->controller_data; in ath79_spi_setup_cs()
92 if (spi->chip_select && !cdata) in ath79_spi_setup_cs()
93 return -EINVAL; in ath79_spi_setup_cs()
95 /* enable GPIO mode */ in ath79_spi_setup_cs()
99 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); in ath79_spi_setup_cs()
100 sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); in ath79_spi_setup_cs()
105 if (spi->chip_select) { in ath79_spi_setup_cs()
108 status = gpio_request(cdata->gpio, dev_name(&spi->dev)); in ath79_spi_setup_cs()
112 status = gpio_direction_output(cdata->gpio, in ath79_spi_setup_cs()
113 spi->mode & SPI_CS_HIGH); in ath79_spi_setup_cs()
115 gpio_free(cdata->gpio); in ath79_spi_setup_cs()
119 if (spi->mode & SPI_CS_HIGH) in ath79_spi_setup_cs()
120 sp->ioc_base |= AR71XX_SPI_IOC_CS0; in ath79_spi_setup_cs()
122 sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; in ath79_spi_setup_cs()
123 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); in ath79_spi_setup_cs()
129 static void ath79_spi_cleanup_cs(struct spi_device *spi) in ath79_spi_cleanup_cs() argument
131 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_cleanup_cs()
133 if (spi->chip_select) { in ath79_spi_cleanup_cs()
134 struct ath79_spi_controller_data *cdata = spi->controller_data; in ath79_spi_cleanup_cs()
135 gpio_free(cdata->gpio); in ath79_spi_cleanup_cs()
139 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); in ath79_spi_cleanup_cs()
140 /* disable GPIO mode */ in ath79_spi_cleanup_cs()
144 static int ath79_spi_setup(struct spi_device *spi) in ath79_spi_setup() argument
148 if (spi->bits_per_word > 32) in ath79_spi_setup()
149 return -EINVAL; in ath79_spi_setup()
151 if (!spi->controller_state) { in ath79_spi_setup()
152 status = ath79_spi_setup_cs(spi); in ath79_spi_setup()
157 status = spi_bitbang_setup(spi); in ath79_spi_setup()
158 if (status && !spi->controller_state) in ath79_spi_setup()
159 ath79_spi_cleanup_cs(spi); in ath79_spi_setup()
164 static void ath79_spi_cleanup(struct spi_device *spi) in ath79_spi_cleanup() argument
166 ath79_spi_cleanup_cs(spi); in ath79_spi_cleanup()
167 spi_bitbang_cleanup(spi); in ath79_spi_cleanup()
170 static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs, in ath79_spi_txrx_mode0() argument
173 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_txrx_mode0()
174 u32 ioc = sp->ioc_base; in ath79_spi_txrx_mode0()
177 for (word <<= (32 - bits); likely(bits); bits--) { in ath79_spi_txrx_mode0()
203 master = spi_alloc_master(&pdev->dev, sizeof(*sp)); in ath79_spi_probe()
205 dev_err(&pdev->dev, "failed to allocate spi master\n"); in ath79_spi_probe()
206 return -ENOMEM; in ath79_spi_probe()
212 pdata = pdev->dev.platform_data; in ath79_spi_probe()
214 master->setup = ath79_spi_setup; in ath79_spi_probe()
215 master->cleanup = ath79_spi_cleanup; in ath79_spi_probe()
217 master->bus_num = pdata->bus_num; in ath79_spi_probe()
218 master->num_chipselect = pdata->num_chipselect; in ath79_spi_probe()
220 master->bus_num = -1; in ath79_spi_probe()
221 master->num_chipselect = 1; in ath79_spi_probe()
224 sp->bitbang.master = spi_master_get(master); in ath79_spi_probe()
225 sp->bitbang.chipselect = ath79_spi_chipselect; in ath79_spi_probe()
226 sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; in ath79_spi_probe()
227 sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; in ath79_spi_probe()
228 sp->bitbang.flags = SPI_CS_HIGH; in ath79_spi_probe()
232 ret = -ENOENT; in ath79_spi_probe()
236 sp->base = ioremap(r->start, resource_size(r)); in ath79_spi_probe()
237 if (!sp->base) { in ath79_spi_probe()
238 ret = -ENXIO; in ath79_spi_probe()
242 ret = spi_bitbang_start(&sp->bitbang); in ath79_spi_probe()
249 iounmap(sp->base); in ath79_spi_probe()
252 spi_master_put(sp->bitbang.master); in ath79_spi_probe()
261 spi_bitbang_stop(&sp->bitbang); in ath79_spi_remove()
262 iounmap(sp->base); in ath79_spi_remove()
264 spi_master_put(sp->bitbang.master); in ath79_spi_remove()
279 MODULE_DESCRIPTION("SPI controller driver for Atheros AR71XX/AR724X/AR913X");