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/linux-5.10/arch/arm/boot/dts/
Dimx28-cfa10036.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 model = "Crystalfontz CFA-10036 Board";
16 reg = <0x40000000 0x08000000>;
22 ssd1306_cfa10036: ssd1306-10036@0 {
23 reg = <0>;
24 fsl,pinmux-ids = <
27 fsl,drive-strength = <MXS_DRIVE_4mA>;
29 fsl,pull-up = <MXS_PULL_DISABLE>;
[all …]
Dr8a7779.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
[all …]
Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
Dimx28-duckbill-2-enocean.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
7 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
15 compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
19 reg = <0x40000000 0x08000000>;
25 compatible = "fsl,imx28-mmc";
26 pinctrl-names = "default";
[all …]
Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
22 compatible = "marvell,armada370", "marvell,armada-370-xp";
31 compatible = "marvell,armada370-mbus", "simple-bus";
35 reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
39 compatible = "marvell,armada-370-pcie";
[all …]
Dimx6qdl-sabreauto.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 stdout-path = &uart4;
16 reg = <0x10000000 0x80000000>;
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_leds>;
30 gpio-keys {
31 compatible = "gpio-keys";
[all …]
Dimx28-duckbill-2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
7 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "i2se,duckbill-2", "fsl,imx28";
18 reg = <0x40000000 0x08000000>;
24 compatible = "fsl,imx28-mmc";
25 pinctrl-names = "default";
26 pinctrl-0 = <&mmc0_8bit_pins_a
[all …]
Dbcm5301x.dtsi6 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&gic>;
23 compatible = "simple-bus";
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/
Dbrcm,bcm2711-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-hdmi0
16 - brcm,bcm2711-hdmi1
18 reg:
20 - description: HDMI controller register range
21 - description: DVP register range
[all …]
Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
23 - items:
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-lvds.txt5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
7 - "rockchip,px30-lvds";
9 - reg: physical base address of the controller and length
11 - clocks: must include clock specifiers corresponding to entries in the
12 clock-names property.
13 - clock-names: must contain "pclk_lvds"
15 - avdd1v0-supply: regulator phandle for 1.0V analog power
16 - avdd1v8-supply: regulator phandle for 1.8V analog power
17 - avdd3v3-supply: regulator phandle for 3.3V analog power
[all …]
/linux-5.10/Documentation/devicetree/bindings/gpio/
Dni,169445-nand-gpio.txt8 - compatible: should be "ni,169445-nand-gpio"
9 - reg-names: must contain
10 "dat" - data register
11 - reg: address + size pairs describing the GPIO register sets;
12 order must correspond with the order of entries in reg-names
13 - #gpio-cells: must be set to 2. The first cell is the pin number and
17 - gpio-controller: Marks the device node as a gpio controller.
20 - no-output: disables driving output on the pins
23 gpio1: nand-gpio-out@1f300010 {
24 compatible = "ni,169445-nand-gpio";
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dti,k3-am654-cpts.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Sekhar Nori <nsekhar@ti.com>
17 - selection of multiple external clock sources
18 - Software control of time sync events via interrupt or polling
19 - 64-bit timestamp mode in ns with PPM and nudge adjustment.
20 - hardware timestamp push inputs (HWx_TS_PUSH)
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/xlnx/
Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
[all …]
Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dimx8mq-thor96.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 compatible = "einfochips,imx8mq-thor96", "fsl,imx8mq";
16 stdout-path = &uart1;
21 reg = <0x00000000 0x40000000 0 0x80000000>;
25 compatible = "gpio-leds";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_leds>;
29 user-led1 {
32 linux,default-trigger = "heartbeat";
[all …]
/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
16 reg = <0>;
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/phy/
Dbcm-ns-usb2-phy.txt4 - compatible: brcm,ns-usb2-phy
5 - reg: iomem address range of DMU (Device Management Unit)
6 - reg-names: "dmu", the only needed & supported reg right now
7 - clocks: USB PHY reference clock
8 - clock-names: "phy-ref-clk", the only needed & supported clock right now
14 usb2-phy {
15 compatible = "brcm,ns-usb2-phy";
16 reg = <0x1800c000 0x1000>;
17 reg-names = "dmu";
18 #phy-cells = <0>;
[all …]
/linux-5.10/arch/nios2/boot/dts/
D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
21 reg = <0x00000000>;
22 interrupt-controller;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mmc/
Dbrcm,sdhci-brcmstb.txt4 and the properties used by the sdhci-brcmstb driver.
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
24 sdhci,auto-cmd12;
[all …]
/linux-5.10/Documentation/devicetree/bindings/media/
Dqcom,camss.txt5 - compatible:
9 - "qcom,msm8916-camss"
10 - "qcom,msm8996-camss"
11 - reg:
13 Value type: <prop-encoded-array>
14 Definition: Register ranges as listed in the reg-names property.
15 - reg-names:
19 - "csiphy0"
20 - "csiphy0_clk_mux"
21 - "csiphy1"
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/ti/
Dti,j721e-dss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
22 const: ti,j721e-dss
24 reg:
26 - description: common_m DSS Master common
27 - description: common_s0 DSS Shared common 0
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dnuvoton,npcm-fiu.txt10 - compatible : "nuvoton,npcm750-fiu" for the NPCM7XX BMC
11 - #address-cells : should be 1.
12 - #size-cells : should be 0.
13 - reg : the first contains the register location and length,
15 - reg-names: Should contain the reg names "control" and "memory"
16 - clocks : phandle of FIU reference clock.
19 - pinctrl-names : a pinctrl state named "default" must be defined.
20 - pinctrl-0 : phandle referencing pin configuration of the device.
23 - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
26 - All the FIU controller nodes should be represented in the aliases node using
[all …]
/linux-5.10/arch/h8300/boot/dts/
Dh8300h_sim.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #address-cells = <1>;
6 #size-cells = <1>;
7 interrupt-parent = <&h8intc>;
10 bootargs = "earlyprintk=h8300-sim";
11 stdout-path = <&sci0>;
19 #clock-cells = <0>;
20 compatible = "fixed-clock";
21 clock-frequency = <20000000>;
[all …]

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