Lines Matching +full:reg +full:- +full:names
6 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&gic>;
23 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <1>;
30 reg = <0x0300 0x100>;
38 reg = <0x0400 0x100>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinmux_uart1>;
48 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
54 #clock-cells = <0>;
55 compatible = "brcm,nsp-armpll";
57 reg = <0x00000 0x1000>;
61 compatible = "arm,cortex-a9-scu";
62 reg = <0x20000 0x100>;
66 compatible = "arm,cortex-a9-global-timer";
67 reg = <0x20200 0x100>;
73 compatible = "arm,cortex-a9-twd-timer";
74 reg = <0x20600 0x20>;
81 compatible = "arm,cortex-a9-twd-wdt";
82 reg = <0x20620 0x20>;
88 gic: interrupt-controller@21000 {
89 compatible = "arm,cortex-a9-gic";
90 #interrupt-cells = <3>;
91 #address-cells = <0>;
92 interrupt-controller;
93 reg = <0x21000 0x1000>,
97 L2: cache-controller@22000 {
98 compatible = "arm,pl310-cache";
99 reg = <0x22000 0x1000>;
100 cache-unified;
101 arm,shared-override;
102 prefetch-data = <1>;
103 prefetch-instr = <1>;
104 cache-level = <2>;
109 compatible = "arm,cortex-a9-pmu";
116 #address-cells = <1>;
117 #size-cells = <1>;
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
123 clock-frequency = <25000000>;
127 #clock-cells = <0>;
128 compatible = "fixed-factor-clock";
130 clock-div = <2>;
131 clock-mult = <1>;
135 #clock-cells = <0>;
136 compatible = "fixed-factor-clock";
138 clock-div = <4>;
139 clock-mult = <1>;
143 #clock-cells = <0>;
144 compatible = "fixed-factor-clock";
146 clock-div = <2>;
147 clock-mult = <1>;
151 usb2_phy: usb2-phy@1800c000 {
152 compatible = "brcm,ns-usb2-phy";
153 reg = <0x1800c000 0x1000>;
154 reg-names = "dmu";
155 #phy-cells = <0>;
157 clock-names = "phy-ref-clk";
161 compatible = "brcm,bus-axi";
162 reg = <0x18000000 0x1000>;
164 #address-cells = <1>;
165 #size-cells = <1>;
167 #interrupt-cells = <1>;
168 interrupt-map-mask = <0x000fffff 0xffff>;
169 interrupt-map =
241 reg = <0x00000000 0x1000>;
243 gpio-controller;
244 #gpio-cells = <2>;
248 reg = <0x00012000 0x1000>;
252 reg = <0x00013000 0x1000>;
256 reg = <0x00014000 0x1000>;
260 reg = <0x00021000 0x1000>;
262 #address-cells = <1>;
263 #size-cells = <1>;
266 interrupt-parent = <&gic>;
269 #usb-cells = <0>;
271 compatible = "generic-ehci";
272 reg = <0x00021000 0x1000>;
276 #address-cells = <1>;
277 #size-cells = <0>;
280 reg = <1>;
281 #trigger-source-cells = <0>;
285 reg = <2>;
286 #trigger-source-cells = <0>;
291 #usb-cells = <0>;
293 compatible = "generic-ohci";
294 reg = <0x00022000 0x1000>;
297 #address-cells = <1>;
298 #size-cells = <0>;
301 reg = <1>;
302 #trigger-source-cells = <0>;
306 reg = <2>;
307 #trigger-source-cells = <0>;
313 reg = <0x00023000 0x1000>;
315 #address-cells = <1>;
316 #size-cells = <1>;
319 interrupt-parent = <&gic>;
322 #usb-cells = <0>;
324 compatible = "generic-xhci";
325 reg = <0x00023000 0x1000>;
328 phy-names = "usb";
330 #address-cells = <1>;
331 #size-cells = <0>;
334 reg = <1>;
335 #trigger-source-cells = <0>;
341 reg = <0x24000 0x800>;
345 reg = <0x25000 0x800>;
349 reg = <0x26000 0x800>;
353 reg = <0x27000 0x800>;
358 compatible = "brcm,iproc-pwm";
359 reg = <0x18002000 0x28>;
361 #pwm-cells = <3>;
366 compatible = "brcm,iproc-mdio";
367 reg = <0x18003000 0x8>;
368 #size-cells = <0>;
369 #address-cells = <1>;
372 mdio-bus-mux@18003000 {
373 compatible = "mdio-mux-mmioreg";
374 mdio-parent-bus = <&mdio>;
375 #address-cells = <1>;
376 #size-cells = <0>;
377 reg = <0x18003000 0x4>;
378 mux-mask = <0x200>;
381 reg = <0x0>;
382 #address-cells = <1>;
383 #size-cells = <0>;
385 usb3_phy: usb3-phy@10 {
386 compatible = "brcm,ns-ax-usb3-phy";
387 reg = <0x10>;
388 usb3-dmp-syscon = <&usb3_dmp>;
389 #phy-cells = <0>;
396 reg = <0x18105000 0x1000>;
401 reg = <0x18008000 0x20>;
404 reg-shift = <2>;
409 compatible = "brcm,iproc-i2c";
410 reg = <0x18009000 0x50>;
412 #address-cells = <1>;
413 #size-cells = <0>;
414 clock-frequency = <100000>;
419 compatible = "simple-bus";
421 #address-cells = <1>;
422 #size-cells = <1>;
425 compatible = "simple-bus";
426 reg = <0x100 0x1a4>;
428 #address-cells = <1>;
429 #size-cells = <1>;
431 pin-controller@1c0 {
432 compatible = "brcm,bcm4708-pinmux";
433 reg = <0x1c0 0x24>;
434 reg-names = "cru_gpio_control";
436 spi-pins {
461 #clock-cells = <1>;
462 compatible = "brcm,nsp-lcpll0";
463 reg = <0x1800c100 0x14>;
465 clock-output-names = "lcpll0", "pcie_phy", "sdio",
470 #clock-cells = <1>;
471 compatible = "brcm,nsp-genpll";
472 reg = <0x1800c140 0x24>;
474 clock-output-names = "genpll", "phy", "ethernetclk",
480 compatible = "brcm,ns-thermal";
481 reg = <0x1800c2c0 0x10>;
482 #thermal-sensor-cells = <0>;
486 compatible = "brcm,bcm5301x-srab";
487 reg = <0x18007000 0x1000>;
495 compatible = "brcm,bcm5301x-rng";
496 reg = <0x18004000 0x14>;
500 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
501 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
502 reg-names = "nand", "iproc-idm", "iproc-ext";
505 #address-cells = <1>;
506 #size-cells = <0>;
508 brcm,nand-has-wp;
512 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
513 reg = <0x18029200 0x184>,
517 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
525 interrupt-names = "spi_lr_fullness_reached",
533 clock-names = "iprocmed";
534 num-cs = <2>;
535 #address-cells = <1>;
536 #size-cells = <0>;
538 spi_nor: spi-nor@0 {
539 compatible = "jedec,spi-nor";
540 reg = <0>;
541 spi-max-frequency = <20000000>;
545 compatible = "brcm,bcm947xx-cfe-partitions";
550 thermal-zones {
551 cpu_thermal: cpu-thermal {
552 polling-delay-passive = <0>;
553 polling-delay = <1000>;
554 coefficients = <(-556) 418000>;
555 thermal-sensors = <&thermal>;
558 cpu-crit {
565 cooling-maps {