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/linux-5.10/drivers/gpu/drm/omapdrm/dss/
Ddss.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
97 __raw_writel(val, dss->base + idx.idx); in dss_write_reg()
102 return __raw_readl(dss->base + idx.idx); in dss_read_reg()
105 #define SR(dss, reg) \ argument
106 dss->ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(dss, DSS_##reg)
107 #define RR(dss, reg) \ argument
108 dss_write_reg(dss, DSS_##reg, dss->ctx[(DSS_##reg).idx / sizeof(u32)])
116 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) { in dss_save_context()
121 dss->ctx_valid = true; in dss_save_context()
[all …]
/linux-5.10/drivers/clk/st/
Dclkgen-fsyn.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
163 * prepare - clk_(un)prepare only ensures parent is (un)prepared
164 * enable - clk_enable and clk_disable are functional & control the Fsyn
165 * rate - inherits rate from parent. set_rate/round_rate/recalc_rate
166 * parent - fixed parent. No clk_set_parent support
170 * struct st_clk_quadfs_pll - A pll which outputs a fixed multiplier of
174 * @hw: handle between common and hardware-specific interfaces.
195 if (pll->lock) in quadfs_pll_enable()
196 spin_lock_irqsave(pll->lock, flags); in quadfs_pll_enable()
[all …]
/linux-5.10/drivers/net/ethernet/sfc/falcon/
Dfalcon.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
134 (*(u32 *)((efx)->stats_buffer.addr + XgDmaDone_offset))
139 /* 48-bit stats are zero-padded to 64 on DMA */ \
199 [0 ... BITS_TO_LONGS(FALCON_STAT_COUNT) - 1] = ~0UL,
216 #define SPI_STATUS_WPEN 0x80 /* Write-protect pin enabled */
225 * Non-volatile memory layout
231 * 0-0x400 chip and board config (see struct falcon_nvconfig)
232 * 0x400-0x8000 unused (or may contain VPD if EEPROM not present)
[all …]
/linux-5.10/arch/mips/include/asm/
Dkvm_host.h106 (0x8000 - PAGE_SIZE))
108 #define KVM_GUEST_KERNEL_MODE(vcpu) ((kvm_read_c0_guest_status(vcpu->arch.cop0) & (ST0_EXL | ST0_ER…
109 ((kvm_read_c0_guest_status(vcpu->arch.cop0) & KSU_USER) == 0))
138 #define KVM_HVA_ERR_BAD (-1UL)
139 #define KVM_HVA_ERR_RO_BAD (-2UL)
232 unsigned long reg[N_MIPS_COPROC_REGS][N_MIPS_COPROC_SEL]; member
239 * Coprocessor 0 register names
316 #define VPN2_MASK GENMASK(cpu_vmbits - 1, 13)
439 static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg, in _kvm_atomic_set_c0_guest_reg() argument
451 : "=&r" (temp), "+m" (*reg) in _kvm_atomic_set_c0_guest_reg()
[all …]
/linux-5.10/drivers/net/ethernet/amd/xgbe/
Dxgbe-mdio.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
70 * names of its contributors may be used to endorse or promote products
127 #include "xgbe-common.h"
132 if (!pdata->phy_if.phy_impl.module_eeprom) in xgbe_phy_module_eeprom()
133 return -ENXIO; in xgbe_phy_module_eeprom()
135 return pdata->phy_if.phy_impl.module_eeprom(pdata, eeprom, data); in xgbe_phy_module_eeprom()
141 if (!pdata->phy_if.phy_impl.module_info) in xgbe_phy_module_info()
142 return -ENXIO; in xgbe_phy_module_info()
144 return pdata->phy_if.phy_impl.module_info(pdata, modinfo); in xgbe_phy_module_info()
[all …]
Dxgbe-pci.c70 * names of its contributors may be used to endorse or promote products
123 #include "xgbe-common.h"
132 vector_count += max(pdata->rx_ring_count, in xgbe_config_multi_msi()
133 pdata->tx_ring_count); in xgbe_config_multi_msi()
135 ret = pci_alloc_irq_vectors(pdata->pcidev, XGBE_MSI_MIN_COUNT, in xgbe_config_multi_msi()
138 dev_info(pdata->dev, "multi MSI/MSI-X enablement failed\n"); in xgbe_config_multi_msi()
142 pdata->isr_as_tasklet = 1; in xgbe_config_multi_msi()
143 pdata->irq_count = ret; in xgbe_config_multi_msi()
145 pdata->dev_irq = pci_irq_vector(pdata->pcidev, 0); in xgbe_config_multi_msi()
146 pdata->ecc_irq = pci_irq_vector(pdata->pcidev, 1); in xgbe_config_multi_msi()
[all …]
/linux-5.10/drivers/of/
Dplatform.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <linux/dma-mapping.h>
26 { .compatible = "simple-bus", },
27 { .compatible = "simple-mfd", },
30 { .compatible = "arm,amba-bus", },
36 { .compatible = "operating-points-v2", },
41 * of_find_device_by_node - Find the platform_device associated with a node
68 * of_device_make_bus_id - Use the device node data to assign a unique name
72 * derive a unique name. If it cannot, then it will prepend names from
77 struct device_node *node = dev->of_node; in of_device_make_bus_id()
[all …]
/linux-5.10/drivers/pinctrl/samsung/
Dpinctrl-samsung.c1 // SPDX-License-Identifier: GPL-2.0+
3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
28 #include <dt-bindings/pinctrl/samsung.h>
31 #include "pinctrl-samsung.h"
41 { "samsung,pin-pud", PINCFG_TYPE_PUD },
42 { "samsung,pin-drv", PINCFG_TYPE_DRV },
43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
45 { "samsung,pin-val", PINCFG_TYPE_DAT },
54 return pmx->nr_groups; in samsung_get_group_count()
[all …]
/linux-5.10/drivers/clk/
Dclk-qoriq.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
31 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */
72 #define CG_VER3 4 /* version 3 cg: reg layout different */
80 int cmux_to_group[NUM_CMUX + 1]; /* array should be -1 terminated */
100 static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg) in cg_out() argument
102 if (cg->info.flags & CG_LITTLE_ENDIAN) in cg_out()
103 iowrite32(val, reg); in cg_out()
105 iowrite32be(val, reg); in cg_out()
108 static u32 cg_in(struct clockgen *cg, u32 __iomem *reg) in cg_in() argument
[all …]
/linux-5.10/drivers/scsi/aic7xxx/
Daic79xx_osm.h4 * Copyright (c) 2000-2001 Adaptec Inc.
18 * 3. Neither the names of the above-listed copyright holders nor the names
90 #define powerof2(x) ((((x)-1)&(x))==0)
191 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
192 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
193 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
194 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
222 * scenarios that the Linux mid-layer code just doesn't know how to
324 * Per-SCB OSM storage.
330 uint32_t sense_resid; /* Auto-Sense residual */
[all …]
Daic7xxx_osm.h21 * Copyright (c) 2000-2003 Adaptec Inc.
35 * 3. Neither the names of the above-listed copyright holders nor the names
204 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
205 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
206 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
207 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
241 * scenarios that the Linux mid-layer code just doesn't know how to
335 * Per-SCB OSM storage.
341 uint32_t sense_resid; /* Auto-Sense residual */
387 spin_lock_init(&ahc->platform_data->spin_lock); in ahc_lockinit()
[all …]
/linux-5.10/drivers/rtc/
Drtc-pcf8563.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-06 Tower Technologies
7 * Maintainers: http://www.nslu2-linux.org/
11 * http://www.semiconductors.philips.com/acrobat/datasheets/PCF8563-04.pdf
14 #include <linux/clk-provider.h>
86 static int pcf8563_read_block_data(struct i2c_client *client, unsigned char reg, in pcf8563_read_block_data() argument
91 .addr = client->addr, in pcf8563_read_block_data()
93 .buf = &reg, in pcf8563_read_block_data()
96 .addr = client->addr, in pcf8563_read_block_data()
103 if ((i2c_transfer(client->adapter, msgs, 2)) != 2) { in pcf8563_read_block_data()
[all …]
/linux-5.10/drivers/gpio/
Dgpiolib-of.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
24 #include "gpiolib-of.h"
27 * of_gpio_spi_cs_get_count() - special GPIO counting for SPI
33 * established "cs-gpios" for chip selects but instead rely on
35 * the counting of "cs-gpios" to count "gpios" transparent to the
40 struct device_node *np = dev->of_node; in of_gpio_spi_cs_get_count()
48 !of_device_is_compatible(np, "ibm,ppc4xx-spi")) in of_gpio_spi_cs_get_count()
71 snprintf(propname, sizeof(propname), "%s-%s", in of_gpio_get_count()
77 ret = of_gpio_named_count(dev->of_node, propname); in of_gpio_get_count()
[all …]
/linux-5.10/drivers/iio/imu/
Dadis16480.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #define ADIS16480_REG(page, reg) ((page) * ADIS16480_PAGE_SIZE + (reg)) argument
109 ADIS16480_REG((page) + 1, (x) - 60 + 8))
178 struct adis16480 *adis16480 = file->private_data; in adis16480_show_firmware_revision()
184 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev); in adis16480_show_firmware_revision()
203 struct adis16480 *adis16480 = file->private_data; in adis16480_show_firmware_date()
209 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year); in adis16480_show_firmware_date()
213 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md); in adis16480_show_firmware_date()
217 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", in adis16480_show_firmware_date()
236 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM, in adis16480_show_serial_number()
[all …]
/linux-5.10/drivers/mfd/
Dab8500-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2010
22 #include <linux/mfd/abx500/ab8500-bm.h>
23 #include <linux/mfd/dbx500-prcmu.h>
140 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
155 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
172 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); in ab8500_prcmu_write()
184 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); in ab8500_prcmu_write_masked()
195 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); in ab8500_prcmu_read()
206 return -EINVAL; in ab8500_get_chip_id()
[all …]
/linux-5.10/drivers/virtio/
Dvirtio_mmio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2014, ARM Ltd.
15 * .name = "virtio-mmio",
16 * .id = -1,
35 * reg = <0x1e000 0x100>;
39 * 3. Kernel module (or command line) parameter. Can be used more than once -
55 #define pr_fmt(fmt) "virtio-mmio: " fmt
58 #include <linux/dma-mapping.h>
112 writel(1, vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES_SEL); in vm_get_features()
113 features = readl(vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES); in vm_get_features()
[all …]
/linux-5.10/drivers/net/can/rcar/
Drcar_canfd.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN FD device driver
7 /* The R-Car CAN FD controller can operate in either one of the below two modes
8 * - CAN FD only mode
9 * - Classical CAN (CAN 2.0) only mode
16 * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is
20 * to use as it is in the driver. However, those names are added as comments
72 /* Non-operational status */
85 (gpriv->fdmode ?\
91 #define RCANFD_GAFLCFG_SETRNC(n, x) (((x) & 0xff) << (24 - n * 8))
[all …]
/linux-5.10/drivers/net/ethernet/qlogic/qed/
Dqed_debug.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
4 * Copyright (c) 2019-2020 Marvell International Ltd.
52 /* Memory groups names */
151 return r[0] < (r[1] - imm[0]); in cond8()
232 * Addresses are in bytes, sizes are in quad-regs.
340 (((1 << FIELD_BIT_SIZE(type, field)) - 1) << \
362 (GET_FIELD((block)->flags, DBG_BLOCK_CHIP_HAS_LATENCY_EVENTS) ? 2 : 1)
364 ((block)->num_of_dbg_bus_lines + NUM_EXTRA_DBG_LINES(block))
828 struct dbg_tools_data *dev_data = &p_hwfn->dbg_info; in qed_grc_set_param()
830 dev_data->grc.param_val[grc_param] = val; in qed_grc_set_param()
[all …]
/linux-5.10/drivers/hwmon/
Dabituguru.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * abituguru.c Copyright (c) 2005-2006 Hans de Goede <hdegoede@redhat.com>
23 #include <linux/hwmon-sysfs.h>
64 * of the time it will reach this status within 30 - 90 ISA reads, and thus we
121 * reverse engineered by Olle Sandberg, hence the names might not be 100%
122 * logical. I could come up with better names, but I prefer keeping the names
125 /* Two i/o-ports are used by uGuru */
143 * correspond to 300-3000 RPM
165 static int bank1_types[ABIT_UGURU_MAX_BANK1_SENSORS] = { -1, -1, -1, -1, -1,
166 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };
[all …]
/linux-5.10/include/linux/
Dclk-provider.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
14 * top-level framework. custom flags for dealing with hardware specifics
20 #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
26 #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
31 /* parents need enable during gate/ungate, set rate and re-parent */
42 * struct clk_rate_request - Structure encoding the clk constraints that
64 * struct clk_duty - Struture encoding the duty cycle ratio of a clock
75 * struct clk_ops - Callback operations for hardware clocks; these are to
[all …]
/linux-5.10/drivers/ntb/hw/amd/
Dntb_hw_amd.c8 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
17 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
29 * * Neither the name of AMD Corporation nor the names of its
65 #define NTB_DESC "AMD(R) PCI-E Non-Transparent Bridge Driver"
78 if (idx < 0 || idx > ndev->mw_count) in ndev_mw_to_bar()
79 return -EINVAL; in ndev_mw_to_bar()
81 return ndev->dev_data->mw_idx << idx; in ndev_mw_to_bar()
87 return -EINVAL; in amd_ntb_mw_count()
89 return ntb_ndev(ntb)->mw_count; in amd_ntb_mw_count()
101 return -EINVAL; in amd_ntb_mw_get_align()
[all …]
/linux-5.10/drivers/clk/sunxi-ng/
Dccu-sun8i-a23.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun8i-a23-a33.h"
37 .reg = 0x000,
38 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
49 * With sigma-delta modulation for fractional-N on the audio PLL,
54 * match the clock names.
63 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
73 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
[all …]
Dccu-sun50i-h6.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
23 #include "ccu-sun50i-h6.h"
41 .reg = 0x000,
42 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
57 .reg = 0x010,
58 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M",
73 .reg = 0x020,
75 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
90 .reg = 0x028,
[all …]
/linux-5.10/drivers/macintosh/
Dwindfarm_ad7417_sensor.c1 // SPDX-License-Identifier: GPL-2.0-only
38 struct wf_ad7417_priv *pv = sr->priv; in wf_ad7417_temp_get()
44 mutex_lock(&pv->lock); in wf_ad7417_temp_get()
48 rc = i2c_master_send(pv->i2c, buf, 1); in wf_ad7417_temp_get()
51 rc = i2c_master_recv(pv->i2c, buf, 2); in wf_ad7417_temp_get()
55 /* Read a a 16-bit signed value */ in wf_ad7417_temp_get()
58 /* Convert 8.8-bit to 16.16 fixed point */ in wf_ad7417_temp_get()
61 mutex_unlock(&pv->lock); in wf_ad7417_temp_get()
65 mutex_unlock(&pv->lock); in wf_ad7417_temp_get()
66 return -1; in wf_ad7417_temp_get()
[all …]
/linux-5.10/arch/x86/include/uapi/asm/
Dsigcontext.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * hierarchy of CPU and FPU state, available to user-space (on the stack) when
26 * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame
33 * last 32-bit word of this extended area (at the
34 * fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to
50 * - if magic1 == 0 then it's sizeof(struct _fpstate)
51 * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate)
84 /* 10-byte legacy floating point register: */
90 /* 16-byte floating point register: */
97 /* 16-byte XMM register: */
[all …]

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