106 					 (0x8000 - PAGE_SIZE))
108 #define KVM_GUEST_KERNEL_MODE(vcpu)	((kvm_read_c0_guest_status(vcpu->arch.cop0) & (ST0_EXL | ST0_ER…
109 					((kvm_read_c0_guest_status(vcpu->arch.cop0) & KSU_USER) == 0))
138 #define KVM_HVA_ERR_BAD			(-1UL)
139 #define KVM_HVA_ERR_RO_BAD		(-2UL)
232 	unsigned long reg[N_MIPS_COPROC_REGS][N_MIPS_COPROC_SEL];  member
239  * Coprocessor 0 register names
316 #define VPN2_MASK		GENMASK(cpu_vmbits - 1, 13)
439 static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg,  in _kvm_atomic_set_c0_guest_reg()  argument
451 		: "=&r" (temp), "+m" (*reg)  in _kvm_atomic_set_c0_guest_reg()
456 static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg,  in _kvm_atomic_clear_c0_guest_reg()  argument
468 		: "=&r" (temp), "+m" (*reg)  in _kvm_atomic_clear_c0_guest_reg()
473 static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg,  in _kvm_atomic_change_c0_guest_reg()  argument
487 		: "=&r" (temp), "+m" (*reg)  in _kvm_atomic_change_c0_guest_reg()
497  * __BUILD_KVM_$ops_SAVED(): kvm_$op_sw_gc0_$reg()
505 	return cop0->reg[(_reg)][(sel)];				\
510 	cop0->reg[(_reg)][(sel)] = val;					\
518 	cop0->reg[(_reg)][(sel)] |= val;				\
523 	cop0->reg[(_reg)][(sel)] &= ~val;				\
530 	cop0->reg[(_reg)][(sel)] &= ~_mask;				\
531 	cop0->reg[(_reg)][(sel)] |= val & _mask;			\
539 	_kvm_atomic_set_c0_guest_reg(&cop0->reg[(_reg)][(sel)], val);	\
544 	_kvm_atomic_clear_c0_guest_reg(&cop0->reg[(_reg)][(sel)], val);	\
550 	_kvm_atomic_change_c0_guest_reg(&cop0->reg[(_reg)][(sel)], mask, \
555  * __BUILD_KVM_$ops_VZ(): kvm_$op_vz_gc0_$reg()
594 	write_gc0_##name(cop0->reg[(_reg)][(sel)]);			\
598 	cop0->reg[(_reg)][(sel)] = read_gc0_##name();			\
602  * __BUILD_KVM_$ops_WRAP(): kvm_$op_$name1() -> kvm_$op_$name2()
638  * __BUILD_KVM_$ops_SW(): kvm_$op_c0_guest_$reg() -> kvm_$op_sw_gc0_$reg()
675  * __BUILD_KVM_$ops_HW(): kvm_$op_c0_guest_$reg() -> kvm_$op_vz_gc0_$reg()
708  *    fns_hw/sw    name     type    reg num         select
777 		vcpu->fpu_enabled;  in kvm_mips_guest_can_have_fpu()
783 		kvm_read_c0_guest_config1(vcpu->cop0) & MIPS_CONF1_FP;  in kvm_mips_guest_has_fpu()
789 		vcpu->msa_enabled;  in kvm_mips_guest_can_have_msa()
795 		kvm_read_c0_guest_config3(vcpu->cop0) & MIPS_CONF3_MSA;  in kvm_mips_guest_has_msa()
841 			   const struct kvm_one_reg *reg, s64 *v);
843 			   const struct kvm_one_reg *reg, s64 v);
935  * enum kvm_mips_flush - Types of MMU flushes.
984  * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault.
992 	unsigned long badvaddr = vcpu->host_cp0_badvaddr;  in kvm_is_ifetch_fault()
993 	unsigned long epc = msk_isa16_mode(vcpu->pc);  in kvm_is_ifetch_fault()
994 	u32 cause = vcpu->host_cp0_cause;  in kvm_is_ifetch_fault()
1000 	 * Branches may be 32-bit or 16-bit instructions.  in kvm_is_ifetch_fault()
1004 	if ((cause & CAUSEF_BD) && badvaddr - epc <= 4)  in kvm_is_ifetch_fault()