/linux-3.3/drivers/video/via/ |
D | via-gpio.c | 11 #include <linux/via-core.h> 12 #include <linux/via-gpio.h> 16 * The ports we know about. Note that the port-25 gpios are not 29 .vg_name = "VGPIO0", /* Guess - not in datasheet */ 89 u8 reg; in via_gpio_set() local 93 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); in via_gpio_set() 94 gpio = cfg->active_gpios[nr]; in via_gpio_set() 95 reg = via_read_reg(VIASR, gpio->vg_port_index); in via_gpio_set() 96 reg |= 0x40 << gpio->vg_mask_shift; /* output enable */ in via_gpio_set() 98 reg |= 0x10 << gpio->vg_mask_shift; in via_gpio_set() [all …]
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/linux-3.3/include/xen/interface/ |
D | physdev.h | 28 * @args == Operation-specific extra arguments (NULL if none). 32 * Notify end-of-interrupt (EOI) for the specified IRQ. 72 * Set the current VCPU's I/O-port permissions bitmap. 83 * Read or write an IO-APIC register. 91 uint32_t reg; member 123 /* IN - high 16 bits hold segment for MAP_PIRQ_TYPE_MSI_SEG */ 234 * Notify that some PIRQ-bound event channels have been unmasked. 241 * These all-capitals physdev operation names are superceded by the new names
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/linux-3.3/drivers/hwmon/ |
D | f71805f.c | 2 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O 4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org> 6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates 39 #include <linux/hwmon-sysfs.h> 57 * Super-I/O constants and functions 75 superio_inb(int base, int reg) in superio_inb() argument 77 outb(reg, base); in superio_inb() 82 superio_inw(int base, int reg) in superio_inw() argument 85 outb(reg++, base); in superio_inw() 87 outb(reg, base); in superio_inw() [all …]
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D | ltc4215.c | 21 #include <linux/hwmon-sysfs.h> 23 /* Here are names of the chip's registers (a.k.a. commands) */ 52 mutex_lock(&data->update_lock); in ltc4215_update_device() 55 if (time_after(jiffies, data->last_updated + HZ / 10) || !data->valid) { in ltc4215_update_device() 57 dev_dbg(&client->dev, "Starting ltc4215 update\n"); in ltc4215_update_device() 60 for (i = 0; i < ARRAY_SIZE(data->regs); i++) { in ltc4215_update_device() 63 data->regs[i] = 0; in ltc4215_update_device() 65 data->regs[i] = val; in ltc4215_update_device() 68 data->last_updated = jiffies; in ltc4215_update_device() 69 data->valid = 1; in ltc4215_update_device() [all …]
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D | w83627hf.c | 2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware 4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, 8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org> 50 #include <linux/hwmon-sysfs.h> 51 #include <linux/hwmon-vid.h> 113 superio_outb(struct w83627hf_sio_data *sio, int reg, int val) in superio_outb() argument 115 outb(reg, sio->sioaddr); in superio_outb() 116 outb(val, sio->sioaddr + 1); in superio_outb() 120 superio_inb(struct w83627hf_sio_data *sio, int reg) in superio_inb() argument 122 outb(reg, sio->sioaddr); in superio_inb() [all …]
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D | smsc47m1.c | 2 smsc47m1.c - Part of lm_sensors, Linux kernel modules 7 Super-I/O chips. 10 Copyright (C) 2004-2007 Jean Delvare <khali@linux-fr.org> 37 #include <linux/hwmon-sysfs.h> 54 /* Super-I/0 registers and commands */ 56 #define REG 0x2e /* The register to read/write */ macro 60 superio_outb(int reg, int val) in superio_outb() argument 62 outb(reg, REG); in superio_outb() 67 superio_inb(int reg) in superio_inb() argument 69 outb(reg, REG); in superio_inb() [all …]
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/linux-3.3/drivers/gpio/ |
D | gpio-cs5535.c | 4 * Copyright (C) 2007-2009 Andres Salomon <dilinger@collabora.co.uk> 20 #define DRV_NAME "cs5535-gpio" 24 * 31-29,23 : reserved (always mask out) 27 * 22-16 : LPC 60 unsigned int reg) in errata_outl() argument 62 unsigned long addr = chip->base + 0x80 + reg; in errata_outl() 67 * non-selected bits; the recommended workaround is a in errata_outl() 68 * read-modify-write operation. in errata_outl() 73 if (reg != GPIO_POSITIVE_EDGE_STS && reg != GPIO_NEGATIVE_EDGE_STS) { in errata_outl() 83 unsigned int reg) in __cs5535_gpio_set() argument [all …]
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/linux-3.3/drivers/of/ |
D | irq.c | 5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 7 * Copyright (C) 1996-2001 Cort Dougan 30 * irq_of_parse_and_map - Parse and map an interrupt into linux virq space 50 * of_irq_find_parent - Given a device node, find its interrupt parent node 65 parp = of_get_property(child, "interrupt-parent", NULL); in of_irq_find_parent() 76 } while (p && of_get_property(p, "#interrupt-cells", NULL) == NULL); in of_irq_find_parent() 82 * of_irq_map_raw - Low level interrupt tree parsing 86 * @addr: address specifier (start of "reg" property of the device) 91 * This function is a low-level interrupt tree walking function. It 92 * can be used to do a partial walk with synthetized reg and interrupts [all …]
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D | address.c | 24 while (na--) in of_dump_addr() 73 return da - cp; in of_bus_default_map() 82 addr[na - 2] = cpu_to_be32(a >> 32); in of_bus_default_translate() 83 addr[na - 1] = cpu_to_be32(a & 0xffffffffu); in of_bus_default_translate() 100 /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ in of_bus_pci_match() 101 return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); in of_bus_pci_match() 146 cp = of_read_number(range + 1, na - 1); in of_bus_pci_map() 148 da = of_read_number(addr + 1, na - 1); in of_bus_pci_map() 156 return da - cp; in of_bus_pci_map() 161 return of_bus_default_translate(addr + 1, offset, na - 1); in of_bus_pci_translate() [all …]
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/linux-3.3/arch/powerpc/boot/dts/fsl/ |
D | p3041si-post.dtsi | 14 * names of its contributors may be used to endorse or promote products 36 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 38 #address-cells = <2>; 39 #size-cells = <1>; 44 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 52 reg = <0 0 0 0 0>; [all …]
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D | p5020si-post.dtsi | 14 * names of its contributors may be used to endorse or promote products 36 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; 38 #address-cells = <2>; 39 #size-cells = <1>; 44 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 52 reg = <0 0 0 0 0>; [all …]
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D | p2041si-post.dtsi | 14 * names of its contributors may be used to endorse or promote products 36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 38 #address-cells = <2>; 39 #size-cells = <1>; 44 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 52 reg = <0 0 0 0 0>; [all …]
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D | p4080si-post.dtsi | 14 * names of its contributors may be used to endorse or promote products 36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 38 #address-cells = <2>; 39 #size-cells = <1>; 44 compatible = "fsl,p4080-pcie"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 52 reg = <0 0 0 0 0>; [all …]
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/linux-3.3/include/acpi/ |
D | actbl.h | 3 * Name: actbl.h - Basic ACPI Table Definitions 8 * Copyright (C) 2000 - 2011, Intel Corp. 22 * 3. Neither the names of the above-listed copyright holders nor the names 52 * by ACPICA. All other tables are consumed by the OS-dependent ACPI-related 76 * All tables and structures must be byte-packed to match the ACPI 108 * GAS - Generic Address Structure (ACPI 2.0+) 112 * 64-bit Address field must be performed with care. 121 u64 address; /* 64-bit address of struct or register */ 126 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 136 u32 rsdt_physical_address; /* 32-bit physical address of the RSDT */ [all …]
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D | acpixf.h | 4 * Name: acpixf.h - External interfaces to the ACPI subsystem 9 * Copyright (C) 2000 - 2011, Intel Corp. 23 * 3. Neither the names of the above-listed copyright holders nor the names 404 acpi_status acpi_read(u64 *value, struct acpi_generic_address *reg); 406 acpi_status acpi_write(u64 value, struct acpi_generic_address *reg);
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/linux-3.3/Documentation/devicetree/bindings/mfd/ |
D | mc13xxx.txt | 4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892" 7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used 8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used 9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used 10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used 12 Sub-nodes: 13 - regulators : Contain the regulator nodes. The MC13892 regulators are 14 bound using their names as listed below with their registers and bits 48 fsl,spi-num-chipselects = <2>; 49 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ [all …]
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/linux-3.3/drivers/net/ethernet/8390/ |
D | 8390.h | 3 under the same license. Auto-loading of 8390.o only in v2.2 - Paul G. 4 Some of these names and comments originated from the Crynwr 17 /* The 8390 specific per-packet-header format. */ 36 /* Without I/O delay - non ISA or later chips */ 72 /* You have one of these per-board */ 84 unsigned word16:1; /* We have the 16-bit (vs 8-bit) version of the card. */ 85 unsigned bigendian:1; /* 16-bit big endian mode. Do NOT */ 94 short tx1, tx2; /* Packet lengths for ping-pong tx. */ 98 unsigned char saved_irq; /* Original dev->irq value. */ 139 #define E8390_PAGE1 0x40 /* using the two high-order bits */ [all …]
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D | 3c503.h | 3 Many of these names and comments are directly from the Crynwr packet 6 #define EL2H (dev->base_addr + 0x400) 7 #define EL2L (dev->base_addr) 29 /* (non-useful, but it also appears at the end of EPROM space) */ 36 #define E33G_DMAAH (EL2H+9) /* High byte of DMA address reg */ 37 #define E33G_DMAAL (EL2H+10) /* Low byte of DMA address reg */ 38 /* "Vector pointer" - if this address matches a read, the EPROM (rather than 53 #define ECNTRL_OUTPUT (0x40) /* PC-to-3C503 direction if 1 */ 54 #define ECNTRL_INPUT (0x00) /* 3C503-to-PC direction if 0 */ 79 ---- ---- ---- ----------------------------- [all …]
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/linux-3.3/drivers/net/can/sja1000/ |
D | sja1000.h | 2 * sja1000.h - Philips SJA1000 network device driver 7 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research 18 * 3. Neither the name of Volkswagen nor the names of its contributors 56 /* SJA1000 registers - manual section 6.4 (Pelican Mode) */ 78 /* Common registers - manual section 6.5 */ 158 /* the lower-layer is responsible for appropriate locking */ 159 u8 (*read_reg) (const struct sja1000_priv *priv, int reg); 160 void (*write_reg) (const struct sja1000_priv *priv, int reg, u8 val); 164 void *priv; /* for board-specific data */
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/linux-3.3/sound/aoa/core/ |
D | gpio-feature.c | 60 const u32 *reg; in get_gpio() local 63 *gpioptr = -1; in get_gpio() 68 /* some machines have only gpioX/extint-gpioX nodes, in get_gpio() 69 * and an audio-gpio property saying what it is ... in get_gpio() 76 audio_gpio = of_get_property(np, "audio-gpio", NULL); in get_gpio() 89 reg = of_get_property(np, "reg", NULL); in get_gpio() 90 if (!reg) in get_gpio() 93 *gpioptr = *reg; in get_gpio() 95 /* this is a hack, usually the GPIOs 'reg' property in get_gpio() 101 reg = of_get_property(np, "audio-gpio-active-state", NULL); in get_gpio() [all …]
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/linux-3.3/arch/powerpc/boot/dts/ |
D | mpc8572ds.dtsi | 2 * MPC8572DS Device Tree Source stub (no addresses or top-level ranges) 14 * names of its contributors may be used to endorse or promote products 37 #address-cells = <1>; 38 #size-cells = <1>; 39 compatible = "cfi-flash"; 40 reg = <0x0 0x0 0x8000000>; 41 bank-width = <2>; 42 device-width = <1>; 45 reg = <0x0 0x03000000>; 46 read-only; [all …]
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/linux-3.3/arch/mips/include/asm/ |
D | regdef.h | 8 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. 10 * written by Ralf Baechle <ralf@linux-mips.org> 20 * Symbolic register names for 32 bit ABI 23 #define AT $1 /* assembler temp - uppercase because of ".set at" */ 66 #define AT $at /* assembler temp - uppercase because of ".set at" */ 67 #define v0 $2 /* return value - caller saved */ 73 #define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */ 98 #define gp $28 /* global pointer - caller saved for PIC */
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/linux-3.3/Documentation/devicetree/bindings/powerpc/fsl/ |
D | dcsr.txt | 6 to change. Some of the compatible strings that contain only generic names 21 - compatible 24 Definition: Must include "fsl,dcsr" and "simple-bus". 25 The DCSR space exists in the memory-mapped bus. 27 - #address-cells 33 - #size-cells 40 - ranges 42 Value type: <prop-encoded-array> 48 #address-cells = <1>; 49 #size-cells = <1>; [all …]
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/linux-3.3/drivers/staging/wlags49_h2/ |
D | wl_priv.h | 5 * Copyright (c) 1998-2003 Agere Systems Inc. 12 *------------------------------------------------------------------------------ 16 *------------------------------------------------------------------------------ 40 * . Neither the name of Agere Systems Inc. nor the names of the contributors 113 int wvlan_rts_read( __u16 reg, __u16 *val, __u32 io_base ); 114 int wvlan_rts_write( __u16 reg, __u16 val, __u32 io_base );
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/linux-3.3/arch/arm/plat-nomadik/ |
D | timer.c | 2 * linux/arch/arm/plat-nomadik/timer.c 6 * Copyright (C) 2010 Linus Walleij for ST-Ericsson 31 * registers. These are register names. 39 /* per-timer registers take 0..3 as argument */ 42 #define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ 47 #define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ 71 static u32 nmdk_cycle; /* write-once */ 86 return -readl(mtu_base + MTU_VAL(0)); in nomadik_read_sched_clock() 90 /* Clockevent device: use one-shot mode */ 107 /* Timer: configure load and background-load, and fire it up */ in nmdk_clkevt_reset() [all …]
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