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/linux-6.8/Documentation/devicetree/bindings/media/cec/
Dcec-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/cec-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans Verkuil <hverkuil@xs4all.nl>
14 pattern: "^cec(@[0-9a-f]+|-[0-9]+)?$"
16 hdmi-phandle:
21 needs-hpd:
24 The CEC support is only available when the HPD is high. Some boards only
25 let the CEC pin through if the HPD is high, for example if there is a
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Dsamsung,s5p-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/samsung,s5p-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
14 - $ref: cec-common.yaml#
18 const: samsung,s5p-cec
23 clock-names:
25 - const: hdmicec
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/linux-6.8/Documentation/admin-guide/media/
Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
18 - Raspberry Pi
19 - dw-hdmi (Synopsis IP)
20 - amlogic (meson ao-cec and ao-cec-g12a)
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/linux-6.8/drivers/gpu/drm/bridge/
Dti-tpd12s015.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on the omapdrm-specific encoder-opa362 driver
47 return -EINVAL; in tpd12s015_attach()
49 ret = drm_bridge_attach(bridge->encoder, tpd->next_bridge, in tpd12s015_attach()
54 gpiod_set_value_cansleep(tpd->ls_oe_gpio, 1); in tpd12s015_attach()
56 /* DC-DC converter needs at max 300us to get to 90% of 5V. */ in tpd12s015_attach()
66 gpiod_set_value_cansleep(tpd->ls_oe_gpio, 0); in tpd12s015_detach()
73 if (gpiod_get_value_cansleep(tpd->hpd_gpio)) in tpd12s015_detect()
83 gpiod_set_value_cansleep(tpd->ct_cp_hpd_gpio, 1); in tpd12s015_hpd_enable()
90 gpiod_set_value_cansleep(tpd->ct_cp_hpd_gpio, 0); in tpd12s015_hpd_disable()
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/linux-6.8/drivers/gpu/drm/meson/
Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
47 * | HDMI TOP |<= HPD
55 * The HDMI TOP block only supports HPD sensing.
79 * - HPD Rise & Fall interrupt
80 * - HDMI Controller Interrupt
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/linux-6.8/drivers/gpu/drm/amd/display/dc/
Ddc.h2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
103 // for example, 1080p -> 8K is 4.0, or 4000 raw value
111 // for example, 8K -> 1080p is 0.25, or 250 raw value
123 * DOC: color-management-caps
128 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
135 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
151 * struct dpp_color_caps - color pipeline capabilities for display pipe and
156 * just plain 256-entry lookup
165 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
166 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
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/linux-6.8/Documentation/userspace-api/media/cec/
Dcec-ioc-adap-g-caps.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 CEC_ADAP_G_CAPS - Query device capabilities
42 .. flat-table:: struct cec_caps
43 :header-rows: 0
44 :stub-columns: 0
47 * - char
48 - ``driver[32]``
49 - The name of the cec adapter driver.
50 * - char
51 - ``name[32]``
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/linux-6.8/arch/powerpc/include/asm/book3s/64/
Dhash-4k.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 * Define the address range of the kernel non-linear virtual area (61TB)
78 static inline int hash__hugepd_ok(hugepd_t hpd) in hash__hugepd_ok() argument
80 unsigned long hpdval = hpd_val(hpd); in hash__hugepd_ok()
95 * things are a little more involved and hence needs many more parameters to
/linux-6.8/drivers/gpu/drm/msm/hdmi/
Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <sound/hdmi-codec.h>
24 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
27 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode()
39 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
48 /* Process HPD: */ in msm_hdmi_irq()
49 msm_hdmi_hpd_irq(hdmi->bridge); in msm_hdmi_irq()
52 msm_hdmi_i2c_irq(hdmi->i2c); in msm_hdmi_irq()
55 if (hdmi->hdcp_ctrl) in msm_hdmi_irq()
56 msm_hdmi_hdcp_irq(hdmi->hdcp_ctrl); in msm_hdmi_irq()
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/linux-6.8/drivers/gpu/drm/amd/amdgpu/
Datombios_dp.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
34 #include "atom-bits.h"
63 struct drm_device *dev = chan->dev; in amdgpu_atombios_dp_process_aux_ch()
73 mutex_lock(&chan->mutex); in amdgpu_atombios_dp_process_aux_ch()
75 base = (unsigned char *)(adev->mode_info.atom_context->scratch + 1); in amdgpu_atombios_dp_process_aux_ch()
82 args.v2.ucChannelID = chan->rec.i2c_id; in amdgpu_atombios_dp_process_aux_ch()
84 args.v2.ucHPD_ID = chan->rec.hpd; in amdgpu_atombios_dp_process_aux_ch()
86 amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); in amdgpu_atombios_dp_process_aux_ch()
92 r = -ETIMEDOUT; in amdgpu_atombios_dp_process_aux_ch()
99 r = -EIO; in amdgpu_atombios_dp_process_aux_ch()
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Ddce_v11_0.c93 uint32_t hpd; member
99 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
104 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
109 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
114 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
119 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
124 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
164 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
201 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
204 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
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Ddce_v10_0.c89 uint32_t hpd; member
95 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
100 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
110 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
115 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
120 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
149 switch (adev->asic_type) { in dce_v10_0_init_golden_registers()
177 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
180 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
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Ddce_v8_0.c82 (0x13830 - 0x7030) >> 2,
89 uint32_t hpd; member
95 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
100 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
110 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
115 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
120 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
129 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
132 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
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Ddce_v6_0.c72 mmDC_HPD1_INT_STATUS - mmDC_HPD1_INT_STATUS,
73 mmDC_HPD2_INT_STATUS - mmDC_HPD1_INT_STATUS,
74 mmDC_HPD3_INT_STATUS - mmDC_HPD1_INT_STATUS,
75 mmDC_HPD4_INT_STATUS - mmDC_HPD1_INT_STATUS,
76 mmDC_HPD5_INT_STATUS - mmDC_HPD1_INT_STATUS,
77 mmDC_HPD6_INT_STATUS - mmDC_HPD1_INT_STATUS,
87 (0x13830 - 0x7030) >> 2,
94 uint32_t hpd; member
100 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
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Damdgpu_atombios.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
35 #include "atom-bits.h"
52 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
53 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
54 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
55 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
56 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
57 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
58 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
59 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex); in amdgpu_atombios_get_bus_rec_for_i2c_gpio()
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/linux-6.8/drivers/gpu/drm/panel/
Dpanel-edp.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
46 * struct panel_delay - Describes delays for a simple panel.
50 * @hpd_reliable: Time for HPD to be reliable
53 * before the HPD signal is reliable. Ideally this is 0 but some panels,
57 * Presumably some old panels simply didn't have HPD hooked up and put
59 * hpd_absent. While that works, it's non-ideal.
64 * @hpd_absent: Time to wait if HPD isn't hooked up.
68 * This is T3-max on eDP timing diagrams or the delay from power on
69 * until HPD is guaranteed to be asserted.
76 * The minimum time, in milliseconds, that needs to have passed
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/linux-6.8/drivers/gpu/drm/radeon/
Datombios_dp.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
32 #include "atom-bits.h"
48 /* Atom needs data in little endian format so swap as appropriate when copying
90 struct drm_device *dev = chan->dev; in radeon_process_aux_ch()
91 struct radeon_device *rdev = dev->dev_private; in radeon_process_aux_ch()
100 mutex_lock(&chan->mutex); in radeon_process_aux_ch()
101 mutex_lock(&rdev->mode_info.atom_context->scratch_mutex); in radeon_process_aux_ch()
103 base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1); in radeon_process_aux_ch()
110 args.v1.ucChannelID = chan->rec.i2c_id; in radeon_process_aux_ch()
113 args.v2.ucHPD_ID = chan->rec.hpd; in radeon_process_aux_ch()
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/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_display_driver.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2022-2023 Intel Corporation
64 * apple-gmux is needed on dual GPU MacBook Pro in intel_display_driver_probe_defer()
70 /* If the LCD panel has a privacy-screen, wait for it */ in intel_display_driver_probe_defer()
71 privacy_screen = drm_privacy_screen_get(&pdev->dev, NULL); in intel_display_driver_probe_defer()
72 if (IS_ERR(privacy_screen) && PTR_ERR(privacy_screen) == -EPROBE_DEFER) in intel_display_driver_probe_defer()
87 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_display_driver_init_hw()
90 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
91 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw; in intel_display_driver_init_hw()
114 struct drm_mode_config *mode_config = &i915->drm.mode_config; in intel_mode_config_init()
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Dintel_crt.c2 * Copyright © 2006-2007 Intel Corporation
102 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state()
108 encoder->power_domain); in intel_crt_get_hw_state()
112 ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe); in intel_crt_get_hw_state()
114 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state()
121 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_flags()
125 tmp = intel_de_read(dev_priv, crt->adpa_reg); in intel_crt_get_flags()
143 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
145 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
147 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
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/linux-6.8/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c46 * What DM provides on top are two IRQ tables specifically for top-half and
47 * bottom-half IRQ handling, with the bottom-half implementing workqueues:
49 * - &amdgpu_display_manager.irq_handler_list_high_tab
50 * - &amdgpu_display_manager.irq_handler_list_low_tab
56 * still needs to register the IRQ with the base driver. See
69 * struct amdgpu_dm_irq_handler_data - Data for DM interrupt handlers.
90 spin_lock_irqsave(&adev->dm.irq_handler_list_table_lock, flags)
93 spin_unlock_irqrestore(&adev->dm.irq_handler_list_table_lock, flags)
104 hcd->handler = ih; in init_handler_common_data()
105 hcd->handler_arg = args; in init_handler_common_data()
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/linux-6.8/drivers/media/i2c/
Dtda1997x_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
127 /* HPD Detection */
129 #define DETECT_HPD BIT(6) /* HPD of HDMI level */
157 #define HPD_MAN_CTRL_HPD_PULSE BIT(7) /* HPD Pulse low 110ms */
159 #define HPD_MAN_CTRL_HPD_B BIT(1) /* Assert HPD High for Input A */
160 #define HPD_MAN_CTRL_HPD_A BIT(0) /* Assert HPD High for Input A */
165 #define RT_MAN_CTRL_RT_B BIT(1) /* enable TMDS pull-up on Input B */
166 #define RT_MAN_CTRL_RT_A BIT(0) /* enable TMDS pull-up on Input A */
212 #define PCLK_DELAY_SHIFT 4 /* Pixel delay (-8..+7) */
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/linux-6.8/include/drm/display/
Ddrm_dp_helper.h75 * struct drm_dp_vsc_sdp - drm DP VSC SDP
78 * It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and
79 * [Table 2-117: VSC SDP Payload for DB16 through DB18]
81 * @sdp_type: secondary-data packet type
88 * @content_type: CTA-861-G defines content types and expected processing by a sink device
177 return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & in drm_dp_sink_supports_dsc()
184 return dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] | in drm_edp_dsc_sink_output_bpp()
185 ((dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] & in drm_edp_dsc_sink_output_bpp()
193 return dsc_dpcd[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * in drm_dp_dsc_sink_max_slice_width()
198 * drm_dp_dsc_sink_supports_format() - check if sink supports DSC with given output format
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/linux-6.8/arch/arm/boot/dts/samsung/
Dexynos4412-odroidu3.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
11 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include "exynos4412-odroid-common.dtsi"
14 #include "exynos4412-prime.dtsi"
17 model = "Hardkernel ODROID-U3 board based on Exynos4412";
18 compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
29 vbus_otg_reg: regulator-1 {
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Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
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/linux-6.8/drivers/gpu/drm/bridge/analogix/
Danx7625.c1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <media/v4l2-fwnode.h>
36 #include <sound/hdmi-codec.h>
50 struct device *dev = &client->dev; in i2c_access_workaround()
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
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