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/linux-3.3/arch/sh/lib/
Dmemcpy-sh4.S30 mov r4,r2 ! 5 MT (0 cycles latency)
32 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
39 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK
40 mov r7, r3 ! 5 MT (latency=0) ! RQPO
45 mov r1,r6 ! 5 MT (latency=0)
49 mov r1, r7 ! 5 MT (latency=0)
56 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN
57 mov r7,r3 ! 5 MT (latency=0) ! OPQR
63 mov r1,r6 ! 5 MT (latency=0)
66 mov r1,r7 ! 5 MT (latency=0)
[all …]
/linux-3.3/Documentation/devicetree/bindings/arm/
Dl2cc.txt20 - arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of
22 without setup latency control should use a value of 0.
23 - arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of
24 read, write and setup latencies. Controllers without setup latency control
25 should use 0. Controllers without separate read and write Tag RAM latency
27 - arm,dirty-latency : Cycles of latency for Dirty RAMs. This is a single cell.
38 arm,data-latency = <1 1 1>;
39 arm,tag-latency = <2 2 2>;
40 arm,filter-latency = <0x80000000 0x8000000>;
/linux-3.3/kernel/
Dlatencytop.c2 * latencytop.c: Latency display infrastructure
14 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
15 * used by the "latencytop" userspace tool. The latency that is tracked is not
16 * the 'traditional' interrupt latency (which is primarily caused by something
17 * else consuming CPU), but instead, it is the latency an application encounters
21 * 1) System level latency
22 * 2) Per process latency
24 * The latency is stored in fixed sized data structures in an accumulated form;
25 * if the "same" latency cause is hit twice, this will be tracked as one entry
26 * in the data structure. Both the count, total accumulated latency and maximum
[all …]
DKconfig.preempt22 This option reduces the latency of the kernel by adding more
25 latency of rescheduling, providing faster application reactions,
37 bool "Preemptible Kernel (Low-Latency Desktop)"
40 This option reduces the latency of the kernel by making
51 embedded system with latency requirements in the milliseconds
/linux-3.3/arch/cris/arch-v10/lib/
Ddram_init.S49 ; CAS latency = 2 && bus_width = 32 => 0x40
50 ; CAS latency = 3 && bus_width = 32 => 0x60
51 ; CAS latency = 2 && bus_width = 16 => 0x20
52 ; CAS latency = 3 && bus_width = 16 => 0x30
60 move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
63 and.d 0x03, $r1 ; Get CAS latency
68 cmp.d 0x00, $r1 ; CAS latency = 2?
71 or.d 0x20, $r2 ; CAS latency = 3
75 cmp.d 0x01, $r1 ; CAS latency = 2?
78 or.d 0x20, $r2 ; CAS latency = 3
/linux-3.3/arch/arm/plat-omap/include/plat/
Domap-pm.h67 * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
69 * @t: maximum MPU wakeup latency in microseconds
71 * Request that the maximum interrupt latency for the MPU to be no
72 * greater than @t microseconds. "Interrupt latency" in this case is
84 * This function will not affect device wakeup latency, e.g., time
87 * other use. To control this device wakeup latency, use
91 * previous t value. To remove the latency target for the MPU, call
120 * latency, other competing users on the system, etc. On OMAP2/3, if
136 * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
139 * @t: maximum device wakeup latency in microseconds
[all …]
/linux-3.3/Documentation/arm/OMAP/
Domap_pm6 authors use these functions to communicate minimum latency or
17 latency framework or something else;
20 latency and throughput, rather than units which are specific to OMAP
34 1. Set the maximum MPU wakeup latency:
37 2. Set the maximum device wakeup latency:
40 3. Set the maximum system DMA transfer start latency (CORE pwrdm):
82 latency, and the set_max_dev_wakeup_lat() function to constrain the
83 device wakeup latency (from clk_enable() to accessibility). For
86 /* Limit MPU wakeup latency */
90 /* Limit device powerdomain wakeup latency */
[all …]
/linux-3.3/arch/alpha/lib/
Dev67-strrchr.S37 ldq_u t0, 0(a0) # L : load first quadword Latency=3
68 nop # : Latency=2, extra map slot (keep nop with cmov)
71 cmovne t3, t3, t8 # E : Latency=2, extra map slot
89 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
96 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
100 nop # E : hide the cmov latency (2) behind ctlz latency
105 ret # L0 : Latency=3
Dmemset.S32 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
33 sll $17,16,$1 /* E1 (p-c latency, next cycle) */
35 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
36 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
37 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
48 beq $1,within_one_quad /* .. E1 (note EV5 zero-latency forwarding) */
50 beq $3,aligned /* .. E1 (note EV5 zero-latency forwarding) */
Dev6-csum_ipv6_magic.S35 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
62 ldq_u $0,0($16) # L : Latency: 3
64 ldq_u $1,8($16) # L : Latency: 3
68 ldq_u $5,15($16) # L : Latency: 3
70 ldq_u $2,0($17) # L : U L U L : Latency: 3
74 ldq_u $3,8($17) # L : Latency: 3
78 ldq_u $23,15($17) # L : Latency: 3
/linux-3.3/arch/blackfin/
DKconfig698 into L1 instruction memory. (less latency)
707 (less latency)
715 into L1 instruction memory. (less latency)
723 into L1 instruction memory. (less latency)
731 into L1 instruction memory. (less latency)
739 into L1 instruction memory. (less latency)
747 into L1 instruction memory. (less latency)
755 into L1 instruction memory. (less latency)
763 into L1 instruction memory. (less latency)
771 into L1 instruction memory. (less latency)
[all …]
/linux-3.3/arch/cris/arch-v32/mach-fs/
Ddram_init.S36 ; CAS latency = 2 && bus_width = 32 => 0x40
37 ; CAS latency = 3 && bus_width = 32 => 0x60
38 ; CAS latency = 2 && bus_width = 16 => 0x20
39 ; CAS latency = 3 && bus_width = 16 => 0x30
46 move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2
48 and.d 0x07, $r1 ; Get CAS latency
/linux-3.3/Documentation/trace/
Dftrace.txt116 Some of the tracers record the max latency.
121 latency is greater than the value in this
208 the trace with the longest max latency.
211 trace with the latency-format option enabled.
226 Traces and records the max latency that it takes for
272 Latency trace format
275 When the latency-format option is enabled, the trace file gives
276 somewhat more information to see why a latency happened.
281 irqsoff latency trace v1.1.5 on 2.6.26-rc8
283 latency: 97 us, #3/3, CPU#0 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:2)
[all …]
/linux-3.3/arch/arm/mach-omap2/
Dgpmc-onenand.c97 static void set_onenand_cfg(void __iomem *onenand_base, int latency, in set_onenand_cfg() argument
104 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | in set_onenand_cfg()
178 int tick_ns, div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency; in omap2_onenand_set_sync_mode() local
250 latency = 8; in omap2_onenand_set_sync_mode()
252 latency = 6; in omap2_onenand_set_sync_mode()
254 latency = 3; in omap2_onenand_set_sync_mode()
256 latency = 4; in omap2_onenand_set_sync_mode()
275 set_onenand_cfg(onenand_base, latency, in omap2_onenand_set_sync_mode()
317 t.access = gpmc_ticks_to_ns(fclk_offset + (latency + 1) * div); in omap2_onenand_set_sync_mode()
321 t.rd_cycle = gpmc_ticks_to_ns(fclk_offset + (latency + 1) * div + in omap2_onenand_set_sync_mode()
[all …]
/linux-3.3/Documentation/networking/
De1000e.txt62 but will increase latency as packets are not processed as quickly.
66 all traffic types, but lacking in small packet performance and latency.
79 "Bulk traffic", for large amounts of packets of normal size; "Low latency",
81 packets; and "Lowest latency", for almost completely small packets or
86 latency" or "Lowest latency" class, the InterruptThrottleRate is increased
89 For situations where low latency is vital such as cluster or
90 grid computing, the algorithm can reduce latency even more when
93 70000 for traffic in class "Lowest latency".
102 and may improve small packet latency, but is generally not suitable
134 extra latency to frame reception and can end up decreasing the throughput
Dtcp-thin.txt9 on the data delivery latency, packet loss can be devastating for
21 In order to reduce application-layer latency when packets are lost,
22 a set of mechanisms has been made, which address these latency issues
45 "Improving latency for interactive, thin-stream applications over
/linux-3.3/arch/arm/mach-cns3xxx/
Dcore.c262 * bit[10:8] - 1 cycle of write accesses latency in cns3xxx_l2x0_init()
263 * bit[6:4] - 1 cycle of read accesses latency in cns3xxx_l2x0_init()
264 * bit[3:0] - 1 cycle of setup latency in cns3xxx_l2x0_init()
266 * 1 cycle of latency for setup, read and write accesses in cns3xxx_l2x0_init()
275 * bit[10:8] - 1 cycles of write accesses latency in cns3xxx_l2x0_init()
276 * bit[6:4] - 1 cycles of read accesses latency in cns3xxx_l2x0_init()
277 * bit[3:0] - 1 cycle of setup latency in cns3xxx_l2x0_init()
279 * 1 cycle of latency for setup, read and write accesses in cns3xxx_l2x0_init()
/linux-3.3/Documentation/cpuidle/
Dsysfs.txt39 -r--r--r-- 1 root root 4096 Feb 8 10:42 latency
48 -r--r--r-- 1 root root 4096 Feb 8 10:42 latency
57 -r--r--r-- 1 root root 4096 Feb 8 10:42 latency
66 -r--r--r-- 1 root root 4096 Feb 8 10:42 latency
75 * latency : Latency to exit out of this idle state (in microseconds)
/linux-3.3/drivers/media/dvb/mantis/
Dmantis_pci.c51 u8 latency; in mantis_pci_init() local
97 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency); in mantis_pci_init()
98 mantis->latency = latency; in mantis_pci_init()
107 "irq: %d, latency: %d\n memory: 0x%lx, mmio: 0x%p\n", in mantis_pci_init()
109 mantis->latency, in mantis_pci_init()
/linux-3.3/drivers/pci/pcie/
Daspm.c37 u32 l0s; /* L0s latency (nsec) */
38 u32 l1; /* L1 latency (nsec) */
52 u32 aspm_capable:3; /* Capable ASPM state with latency */
62 struct aspm_latency latency_up; /* Upstream direction exit latency */
63 struct aspm_latency latency_dw; /* Downstream direction exit latency */
181 * common clock. That will reduce the ASPM state exit latency.
258 /* Convert L0s latency encoding to ns */
266 /* Convert L0s acceptable latency encoding to ns */
274 /* Convert L1 latency encoding to ns */
282 /* Convert L1 acceptable latency encoding to ns */
[all …]
/linux-3.3/arch/arm/plat-omap/
Domap-pm-noop.c44 pr_debug("OMAP PM: remove max MPU wakeup latency constraint: " in omap_pm_set_max_mpu_wakeup_lat()
47 pr_debug("OMAP PM: add max MPU wakeup latency constraint: " in omap_pm_set_max_mpu_wakeup_lat()
54 * the latency constraint has changed, the code should in omap_pm_set_max_mpu_wakeup_lat()
100 pr_debug("OMAP PM: remove max device latency constraint: " in omap_pm_set_max_dev_wakeup_lat()
103 pr_debug("OMAP PM: add max device latency constraint: " in omap_pm_set_max_dev_wakeup_lat()
110 * the latency constraint has changed, the code should in omap_pm_set_max_dev_wakeup_lat()
130 pr_debug("OMAP PM: remove max DMA latency constraint: " in omap_pm_set_max_sdma_lat()
133 pr_debug("OMAP PM: add max DMA latency constraint: " in omap_pm_set_max_sdma_lat()
143 * latency params, this code should just set the dma_latency param. in omap_pm_set_max_sdma_lat()
Domap_device.c122 * @ignore_lat: increase to latency target (0) or full readiness (1)?
125 * wakeup latency, but consuming more power). If @ignore_lat is
128 * latency is greater than the requested maximum wakeup latency, step
130 * device's maximum wakeup latency is less than or equal to the
131 * requested maximum wakeup latency. Returns 0.
170 "new worst case activate latency " in _omap_device_activate()
175 "activate latency %d " in _omap_device_activate()
190 * @ignore_lat: decrease to latency target (0) or full inactivity (1)?
193 * wakeup latency, but conserving power). If @ignore_lat is
196 * latency is less than the requested maximum wakeup latency, step
[all …]
/linux-3.3/drivers/cpufreq/
Dpowernow-k7.c101 static unsigned int latency; variable
226 fidvidctl.bits.SGTC = latency; in change_FID()
241 fidvidctl.bits.SGTC = latency; in change_VID()
411 if (latency < pc.bits.sgtc) in powernow_acpi_init()
412 latency = pc.bits.sgtc; in powernow_acpi_init()
487 latency = psb->settlingtime; in powernow_decode_bios()
488 if (latency < 100) { in powernow_decode_bios()
492 "Correcting.\n", latency); in powernow_decode_bios()
493 latency = 100; in powernow_decode_bios()
578 sgtc = 100 * m * latency; in fixup_sgtc()
[all …]
Dcpufreq_conservative.c38 * latency of the processor. The governor will work on any processor with
39 * transition latency <= 10mS, using appropriate sampling
41 * For CPUs with transition latency > 10mS (mostly drivers with CPUFREQ_ETERNAL)
517 unsigned int latency; in cpufreq_governor_dbs() local
518 /* policy latency is in nS. Convert it to uS first */ in cpufreq_governor_dbs()
519 latency = policy->cpuinfo.transition_latency / 1000; in cpufreq_governor_dbs()
520 if (latency == 0) in cpufreq_governor_dbs()
521 latency = 1; in cpufreq_governor_dbs()
538 MIN_LATENCY_MULTIPLIER * latency); in cpufreq_governor_dbs()
541 latency * LATENCY_MULTIPLIER); in cpufreq_governor_dbs()
[all …]
/linux-3.3/drivers/gpu/drm/nouveau/
Dnouveau_calc.c118 const int burst_lat = 80; /* Maximum allowable latency due in nv10_calc_arb()
130 /* Fixed FIFO refill latency. */ in nv10_calc_arb()
146 + 2 /* latency fifo */ in nv10_calc_arb()
154 fill_lat = mclks * 1000 * 1000 / mclk_freq /* minimum mclk latency */ in nv10_calc_arb()
155 + nvclks * 1000 * 1000 / nvclk_freq /* nvclk latency */ in nv10_calc_arb()
156 + pclks * 1000 * 1000 / pclk_freq; /* pclk latency */ in nv10_calc_arb()
158 /* Conditional FIFO refill latency. */ in nv10_calc_arb()
160 xclks = 2 * arb->mem_page_miss + mclks /* Extra latency due to in nv10_calc_arb()
162 + 2 * arb->mem_page_miss /* Extra pagemiss latency. */ in nv10_calc_arb()
178 /* Max burst value with an acceptable latency. */ in nv10_calc_arb()

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