97 static void set_onenand_cfg(void __iomem *onenand_base, int latency,  in set_onenand_cfg()  argument
104 	reg |=	(latency << ONENAND_SYS_CFG1_BRL_SHIFT) |  in set_onenand_cfg()
178 	int tick_ns, div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;  in omap2_onenand_set_sync_mode()  local
250 		latency = 8;  in omap2_onenand_set_sync_mode()
252 		latency = 6;  in omap2_onenand_set_sync_mode()
254 		latency = 3;  in omap2_onenand_set_sync_mode()
256 		latency = 4;  in omap2_onenand_set_sync_mode()
275 		set_onenand_cfg(onenand_base, latency,  in omap2_onenand_set_sync_mode()
317 	t.access = gpmc_ticks_to_ns(fclk_offset + (latency + 1) * div);  in omap2_onenand_set_sync_mode()
321 	t.rd_cycle = gpmc_ticks_to_ns(fclk_offset + (latency + 1) * div +  in omap2_onenand_set_sync_mode()
370 	set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf);  in omap2_onenand_set_sync_mode()