Home
last modified time | relevance | path

Searched +full:data +full:- +full:channel (Results 1 – 25 of 274) sorted by relevance

1234567891011

/qemu/include/io/
H A Dchannel.h25 #include "qemu/coroutine-core.h"
28 #define TYPE_QIO_CHANNEL "qio-channel"
33 #define QIO_CHANNEL_ERR_BLOCK -2
62 gpointer data);
67 * The QIOChannel defines the core API for a generic I/O channel
71 * - Use QOM to properly support arbitrary subclassing
72 * - Support use of iovecs for efficient I/O with multiple blocks
73 * - None of the character set translation, binary data exclusively
74 * - Direct support for QEMU Error object reporting
75 * - File descriptor passing
[all …]
H A Dchannel-socket.h24 #include "io/channel.h"
29 #define TYPE_QIO_CHANNEL_SOCKET "qio-channel-socket"
36 * The QIOChannelSocket class provides a channel implementation
37 * that can transport data over a UNIX socket or TCP socket.
38 * Beyond the core channel API, it also provides functionality
58 * Create a channel for performing I/O on a socket
63 * Returns: the socket channel object
71 * @errp: pointer to a NULL-initialized error object
73 * Create a channel for performing I/O on the socket
76 * Returns: the socket channel object, or NULL on error
[all …]
H A Dchannel-buffer.h24 #include "io/channel.h"
27 #define TYPE_QIO_CHANNEL_BUFFER "qio-channel-buffer"
34 * The QIOChannelBuffer object provides a channel implementation
42 size_t usage; /* Current size of data */
44 uint8_t *data; member
54 * Returns: the new channel object
H A Dchannel-websock.h24 #include "io/channel.h"
29 #define TYPE_QIO_CHANNEL_WEBSOCK "qio-channel-websock"
42 * The QIOChannelWebsock class provides a channel wrapper which
45 * technical restriction on which type of master channel is
48 * This channel object is currently only capable of running as
52 * client for encapsulating VNC for noVNC in-browser client.
72 * @master: the underlying channel object
74 * Create a new websockets channel that runs the server
77 * After creating the channel, it is mandatory to call
79 * todo any I/O on the channel.
[all …]
/qemu/docs/devel/
H A Ds390-dasd-ipl.rst1 Booting from real channel-attached devices on s390x
5 -----------------
15 2. Execute the Read IPL ccw at ``0x00``, thereby reading IPL1 data into ``0x00``.
16 IPL1 data is 24 bytes in length and consists of the following pieces of
18 IPL ccw it read the 24-bytes of IPL1 to be read into memory starting at
21 the original READ IPL ccw. The read ccw will read the IPL2 data into memory
22 and the TIC (Transfer In Channel) will transfer control to the channel
23 program contained in the IPL2 data. The TIC channel command is the
24 equivalent of a branch/jump/goto instruction for channel programs.
29 The TIC ccw instruction at the end of the IPL1 channel program will begin
[all …]
/qemu/hw/char/
H A Dtrace-events10 …udrate, char parity, int data_bits, int stop_bits) "baudrate=%"PRIu64" parity='%c' data=%d stop=%d"
12 # virtio-serial-bus.c
18 # virtio-console.c
40 escc_soft_reset_chn(char channel) "soft reset channel %c"
41 escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
42 escc_get_queue(char channel, int val) "channel %c get 0x%02x"
44 …scc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel
45 escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = 0x%2.2x"
46 escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
47 escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = 0x%2.2x"
[all …]
H A Dexynos4210_uart.c26 #include "qemu/error-report.h"
29 #include "chardev/char-fe.h"
30 #include "chardev/char-serial.h"
34 #include "hw/qdev-properties.h"
35 #include "hw/qdev-properties-system.h"
64 * 'reg' - register offset (see offsets definitions above)
137 uint8_t *data; member
161 uint32_t channel; member
184 q->data[q->sp] = ch; in fifo_store()
185 q->sp = (q->sp + 1) % q->size; in fifo_store()
[all …]
H A Dipoctal232.c2 * QEMU GE IP-Octal 232 IndustryPack emulation
14 #include "hw/qdev-properties.h"
15 #include "hw/qdev-properties-system.h"
19 #include "chardev/char-fe.h"
31 #define DPRINTF(fmt, ...) DPRINTF2("IP-Octal: " fmt, ## __VA_ARGS__)
35 /* The IP-Octal has 8 channels (a-h)
36 divided into 4 blocks (A-D) */
171 /* data[10] is 0x0C, not 0x0B as the doc says */
182 SCC2698Block *blk0 = &dev->blk[block]; in update_irq()
183 SCC2698Block *blk1 = &dev->blk[block^1]; in update_irq()
[all …]
/qemu/migration/
H A Dmultifd.h4 * Copyright (c) 2019-2020 Red Hat Inc
10 * See the COPYING file in the top-level directory.
33 * channel.
72 * (MultiFDPacketDeviceState_t), not RAM data (MultiFDPacket_t).
102 * - normal pages (initial normal_pages entries)
103 * - zero pages (following zero_pages entries)
114 /* size of the next packet that contains the actual data */
162 static inline bool multifd_payload_empty(MultiFDSendData *data) in multifd_payload_empty() argument
164 return data->type == MULTIFD_PAYLOAD_NONE; in multifd_payload_empty()
167 static inline bool multifd_payload_device_state(MultiFDSendData *data) in multifd_payload_device_state() argument
[all …]
H A Dmultifd.c4 * Copyright (c) 2019-2020 Red Hat Inc
10 * See the COPYING file in the top-level directory.
20 #include "qemu/error-report.h"
25 #include "migration-stats.h"
29 #include "qemu-file.h"
35 #include "io/channel-file.h"
36 #include "io/channel-socket.h"
86 MultiFDRecvData *data; member
105 multifd_ram_payload_alloc(&new->u.ram); in multifd_send_data_alloc()
106 /* Device state allocates its payload on-demand */ in multifd_send_data_alloc()
[all …]
/qemu/tests/unit/
H A Dtest-io-channel-tls.c2 * QEMU I/O channel TLS test
26 #include "crypto-tls-x509-helpers.h"
27 #include "io/channel-tls.h"
28 #include "io/channel-socket.h"
29 #include "io-channel-helpers.h"
37 #define WORKDIR "tests/test-io-channel-tls-work/"
38 #define KEYFILE WORKDIR "key-ctx.pem"
59 struct QIOChannelTLSHandshakeData *data = opaque; in test_tls_handshake_done() local
61 data->finished = true; in test_tls_handshake_done()
62 data->failed = qio_task_propagate_error(task, NULL); in test_tls_handshake_done()
[all …]
H A Dtest-io-channel-socket.c2 * QEMU I/O channel sockets test
4 * Copyright (c) 2015-2016 Red Hat, Inc.
22 #include "io/channel-socket.h"
23 #include "io/channel-util.h"
24 #include "io-channel-helpers.h"
25 #include "socket-helpers.h"
28 #include "qemu/main-loop.h"
40 setsockopt(((QIOChannelSocket *)src)->fd, in test_io_channel_set_socket_bufs()
45 setsockopt(((QIOChannelSocket *)dst)->fd, in test_io_channel_set_socket_bufs()
63 if (listen_addr->type == SOCKET_ADDRESS_TYPE_INET) { in test_io_channel_setup_sync()
[all …]
H A Dtest-crypto-tlssession.c23 #include "crypto-tls-x509-helpers.h"
24 #include "crypto-tls-psk-helpers.h"
34 #define WORKDIR "tests/test-crypto-tlssession-work/"
36 #define KEYFILE WORKDIR "key-ctx.pem"
50 return -1; in testWrite()
68 return -1; in testRead()
101 int channel[2]; in test_crypto_tls_session_psk() local
106 /* We'll use this for our fake client-server connection */ in test_crypto_tls_session_psk()
107 ret = qemu_socketpair(AF_UNIX, SOCK_STREAM, 0, channel); in test_crypto_tls_session_psk()
112 * thread, so we need these non-blocking to avoid deadlock in test_crypto_tls_session_psk()
[all …]
/qemu/hw/dma/
H A Dxlnx_dpdma.c162 return ((desc->control & DSCR_CTRL_LAST_DESCRIPTOR) != 0); in xlnx_dpdma_desc_is_last()
167 return ((desc->control & DSCR_CTRL_LAST_DESCRIPTOR_OF_FRAME) != 0); in xlnx_dpdma_desc_is_last_of_frame()
178 addr = (uint64_t)desc->source_address in xlnx_dpdma_desc_get_source_address()
179 + (extract64(desc->address_extension, 16, 16) << 32); in xlnx_dpdma_desc_get_source_address()
182 addr = (uint64_t)desc->source_address2 in xlnx_dpdma_desc_get_source_address()
183 + (extract64(desc->address_extension_23, 0, 16) << 32); in xlnx_dpdma_desc_get_source_address()
186 addr = (uint64_t)desc->source_address3 in xlnx_dpdma_desc_get_source_address()
187 + (extract64(desc->address_extension_23, 16, 16) << 32); in xlnx_dpdma_desc_get_source_address()
190 addr = (uint64_t)desc->source_address4 in xlnx_dpdma_desc_get_source_address()
191 + (extract64(desc->address_extension_45, 0, 16) << 32); in xlnx_dpdma_desc_get_source_address()
[all …]
/qemu/qga/
H A Dchannel-posix.c6 #include "channel.h"
13 #define GA_CHANNEL_BAUDRATE_DEFAULT B38400 /* for isa-serial channels */
25 static gboolean ga_channel_listen_accept(GIOChannel *channel, in ga_channel_listen_accept() argument
26 GIOCondition condition, gpointer data) in ga_channel_listen_accept() argument
28 GAChannel *c = data; in ga_channel_listen_accept()
32 g_assert(channel != NULL); in ga_channel_listen_accept()
34 client_fd = qemu_accept(g_io_channel_unix_get_fd(channel), NULL, NULL); in ga_channel_listen_accept()
35 if (client_fd == -1) { in ga_channel_listen_accept()
54 * indicates we should use the existing s->listen_channel
59 c->listen_channel = g_io_channel_unix_new(listen_fd); in ga_channel_listen_add()
[all …]
/qemu/hw/audio/
H A Dpl041.c5 * Written by Mathieu Sonet - www.elasticsheep.com
15 * - Supports only a playback on one channel (Versatile/Vexpress)
16 * - Supports only one TX FIFO in compact-mode or non-compact mode.
17 * - Supports playback of 12, 16, 18 and 20 bits samples.
18 * - Record is not supported.
19 * - The PL041 is hardwired to a LM4549 codec.
25 #include "hw/qdev-properties.h"
61 /* This FIFO only stores 20-bit samples on 32-bit words.
65 uint32_t data[MAX_FIFO_DEPTH]; member
89 uint32_t fifo_depth; /* FIFO depth in non-compact mode */
[all …]
/qemu/hw/i2c/
H A Di2c_mux_pca954x.c22 #include "hw/qdev-core.h"
23 #include "hw/qdev-properties.h"
35 * struct Pca954xState - The pca954x state object.
37 * @channel: The set of i2c channel buses that act as channels which own the
52 * struct Pca954xClass - The pca954x class object.
65 * For each channel, if it's enabled, recursively call match on those children. in OBJECT_DECLARE_TYPE()
76 if ((candidate->address == address) || broadcast) { in OBJECT_DECLARE_TYPE()
78 node->elt = candidate; in OBJECT_DECLARE_TYPE()
85 for (i = 0; i < mc->nchans; i++) { in OBJECT_DECLARE_TYPE()
86 if (!mux->enabled[i]) { in OBJECT_DECLARE_TYPE()
[all …]
/qemu/hw/misc/
H A Daspeed_lpc.c4 * Copyright (C) 2017-2018 IBM Corp.
7 * the COPYING file in the top-level directory.
12 #include "qemu/error-report.h"
17 #include "hw/qdev-properties.h"
184 while (pos->name) { in aspeed_kcs_get_register_data_by_name()
185 if (!strcmp(pos->name, name)) { in aspeed_kcs_get_register_data_by_name()
199 while (pos->name) { in aspeed_kcs_get_channel_by_register()
200 if (pos->reg == reg) { in aspeed_kcs_get_channel_by_register()
201 return pos->chan; in aspeed_kcs_get_channel_by_register()
215 const struct aspeed_kcs_register_data *data; in aspeed_kcs_get_register_property() local
[all …]
H A Dbcm2835_cprman.c6 * SPDX-License-Identifier: GPL-2.0-or-later
11 * - the PLLs
12 * - the PLL channels
13 * - the clock muxes
16 * channels. Those channel are then connected to the clock muxes. Each mux has
23 * At each level (PLL, channel and mux), the clock can be altered through
27 * This can be sum-up as follows (this is an example and not the actual BCM2835
30 * /-->[PLL]-|->[PLL channel]--... [mux]--> to peripherals
31 * | |->[PLL channel] muxes takes [mux]
32 * | \->[PLL channel] inputs from [mux]
[all …]
/qemu/include/crypto/
H A Dtlssession.h36 * only requirement is a full-duplex stream of some kind.
69 * return -1;
82 * return -1;
89 * return -1;
102 * ....send/recv payload data on sess...
112 #define QCRYPTO_TLS_SESSION_ERR_BLOCK -2
120 * @errp: pointer to a NULL-initialized error object
123 * negotiate a TLS session over an arbitrary data channel.
144 * data is permitted to be sent/received.
171 * @errp: pointer to a NULL-initialized error object
[all …]
/qemu/pc-bios/s390-ccw/
H A Dvirtio-scsi.c2 * Virtio-SCSI implementation for s390 machine loader for qemu
8 * your option) any later version. See the COPYING file in the top-level
14 #include "s390-ccw.h"
17 #include "virtio-scsi.h"
18 #include "s390-time.h"
52 CDB_STATUS_VALID(resp->status) ? ": " : ": invalid ", in virtio_scsi_verify_response()
53 scsi_cdb_status_msg(resp->status), in virtio_scsi_verify_response()
54 resp->status == CDB_STATUS_CHECK_CONDITION ? " " : 0, in virtio_scsi_verify_response()
55 resp->sense_len ? scsi_cdb_asc_msg(resp->sense) in virtio_scsi_verify_response()
56 : "no sense data", in virtio_scsi_verify_response()
[all …]
H A Ddasd-ipl.c7 * your option) any later version. See the COPYING file in the top-level
13 #include "s390-ccw.h"
14 #include "s390-arch.h"
15 #include "dasd-ipl.h"
31 memcpy((void *)&lowcore->subchannel_id, prefix_page + 0xB8, 12); in disable_prefixing()
38 return ((ccw->cmd_code == CCW_CMD_DASD_READ || in is_read_tic_ccw_chain()
39 ccw->cmd_code == CCW_CMD_DASD_READ_MT) && in is_read_tic_ccw_chain()
40 ccw->chain && next_ccw->cmd_code == CCW_CMD_TIC); in is_read_tic_ccw_chain()
50 if (cur_ccw->cmd_code == CCW_CMD_TIC && in dynamic_cp_fixup()
51 cur_ccw->cda == ptr2u32(cur_ccw) - 8) { in dynamic_cp_fixup()
[all …]
/qemu/docs/devel/migration/
H A DCPR.rst8 the cpr-reboot and cpr-transfer modes are available.
18 cpr-reboot mode
19 ---------------
23 resumes by running QEMU with the ``-incoming`` option. Because the
25 be a type that streams data from one instance to the other.
38 ``guest-suspend-ram`` command to the QEMU guest agent. The agent
39 must be pre-installed in the guest, and the guest must support
48 memory, such as ``memory-backend-file,share=on``, and that the
49 ``x-ignore-shared`` capability be set. This combination allows memory
54 * Set the migration mode parameter to ``cpr-reboot``.
[all …]
/qemu/qapi/
H A Dcxl.json1 # -*- Mode: Python -*-
25 'data': ['informational',
32 # @cxl-inject-general-media-event:
42 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
46 # lower bits include some flags. See CXL r3.0 Table 8-43 General
50 # information. See CXL r3.0 Table 8-43 General Media Event
53 # @type: Type of memory event that occurred. See CXL r3.0 Table 8-43
57 # @transaction-type: Type of first transaction that caused the event
58 # to occur. See CXL r3.0 Table 8-43 General Media Event Record,
61 # @channel: The channel of the memory event location. A channel is an
[all …]
/qemu/include/hw/remote/
H A Dmpqemu-link.h2 * Communication channel between QEMU and remote device process
7 * See the COPYING file in the top-level directory.
16 #include "io/channel.h"
18 #include "io/channel-socket.h"
23 #define MPQEMU_MSG_HDR_SIZE offsetof(MPQemuMsg, data.u64)
31 * This uses a private protocol between QEMU and the remote process. vfio-user
69 * @size: Size of the data to be shared
70 * @data: Structured data
86 } data; member

1234567891011