xref: /qemu/hw/char/trace-events (revision f5e6e13124440797308d2c044f44d9e655fcb74d)
1# See docs/devel/tracing.rst for syntax documentation.
2
3# parallel.c
4parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x"
5parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x"
6
7# serial.c
8serial_read(uint16_t addr, uint8_t value) "read addr 0x%02x val 0x%02x"
9serial_write(uint16_t addr, uint8_t value) "write addr 0x%02x val 0x%02x"
10serial_update_parameters(uint64_t baudrate, char parity, int data_bits, int stop_bits) "baudrate=%"PRIu64" parity='%c' data=%d stop=%d"
11
12# virtio-serial-bus.c
13virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
14virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
15virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
16virtio_serial_handle_control_message_port(unsigned int port) "port %u"
17
18# virtio-console.c
19virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
20virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
21virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
22
23# goldfish_tty.c
24goldfish_tty_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%"PRIx64
25goldfish_tty_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%"PRIx64
26goldfish_tty_can_receive(void *dev, unsigned int available) "tty: %p available: %u"
27goldfish_tty_receive(void *dev, unsigned int size) "tty: %p size: %u"
28goldfish_tty_reset(void *dev) "tty: %p"
29goldfish_tty_realize(void *dev) "tty: %p"
30goldfish_tty_unrealize(void *dev) "tty: %p"
31goldfish_tty_instance_init(void *dev) "tty: %p"
32
33# grlib_apbuart.c
34grlib_apbuart_event(int event) "event:%d"
35grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
36grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
37
38# escc.c
39escc_hard_reset(void) "hard reset"
40escc_soft_reset_chn(char channel) "soft reset channel %c"
41escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
42escc_get_queue(char channel, int val) "channel %c get 0x%02x"
43escc_update_irq(int irq) "IRQ = %d"
44escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
45escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = 0x%2.2x"
46escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
47escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = 0x%2.2x"
48escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
49escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
50escc_sunkbd_event_in(int ch, const char *name, int down) "QKeyCode 0x%2.2x [%s], down %d"
51escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x"
52escc_kbd_command(int val) "Command %d"
53escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x"
54
55# imx_serial.c
56imx_serial_read(const char *chrname, uint64_t addr, uint64_t value) "%s:[0x%03" PRIu64 "] -> 0x%08" PRIx64
57imx_serial_write(const char *chrname, uint64_t addr, uint64_t value) "%s:[0x%03" PRIu64 "] <- 0x%08" PRIx64
58imx_serial_put_data(const char *chrname, uint32_t value) "%s: 0x%" PRIx32
59
60# pl011.c
61pl011_irq_state(int level) "irq state %d"
62pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
63pl011_read_fifo(unsigned rx_fifo_used, size_t rx_fifo_depth) "RX FIFO read, used %u/%zu"
64pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
65pl011_can_receive(uint32_t lcr, unsigned rx_fifo_used, size_t rx_fifo_depth, unsigned rx_fifo_available) "LCR 0x%02x, RX FIFO used %u/%zu, can_receive %u chars"
66pl011_fifo_rx_put(uint32_t c, unsigned read_count, size_t rx_fifo_depth) "RX FIFO push char [0x%02x] %d/%zu depth used"
67pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set"
68pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")"
69pl011_receive(int size) "recv %d chars"
70
71# cmsdk-apb-uart.c
72cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
73cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
74cmsdk_apb_uart_reset(void) "CMSDK APB UART: reset"
75cmsdk_apb_uart_receive(uint8_t c) "CMSDK APB UART: got character 0x%x from backend"
76cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pending"
77cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend"
78cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1"
79
80# nrf51_uart.c
81nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
82nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
83
84# shakti_uart.c
85shakti_uart_read(uint64_t addr, uint16_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx16 " size %u"
86shakti_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u"
87
88# exynos4210_uart.c
89exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)"
90exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready"
91exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32
92exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered"
93exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d wordtime: %"PRId64"ns"
94exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s <- 0x%" PRIx64
95exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s -> 0x%" PRIx64
96exynos_uart_rx_fifo_reset(uint32_t channel) "UART%d: Rx FIFO Reset"
97exynos_uart_tx_fifo_reset(uint32_t channel) "UART%d: Tx FIFO Reset"
98exynos_uart_tx(uint32_t channel, uint8_t ch) "UART%d: Tx 0x%02"PRIx32
99exynos_uart_intclr(uint32_t channel, uint32_t reg) "UART%d: interrupts cleared: 0x%08"PRIx32
100exynos_uart_ro_write(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to write into RO register: %s [0x%04"PRIx32"]"
101exynos_uart_rx(uint32_t channel, uint8_t ch) "UART%d: Rx 0x%02"PRIx32
102exynos_uart_rx_error(uint32_t channel) "UART%d: Rx error"
103exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to read from WO register: %s [0x%04"PRIx32"]"
104exynos_uart_rxsize(uint32_t channel, uint32_t size) "UART%d: Rx FIFO size: %d"
105exynos_uart_channel_error(uint32_t channel) "Wrong UART channel number: %d"
106exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d: Rx timeout stat=0x%x intsp=0x%x"
107
108# cadence_uart.c
109cadence_uart_baudrate(unsigned baudrate) "baudrate %u"
110
111# sh_serial.c
112sh_serial_read(char *id, unsigned size, uint64_t offs, uint64_t val) " %s size %d offs 0x%02" PRIx64 " -> 0x%02" PRIx64
113sh_serial_write(char *id, unsigned size, uint64_t offs, uint64_t val) "%s size %d offs 0x%02" PRIx64 " <- 0x%02" PRIx64
114
115# stm32l4x5_usart.c
116stm32l4x5_usart_read(uint64_t addr, uint32_t data) "USART: Read <0x%" PRIx64 "> -> 0x%" PRIx32 ""
117stm32l4x5_usart_write(uint64_t addr, uint32_t data) "USART: Write <0x%" PRIx64 "> <- 0x%" PRIx32 ""
118stm32l4x5_usart_rx(uint8_t c) "USART: got character 0x%x from backend"
119stm32l4x5_usart_tx(uint8_t c) "USART: character 0x%x sent to backend"
120stm32l4x5_usart_tx_pending(void) "USART: character send to backend pending"
121stm32l4x5_usart_irq_raised(uint32_t reg) "USART: IRQ raised: 0x%08"PRIx32
122stm32l4x5_usart_irq_lowered(void) "USART: IRQ lowered"
123stm32l4x5_usart_overrun_detected(uint8_t current, uint8_t received) "USART: Overrun detected, RDR='0x%x', received 0x%x"
124stm32l4x5_usart_receiver_not_enabled(uint8_t ue_bit, uint8_t re_bit) "USART: Receiver not enabled, UE=0x%x, RE=0x%x"
125stm32l4x5_usart_update_params(int speed, uint8_t parity, int data, int stop) "USART: speed: %d, parity: %c, data bits: %d, stop bits: %d"
126
127# xen_console.c
128xen_console_connect(unsigned int idx, unsigned int ring_ref, unsigned int port, unsigned int limit) "idx %u ring_ref %u port %u limit %u"
129xen_console_disconnect(unsigned int idx) "idx %u"
130xen_console_unrealize(unsigned int idx) "idx %u"
131xen_console_realize(unsigned int idx, const char *chrdev) "idx %u chrdev %s"
132xen_console_device_create(unsigned int idx) "idx %u"
133xen_console_device_destroy(unsigned int idx) "idx %u"
134
135# stm32f2xx_usart.c
136stm32f2xx_usart_read(char *id, unsigned size, uint64_t ofs, uint64_t val) " %s size %d ofs 0x%02" PRIx64 " -> 0x%02" PRIx64
137stm32f2xx_usart_write(char *id, unsigned size, uint64_t ofs, uint64_t val) "%s size %d ofs 0x%02" PRIx64 " <- 0x%02" PRIx64
138stm32f2xx_usart_drop(char *id) " %s dropping the chars"
139stm32f2xx_usart_receive(char *id, uint8_t chr) " %s receiving '%c'"
140
141# riscv_htif.c
142htif_uart_write_to_host(uint8_t device, uint8_t cmd, uint64_t payload) "device: %u cmd: %02u payload: %016" PRIx64
143htif_uart_unknown_device_command(uint8_t device, uint8_t cmd, uint64_t payload) "device: %u cmd: %02u payload: %016" PRIx64
144