#
f5e6e131 |
| 05-Mar-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250305' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove TCG dependency on ARM_GICV3 (Philippe) - Add MMIO interface to PVPanic device (Alexander) - Add
Merge tag 'hw-misc-20250305' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove TCG dependency on ARM_GICV3 (Philippe) - Add MMIO interface to PVPanic device (Alexander) - Add vmapple machine (Alexander & Phil) - Restrict part of sPAPR PAGE_INIT hypercall to TCG (Philippe) - Make ghes_record_cper_errors() scope static (Gavin) - Do not expose the ARM virt machines on Xen-only binary (Philippe) - Xen header cleanups (Philippe) - Set Freescale eTSEC network device description & category (Zoltan) - Improve RX FIFO depth for various UARTs (Philippe) - Prevent TX FIFO memory leak in SiFive UART (Alistair) - Cleanups in MacIO and AT24C EEPROM (Zoltan) - Add UFS temperature event notification support & test (Keoseong) - Remove printf() calls in hw/arm/ (Peter)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmfHpagACgkQ4+MsLN6t # wN4dTg//Z2neoENdnZglRp6q66LLxSTHJnHUMNHe2Bp+KKfhce+//j+CFYgOnJjV # P5eExzvHvtYFL6lNXOR7MTM/i/4pixcLYh8anyrnUWkEiufGXI4/30QePbwAAdkZ # kQ1CpLI43ZdnMLTh18JswLo/JMkl/jJGvCGNjhtQVnobqam+ATgAbjmcnwA8esJS # cCQVFzno9TNvsCnUtMe3IdOfIs9K3atCARbXpA3i3wd52P+NHvGO1jU0QPFBm2Lr # 4kcFLI1Sg2vYWD3FujDPeCcfI7kcRDIjHS6vVplK1VlCjjdaQmxx6XKO72PnZZOG # 7sra8xJpW8mZS2jfN2AxKMVlNndZMYzAJoS2UBMp1YX8KBEzlcmI2uSjGas6bcmQ # XIaP7/mggx7yBU3nspUl8rqY/3Z3wVjwepf1l8KOn9Z13wo+APv4aj6W+zkK96A5 # NGq6EpoKquINGLBBMkZAdfBOKk97NhwHh1Op04VgJNnPESpLnb5hENtZW1ksg92r # tijWdDWnC/JtWMU2dAnmT/9Vaxk4fukGqqncXqQJzGBw0OylzWh5b2Zer02WFyxz # oplISEwU3uFcg0OLa9aUHgs7lVWBUbEW3pSk1CtKuqgPtwxm/Gr2KbAVgAbFiyzr # 6YPQsfFP5z6CjreOWMELPWmsYV+jtTj/KoIek2QlYt7Ex6uiA6c= # =TcY9 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 05 Mar 2025 09:15:20 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250305' of https://github.com/philmd/qemu: (41 commits) hw/nvram/eeprom_at24c: Reorganise init to avoid overwriting values hw/nvram/eeprom_at24c: Remove memset after g_malloc0 hw/nvram/eeprom_at24c: Remove ERR macro that calls fprintf to stderr hw/nvram/eeprom_at24c: Use OBJECT_DECLARE_SIMPLE_TYPE hw/arm/versatilepb: Convert printfs to LOG_GUEST_ERROR hw/arm/omap_sx1: Remove ifdeffed out debug printf hw/arm/omap1: Convert information printfs to tracepoints hw/arm/omap1: Drop ALMDEBUG ifdeffed out code hw/arm/omap1: Convert raw printfs to qemu_log_mask() tests/qtest/ufs-test: Add test code for the temperature feature hw/ufs: Add temperature event notification support hw/misc/macio/gpio: Add constants for register bits hw/misc/macio: Improve trace logs hw/char/sifive_uart: Free fifo on unrealize hw/char/sh_serial: Return correct number of empty RX FIFO elements hw/char/mcf_uart: Really use RX FIFO depth hw/char/mcf_uart: Use FIFO_DEPTH definition instead of magic values hw/char/imx_serial: Really use RX FIFO depth hw/char/bcm2835_aux: Really use RX FIFO depth hw/char/pl011: Really use RX FIFO depth ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
2c459f73 |
| 19-Feb-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/char/pl011: Improve RX flow tracing events
Log FIFO use (availability and depth).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Revi
hw/char/pl011: Improve RX flow tracing events
Log FIFO use (availability and depth).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250220092903.3726-4-philmd@linaro.org>
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#
d6430c17 |
| 19-Jan-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
Second RISC-V PR for 10.0
* Reduce the overhead for simple RISC-V vector unit-stride loads and stores *
Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu into staging
Second RISC-V PR for 10.0
* Reduce the overhead for simple RISC-V vector unit-stride loads and stores * Add V bit to GDB priv reg * Add 'sha' support * Add traces for exceptions in user mode * Update Pointer Masking to Zjpm v1.0 * Add Smrnmi support * Fix timebase-frequency when using KVM acceleration * Add RISC-V Counter delegation ISA extension support * Add support for Smdbltrp and Ssdbltrp extensions * Introduce a translation tag for the IOMMU page table cache * Support Supm and Sspm as part of Zjpm v1.0 * Convert htif debug prints to trace event
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmeMUUwACgkQr3yVEwxT # gBNgDQ/+JeqcsbJRX+PZQJEV06tDIJpk+mfaBHUYSGdNkjI9fzowNaxFIEB2vaLt # 4+xAGMnJ4vMcjJyBcPOn1FKAlowM7MsUNITOF9Rstnyriqnj2UsUZ9YBtkuG6gWH # ZHoYEKu7mAZoZw5RRx4TatHDXw7TYfUsrDPrn+x6yeCZTq9ruRTlHkzp2LC725Vq # KTnbWAP7WlqiJaSxB5eIFYT5tYP1Blp0yD358B037C57EU9j5zm2FQdFmVK1+xRF # dFg/urBIzfAjjkCS/t9DmH+S6NgMEut6udUhllk/KUJAzWvsggc4wZZlWjFOJFJY # fIxx3alhY3pcm1PYjFpf15Poz6Pqva/KGjwgZafirKQtPbRSzfRkUwcHOYRTQT9j # abeiB44XPaeIl8Jvw7GLxcWtlJ5NmBrZho+2Z9mIhB/Ix5H3PDgs18Oc/s73P2qQ # JFLRb7cpYy1HbRc0ugvwAmOTY1t6HX8HAtT+3rNhiXpXnj4RW2C/WU1cEqrg8QkM # cTPiy2zHoBhAWt9aDK1Kvbhb1vur3JaF7rk9jeKlriFr87Ly+yPU+8mnEDw40NMR # Tc9nivqmOqqXS5AM9O/W1uzTWzpxIUy7XBy3cuSk0uZCoge4IE2Or7P2Rb2uyaNZ # RkAo/PL2N1cMjP7gB3kLRtYY7FA+nal66KhfbHPRHqj+ZwUAxzs= # =F3IG # -----END PGP SIGNATURE----- # gpg: Signature made Sat 18 Jan 2025 20:11:40 EST # gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013
* tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alistair23/qemu: (50 commits) hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events target/riscv: Support Supm and Sspm as part of Zjpm v1.0 hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache target/riscv: Add Smdbltrp ISA extension enable switch target/riscv: Implement Smdbltrp behavior target/riscv: Implement Smdbltrp sret, mret and mnret behavior target/riscv: Add Smdbltrp CSRs handling target/riscv: Add Ssdbltrp ISA extension enable switch target/riscv: Implement Ssdbltrp exception handling target/riscv: Implement Ssdbltrp sret, mret and mnret behavior target/riscv: Add Ssdbltrp CSRs handling target/riscv: Fix henvcfg potentially containing stale bits target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg target/riscv: Add implied rule for counter delegation extensions target/riscv: Invoke pmu init after feature enable target/riscv: Add counter delegation/configuration support target/riscv: Add select value range check for counter delegation target/riscv: Add counter delegation definitions target/riscv: Add properties for counter delegation ISA extensions target/riscv: Support generic CSR indirect access ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
f04cac4f |
| 16-Jan-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <2025011622360
hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250116223609.81594-1-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
7433709a |
| 14-Jan-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework Xi
Merge tag 'hw-misc-20250113' of https://github.com/philmd/qemu into staging
Misc HW patches queue
- Silent unuseful DTC warnings (Philippe) - Unify QDev hotplug decision logic (Akihiko) - Rework XilinX EthLite RAM buffers (Philippe) - Convert vmcoreinfo to 3-phase reset (Philippe) - Convert HPPA CPUs to 3-phase reset (Helge) - Fix UFS endianness issue (Keoseong) - Introduce pci_set_enabled (Akihiko) - Clarify Enclave and Firecracker relationship (Alexander) - Set SDHCI DMA interrupt status bit in correct place (Bernhard) - Fix leak in cryptodev-vhost-user backend (Gabriel) - Fixes on PCI USB XHCI (Phil) - Convert DPRINTF to trace events (Nikita, Bernhard) - Remove &first_cpu in TriCore machine (Philippe) - Checkpatch style cleanups (Bibo) - MAINTAINERS updates (Marcin, Gustavo, Akihiko) - Add default configuration for b4 tool (Jiaxun)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmeFTq0ACgkQ4+MsLN6t # wN6F2RAA0hhgXYf1BAn0DQI5O/oOzt6WzkwL/yQhKff1piWMcCZbHCOn8JHETE4R # QTqg+OMGuw4Q55YSwqwHW98JIQI/lRbSUX9Vc3km4QxED5owHiqu9wk//KSLv3TY # y86CRbibb0Uy6vEM4J1WK6ATiLePWZ6qzePQX59f9YEagTLM2XO2DasRu+wGDbt+ # 96fPnT7Tx2Bu5jU8+sZ36mw3wWSJo/pLQBE9siH4N33v2I5ntmMs1Lbe7QscDDsw # 1+OOti3lB4q5chNMYNQyPxvz75QIi9et7wREJM9Vt03OpEpj+vWMGzwZFNLfOmeu # eApgcQP/k6z1+pAGjEo5mwNOZcZtR9I/3Uf/sONvO0N5FlJq9CSOTs7L2EddcFzM # lVDZjwEHIoU1xCohqNy2A0Q1s20dNfBEjPEUCuh+tIvFk9cy1L8uZtBVFNUCb33J # Jq8KAkqXAaVj2tHGa27DwFjSTo4olU/G0WO4AQZNwdxvMQwX88gHOGMJkRmJPRVi # ErKD0/bBfVa6orEAorWYwQSnTP1H/2fGfF6rLtI5GvQtPc/jBG3+KpEOS+vc2nzG # 1fq+Kty8kWsU4Fpw3EUHvflnzG4Ujhuc/nJ+FyQhn89Erb49jxBlu25lQOLVRVa4 # gP+jsgi46+4goYzj1vrpTpBgFPFWKGCl1gGz17ij5WyvVXroRzA= # =+uup # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 12:34:37 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250113' of https://github.com/philmd/qemu: (55 commits) Add a b4 configuration file MAINTAINERS: Update path to coreaudio.m MAINTAINERS: Add me as the maintainer for ivshmem-flat MAINTAINERS: remove myself from sbsa-ref hw/tricore/triboard: Remove unnecessary use of &first_cpu hw/usb/hcd-xhci-pci: Use event ring 0 if mapping unsupported hw/usb/hcd-xhci-pci: Use modulo to select MSI vector as per spec backends/cryptodev-vhost-user: Fix local_error leaks hw/loongarch/virt: Checkpatch cleanup target/hppa: Speed up hppa_is_pa20() target/hppa: Set PC on vCPU reset target/hppa: Only set PSW 'M' bit on reset hw/hppa: Reset vCPUs calling resettable_reset() target/hppa: Convert hppa_cpu_init() to ResetHold handler tests: Add functional tests for HPPA machines tests/qtest/boot-serial-test: Correct HPPA machine name hw/gpio/imx_gpio: Turn DPRINTF() into trace events hw/i2c/imx_i2c: Convert DPRINTF() to trace events hw/char/imx_serial: Turn some DPRINTF() statements into trace events hw/misc/imx6_src: Convert DPRINTF() to trace events ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
1bada3c9 |
| 11-Jan-2025 |
Bernhard Beschow <shentey@gmail.com> |
hw/char/imx_serial: Turn some DPRINTF() statements into trace events
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bern
hw/char/imx_serial: Turn some DPRINTF() statements into trace events
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20250111183711.2338-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
d25202fe |
| 20-Dec-2024 |
Nikita Shubin <nshubin@yadro.com> |
hw/char/stm32f2xx_usart: replace print with trace
Drop debug printing macros and replace them with according trace functions.
Signed-off-by: Nikita Shubin <n.shubin@yadro.com> Reviewed-by: Alistair
hw/char/stm32f2xx_usart: replace print with trace
Drop debug printing macros and replace them with according trace functions.
Signed-off-by: Nikita Shubin <n.shubin@yadro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241220111756.16511-1-nikita.shubin@maquefel.me> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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#
ea9cdbcf |
| 15-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240913' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phi
Merge tag 'hw-misc-20240913' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phil) - Remove deprecated RISC-V 'any' CPU type (Phil) - Add fifo8_peek_buf() to correctly handle FIFO wraparound (Mark) - Minor cleanups in Designware PCIe, PL011 and loongson IPI models (Phil) - Fixes in TI TMP105 temperature (Guenter) - Convert Sun ESCC and ADB mouses to QemuInputHandler (Mark) - Prevent heap overflow in VIRTIO sound device (Volker) - Cleanups around g_assert_not_reached() call (Pierrick) - Add Clément as VT-d reviewer (Clément) - Prevent stuck modifier keys and unexpected text input on Windows (Volker) - Explicitly set SDL2 swap interval when OpenGL is enabled (Gert)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmbkoOUACgkQ4+MsLN6t # wN56SBAA1nYl5YTI0BwvToKysoNIJ5aTgDEbT87XYTatKYyWYlN5W1yrAeMcuwFO # Rw8edtn2YY89ZMG/LPcY1h6+nI2qVMpuOzNP3ve4D+eM6AMUMX0bzeqXndUind7c # 1kTcV7Wctfk34zzs5B9GIU0WswSSbL3FeETS47ySNg6J7GbVWIu41dh52oeg8XWa # Zfw0FZDt7hSAbsUckBIC9/Nbh0hucxBnQevQLkVb6u8O0yX3wV2OZRIC7+NkvHkH # ZLPT8lg197PitH0NouUJI5oMv5Ty3PXGHtrIAKvts+fGBpWL+XzEtQmT8RzqgxTl # 9Z6C/PvfMHNtA7BE66D4iLOKBPpV0RCUDOAGsfcWy5GuklzeUy03DxZ/2xO8XERm # TP0EP0nt2YddnELX7H65b78gJkPvnhME/MtA6Y6R7uxAA8gawZVWZQ1oDGUBNGDI # zJ62Cu4nYPwpGiewwb+ZTkjeiaYddJsPNsE8f8d4XZCpTwpIM/oYzJapxedBwjrg # a4eAWiy7xIvvGPxWN7IQPosGYcyO6zhbI+iAbxp1xmWsX0TPgLUcJtK9+pklqWS7 # 9ucrvkq5XRZSJMaGF0LZuZH7Qx6us7m0rik5wG96d8qrIXRpi8kXfWxI17SWQkGa # cG91u+FrKmfBr+yD7Q1gVbaYzkD+X1hPkQmSVmnlNS+5axrnSYQ= # =sPwb # -----END PGP SIGNATURE----- # gpg: Signature made Fri 13 Sep 2024 21:30:29 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20240913' of https://github.com/philmd/qemu: (60 commits) ui: remove break after g_assert_not_reached() ui/sdl2: set swap interval explicitly when OpenGL is enabled ui/sdl2: ignore GUI keys in SDL_TEXTINPUT handler ui/sdl2: release all modifiers system: replace assert(0) with g_assert_not_reached() hw/pci-host: remove break after g_assert_not_reached() hw/misc: remove break after g_assert_not_reached() hw/gpio: remove break after g_assert_not_reached() hw/watchdog: replace assert(0) with g_assert_not_reached() hw/core: replace assert(0) with g_assert_not_reached() hw/char: replace assert(0) with g_assert_not_reached() hw/input/adb-mouse: convert to use QemuInputHandler hw/char/escc: convert Sun mouse to use QemuInputHandler hw/sensor/tmp105: Lower 4 bit of limit registers are always 0 hw/sensor/tmp105: OS (one-shot) bit in config register always returns 0 hw/sensor/tmp105: Pass 'oneshot' argument to tmp105_alarm_update() hw/sensor/tmp105: Use registerfields API hw/sensor/tmp105: Coding style fixes tests/unit: Comment FIFO8 tests tests/unit: Expand test_fifo8_peek_buf_wrap() coverage ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
40871ca7 |
| 18-Jul-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/char/pl011: Rename RX FIFO methods
In preparation of having a TX FIFO, rename the RX FIFO methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee
hw/char/pl011: Rename RX FIFO methods
In preparation of having a TX FIFO, rename the RX FIFO methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240719181041.49545-12-philmd@linaro.org>
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#
83baec64 |
| 25-Apr-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20240425' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Implement FEAT_NMI and NMI support in the GICv3 * hw/dma: avoid apparent ov
Merge tag 'pull-target-arm-20240425' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Implement FEAT_NMI and NMI support in the GICv3 * hw/dma: avoid apparent overflow in soc_dma_set_request * linux-user/flatload.c: Remove unused bFLT shared-library and ZFLAT code * Add ResetType argument to Resettable hold and exit phase methods * Add RESET_TYPE_SNAPSHOT_LOAD ResetType * Implement STM32L4x5 USART
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYqMhMZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uVlD/47U3zYP33y4+wJcRScC0QI # jYd82jS7GhD5YP5QPrIEMaSbDwtYGi4Rez1taaHvZ2fWLg2gE973iixmTaM2mXCd # xPEqMsRXkFrQnC89K5/v9uR04AvHxoM8J2mD2OKnUT0RVBs38WxCUMLETBsD18/q # obs1RzDRhEs5BnwwPMm5HI1iQeVvDRe/39O3w3rZfA8DuqerrNOQWuJd43asHYjO # Gc1QzCGhALlXDoqk11IzjhJ7es8WbJ5XGvrSNe9QLGNJwNsu9oi1Ez+5WK2Eht9r # eRvGNFjH4kQY1YCShZjhWpdzU9KT0+80KLirMJFcI3vUztrYZ027/rMyKLHVOybw # YAqgEUELwoGVzacpaJg73f77uknKoXrfTH25DfoLX0yFCB35JHOPcjU4Uq1z1pfV # I80ZcJBDJ95mXPfyKLrO+0IyVBztLybufedK2aiH16waEGDpgsJv66FB2QRuQBYW # O0i6/4DEUZmfSpOmr8ct+julz7wCWSjbvo6JFWxzzxvD0M5T3AFKXZI244g1SMdh # LS8V7WVCVzVJ5mK8Ujp2fVaIIxiBzlXVZrQftWv5rhyDOiIIeP8pdekmPlI6p5HK # 3/2efzSYNL2UCDZToIq24El/3md/7vHR6DBfBT1/pagxWUstqqLgkJO42jQtTG0E # JY1cZ/EQY7cqXGrww8lhWA== # =WEsU # -----END PGP SIGNATURE----- # gpg: Signature made Thu 25 Apr 2024 03:36:03 AM PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
* tag 'pull-target-arm-20240425' of https://git.linaro.org/people/pmaydell/qemu-arm: (37 commits) tests/qtest: Add tests for the STM32L4x5 USART hw/arm: Add the USART to the stm32l4x5 SoC hw/char/stm32l4x5_usart: Add options for serial parameters setting hw/char/stm32l4x5_usart: Enable serial read and write hw/char: Implement STM32L4x5 USART skeleton reset: Add RESET_TYPE_SNAPSHOT_LOAD docs/devel/reset: Update to new API for hold and exit phase methods hw, target: Add ResetType argument to hold and exit phase methods scripts/coccinelle: New script to add ResetType to hold and exit phases allwinner-i2c, adm1272: Use device_cold_reset() for software-triggered reset hw/misc: Don't special case RESET_TYPE_COLD in npcm7xx_clk, gcr linux-user/flatload.c: Remove unused bFLT shared-library and ZFLAT code hw/dma: avoid apparent overflow in soc_dma_set_request hw/arm/virt: Enable NMI support in the GIC if the CPU has FEAT_NMI target/arm: Add FEAT_NMI to max hw/intc/arm_gicv3: Report the VINMI interrupt hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() hw/intc/arm_gicv3: Implement NMI interrupt priority hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() hw/intc/arm_gicv3: Add NMI handling CPU interface registers ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
c4c12ee4 |
| 29-Mar-2024 |
Arnaud Minier <arnaud.minier@telecom-paris.fr> |
hw/char/stm32l4x5_usart: Add options for serial parameters setting
Add a function to change the settings of the serial connection.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Sign
hw/char/stm32l4x5_usart: Add options for serial parameters setting
Add a function to change the settings of the serial connection.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240329174402.60382-4-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
87b77e6e |
| 29-Mar-2024 |
Arnaud Minier <arnaud.minier@telecom-paris.fr> |
hw/char/stm32l4x5_usart: Enable serial read and write
Implement the ability to read and write characters to the usart using the serial port.
The character transmission is based on the cmsdk-apb-uar
hw/char/stm32l4x5_usart: Enable serial read and write
Implement the ability to read and write characters to the usart using the serial port.
The character transmission is based on the cmsdk-apb-uart implementation.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240329174402.60382-3-arnaud.minier@telecom-paris.fr [PMM: fixed a few checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
4fb37aea |
| 29-Mar-2024 |
Arnaud Minier <arnaud.minier@telecom-paris.fr> |
hw/char: Implement STM32L4x5 USART skeleton
Add the basic infrastructure (register read/write, type...) to implement the STM32L4x5 USART.
Also create different types for the USART, UART and LPUART
hw/char: Implement STM32L4x5 USART skeleton
Add the basic infrastructure (register read/write, type...) to implement the STM32L4x5 USART.
Also create different types for the USART, UART and LPUART of the STM32L4x5 to deduplicate code and enable the implementation of different behaviors depending on the type.
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240329174402.60382-2-arnaud.minier@telecom-paris.fr [PMM: update to new reset hold method signature; fixed a few checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
3e34860a |
| 07-Nov-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-xenfv.for-upstream-20231107' of git://git.infradead.org/users/dwmw2/qemu into staging
Xen PV guest support for 8.2
Add Xen PV console and network support, the former of which enable
Merge tag 'pull-xenfv.for-upstream-20231107' of git://git.infradead.org/users/dwmw2/qemu into staging
Xen PV guest support for 8.2
Add Xen PV console and network support, the former of which enables the Xen "PV shim" to be used to support PV guests.
Also clean up the block support and make it work when the user passes just 'drive file=IMAGE,if=xen' on the command line.
Update the documentation to reflect all of these, taking the opportunity to simplify what it says about q35 by making unplug work for AHCI.
Ignore the VCPU_SSHOTTMR_future timer flag, and advertise the 'fixed' per-vCPU upcall vector support, as newer upstream Xen do.
# -----BEGIN PGP SIGNATURE----- # # iQJIBAABCAAyFiEEvgfZ/VSAmrLEsP9fY3Ys2mfi81kFAmVJ/7EUHGR3bXcyQGlu # ZnJhZGVhZC5vcmcACgkQY3Ys2mfi81k+/xAAswivVR4+nwz3wTSN7EboGogS3hy+ # ZsTpvbJnfprGQJAK8vv8OP4eunaCJkO/dy3M/33Dh270msmV6I/1ki0E1RIPG45D # n5wKM1Zxk0ABvjIgdp3xiLwITTdruJ+k9aqV8U9quhjgNFdOa7yjBOG8MD32GEPZ # KHbavJ++huOu7+DZHJRNRq4gI/fREIULoPGHVg7WuEiRDYokOOmMROXqmTHTaUkV # yFhkofzWxlpYhh7qRQx6/A80CSf7xwCof8krjdMCOYj3XGzYVZND0z5ZfHQYEwqt # fowhargA8gH4V3d21S/MWCaZ+QrswFXZhcnl5wuGgWakV4ChvFETKs+fz2mODWUx # 2T13trqeFJ5ElTrSpH1iWCoSEy6KCeLecvx7c/6HPSkDYQ3w5q8dXPpqgEtXY24S # Wcmw4PkQ+HrLX7wbSU7QLyTZjvCQLFZ3Sb0uTf2zwsJZyeCCiT2lqAaogoMm6Kg0 # m/jG1JzE+9AC3j0Upp1lS3EK1qdxIuLdBuIcaEBEjy7Am+Y14PlZYoU2c751KbRF # kqnIOYMoijX0PJDomPqCQtYNE0mrtogo0AbcFFIu+4k25vGbkl7xS5p2du9qw2Rd # ++IdqQYzdzrUcIwmxocFQqFBJQ2dcbOGB1d7+VJ+A1Uj3yY2/DnFG5WqSaqS0KJi # ZhBdFs3OTlPnRoM= # =Dg79 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 17:13:21 HKT # gpg: using RSA key BE07D9FD54809AB2C4B0FF5F63762CDA67E2F359 # gpg: issuer "dwmw2@infradead.org" # gpg: Good signature from "David Woodhouse <dwmw2@infradead.org>" [unknown] # gpg: aka "David Woodhouse <dwmw2@exim.org>" [unknown] # gpg: aka "David Woodhouse <david@woodhou.se>" [unknown] # gpg: aka "David Woodhouse <dwmw2@kernel.org>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: BE07 D9FD 5480 9AB2 C4B0 FF5F 6376 2CDA 67E2 F359
* tag 'pull-xenfv.for-upstream-20231107' of git://git.infradead.org/users/dwmw2/qemu: docs: update Xen-on-KVM documentation xen-platform: unplug AHCI disks hw/i386/pc: support '-nic' for xen-net-device hw/xen: update Xen PV NIC to XenDevice model hw/xen: only remove peers of PCI NICs on unplug hw/xen: add support for Xen primary console in emulated mode hw/xen: update Xen console to XenDevice model hw/xen: do not repeatedly try to create a failing backend device hw/xen: add get_frontend_path() method to XenDeviceClass hw/xen: automatically assign device index to block devices hw/xen: populate store frontend nodes with XenStore PFN/port i386/xen: advertise XEN_HVM_CPUID_UPCALL_VECTOR in CPUID include: update Xen public headers to Xen 4.17.2 release hw/xen: Clean up event channel 'type_val' handling to use union i386/xen: Ignore VCPU_SSHOTTMR_future flag in set_singleshot_timer()
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
9b773746 |
| 17-Oct-2023 |
David Woodhouse <dwmw@amazon.co.uk> |
hw/xen: update Xen console to XenDevice model
This allows (non-primary) console devices to be created on the command line and hotplugged.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed
hw/xen: update Xen console to XenDevice model
This allows (non-primary) console devices to be created on the command line and hotplugged.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
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#
a9c17e9a |
| 05-Sep-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'misc-20230831' of https://github.com/philmd/qemu into staging
Misc patches queue
Build fixes: - Only define OS_OBJECT_USE_OBJC with gcc
Overall cleanups: - Do not declare function proto
Merge tag 'misc-20230831' of https://github.com/philmd/qemu into staging
Misc patches queue
Build fixes: - Only define OS_OBJECT_USE_OBJC with gcc
Overall cleanups: - Do not declare function prototypes using 'extern' keyword - Remove unmaintained HAX accelerator - Have FEWatchFunc handlers return G_SOURCE_CONTINUE/REMOVE instead of boolean - Avoid modifying QOM class internals from instance in pmbus_device - Avoid variable-length array in xhci_get_port_bandwidth - Remove unuseful kvmclock_create() stub - Style: permit inline loop variables - Various header cleanups - Various spelling fixes
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmTw0oUACgkQ4+MsLN6t # wN7nZQ/+Jyrw1TnHiKV8nS5NKtQIszMTcAbrcuV8YCk0XgwprmrLzxOsOcVOU+MN # C9SHOhGGcu8NKho73CDrsKqye/IKm8rumMm0hcZrtqGS+3MX9RQzDBUgRgihgD9b # 78Pmiz/91mrsV4zjXBkWLILipjDUwAL0oXh+MLfkmkTdzJMVfllF5KfF+hdOipwq # +ECOzwEAFUtCWQk51aLGfrg9SarKC2jtRBEvd1RhwfvXAMCdGP9+pfXJQqkT7ZTK # Hf4TuOHkzZjHumHGGcJn+P1WHM6W3ILdocG7AAl+/0Jwkx4vhR+6MENJGLxqg4pa # VTnOpJiL/HsY8319mTswTmlxqmotEDakGjdaRm4ClWPxPksF7zQkdTspBx0/Qayu # SPr7U5gFLPXMhCpMnrznvjCS+C/dqLYrJAczs9Ecv6KawOIwMiPRzc0SyimCV4DI # kcpL88Vn4unoBCF7AdiDluPoY2Q41TZ6gRa7B1/nI/4j9Y+Gs/gWQxYHjMlDso+O # sNgMJ+sqIPW9n1vhl9s6AQweBYnMRW34A5iok9MV0HyFTxNKMoCoR8Ssfk9YzT+L # mK5a9AfgT8FrhtQXQz6ojIPFM8Q4zGcAQOMudpPiDICDAJaPuUpzL3XVwStT6Rfc # YL0+Nb+Ja5hPh0fAhgX3BH0EsqruW+DA8rEZfIgAIXDbOC5QFIo= # =SVsZ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 31 Aug 2023 13:48:53 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'misc-20230831' of https://github.com/philmd/qemu: (39 commits) build: Only define OS_OBJECT_USE_OBJC with gcc tests/tcg/aarch64: Rename bti-crt.inc.c -> bti-crt.c.inc ui: spelling fixes util: spelling fixes util/fifo8: Fix typo in fifo8_push_all() description hw/i386: Rename 'hw/kvm/clock.h' -> 'hw/i386/kvm/clock.h' hw/i386: Remove unuseful kvmclock_create() stub hw/usb/hcd-xhci: Avoid variable-length array in xhci_get_port_bandwidth() hw/usb: spelling fixes hw/sd: spelling fixes hw/mips: spelling fixes hw/display: spelling fixes hw/ide: spelling fixes hw/i2c: spelling fixes hw/i2c/pmbus_device: Fix modifying QOM class internals from instance hw/char/pl011: Replace magic values by register field definitions hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions hw/char/pl011: Display register name in trace events hw/char/pl011: Restrict MemoryRegionOps implementation access sizes hw/char: Have FEWatchFunc handlers return G_SOURCE_CONTINUE/REMOVE ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
51141cab |
| 22-May-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/char/pl011: Display register name in trace events
To avoid knowing the register addresses by heart, display their name along in the trace events.
Since the MMIO region is 4K wide (0x1000 bytes),
hw/char/pl011: Display register name in trace events
To avoid knowing the register addresses by heart, display their name along in the trace events.
Since the MMIO region is 4K wide (0x1000 bytes), displaying the address with 3 digits is enough, so reduce the address format.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230522153144.30610-5-philmd@linaro.org>
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#
af531756 |
| 30-Oct-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging
Renesas SH-4 patches queue
Patches from Zoltan: - Various clean up to align the code style with the rest of the code
Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging
Renesas SH-4 patches queue
Patches from Zoltan: - Various clean up to align the code style with the rest of the code base - QOM'ify the SH_SERIAL device - Modify few memory region size to better match the hardware manual
# gpg: Signature made Sat 30 Oct 2021 10:05:03 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* remotes/philmd/tags/renesas-20211030: (30 commits) hw/timer/sh_timer: Remove use of hw_error hw/timer/sh_timer: Fix timer memory region size hw/timer/sh_timer: Do not wrap lines that are not too long hw/timer/sh_timer: Rename sh_timer_state to SHTimerState hw/intc/sh_intc: Remove unneeded local variable initialisers hw/intc/sh_intc: Simplify allocating sources array hw/intc/sh_intc: Avoid using continue in loops hw/intc/sh_intc: Replace abort() with g_assert_not_reached() hw/intc/sh_intc: Inline and drop sh_intc_source() function hw/intc/sh_intc: Use array index instead of pointer arithmetics hw/intc/sh_intc: Remove excessive parenthesis hw/intc/sh_intc: Move sh_intc_register() closer to its only user hw/intc/sh_intc: Drop another useless macro hw/intc/sh_intc: Rename iomem region hw/intc/sh_intc: Turn some defines into an enum hw/intc/sh_intc: Use existing macro instead of local one hw/char/sh_serial: Add device id to trace output hw/char/sh_serial: QOM-ify hw/char/sh_serial: Split off sh_serial_reset() from sh_serial_init() hw/char/sh_serial: Embed QEMUTimer in state struct ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
44ae04f0 |
| 29-Oct-2021 |
BALATON Zoltan <balaton@eik.bme.hu> |
hw/char/sh_serial: Add device id to trace output
Normally there are at least two sh_serial instances. Add device id to trace messages to make it clear which instance they belong to otherwise its not
hw/char/sh_serial: Add device id to trace output
Normally there are at least two sh_serial instances. Add device id to trace messages to make it clear which instance they belong to otherwise its not possible to tell which serial device is accessed.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <cc1f9ff9f4259ae799750e452f8871849c7a104c.1635541329.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
ad52cfc1 |
| 29-Oct-2021 |
BALATON Zoltan <balaton@eik.bme.hu> |
hw/sh4: Change debug printfs to traces
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <b776043e811ab3caf200515e1350bdccc
hw/sh4: Change debug printfs to traces
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <b776043e811ab3caf200515e1350bdcccd1cc47b.1635541329.git.balaton@eik.bme.hu> [PMD: Fixed format strings for 32-bit hosts] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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#
500f1f3e |
| 09-Sep-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210908' into staging
qemu-sparc queue
# gpg: Signature made Wed 08 Sep 2021 12:48:40 BST # gpg: using RSA key CC621AB
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210908' into staging
qemu-sparc queue
# gpg: Signature made Wed 08 Sep 2021 12:48:40 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-20210908: escc: fix STATUS_SYNC bit in R_STATUS register escc: re-use escc_reset_chn() for soft reset escc: remove register changes from escc_reset_chn() escc: implement hard reset as described in the datasheet escc: implement soft reset as described in the datasheet escc: introduce escc_hard_reset_chn() for hardware reset escc: introduce escc_soft_reset_chn() for software reset escc: reset register values to zero in escc_reset() escc: checkpatch fixes sun4m: fix setting CPU id when more than one CPU is present tcg: Drop gen_io_end() target/sparc: Drop use of gen_io_end()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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bf4fbb69 |
| 03-Sep-2021 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
escc: introduce escc_hard_reset_chn() for hardware reset
This new hardware reset function is to be called for both channels when the hardware reset bit is written to register WR9. Its initial implem
escc: introduce escc_hard_reset_chn() for hardware reset
This new hardware reset function is to be called for both channels when the hardware reset bit is written to register WR9. Its initial implementation is the same as the existing escc_reset_chn() function used for device reset.
Add a new trace event when the guest initiates a hard reset via the WR9 register to help diagnose guest reset issues.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210903113223.19551-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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#
8e8aa965 |
| 03-Sep-2021 |
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> |
escc: introduce escc_soft_reset_chn() for software reset
This new software reset function is to be called when the appropriate channel software reset bit is written to register WR9. Its initial impl
escc: introduce escc_soft_reset_chn() for software reset
This new software reset function is to be called when the appropriate channel software reset bit is written to register WR9. Its initial implementation is the same as the existing escc_reset_chn() function used for device reset.
Add a new trace event when the guest initiates a soft reset via the WR9 register to help diagnose guest reset issues.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210903113223.19551-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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#
8c345b3e |
| 02-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-06-02' into staging
* Update the references to some doc files (use *.rst instead of *.txt) * Bump minimum versions of some r
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-06-02' into staging
* Update the references to some doc files (use *.rst instead of *.txt) * Bump minimum versions of some requirements after removing CentOS 7 support
# gpg: Signature made Wed 02 Jun 2021 08:12:18 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/thuth-gitlab/tags/pull-request-2021-06-02: configure: bump min required CLang to 6.0 / XCode 10.0 configure: bump min required GCC to 7.5.0 configure: bump min required glib version to 2.56 tests/docker: drop CentOS 7 container tests/vm: convert centos VM recipe to CentOS 8 crypto: drop used conditional check crypto: bump min gnutls to 3.5.18, dropping RHEL-7 support crypto: bump min gcrypt to 1.8.0, dropping RHEL-7 support crypto: drop back compatibility typedefs for nettle crypto: bump min nettle to 3.4, dropping RHEL-7 support patchew: move quick build job from CentOS 7 to CentOS 8 container block/ssh: Bump minimum libssh version to 0.8.7 docs: fix references to docs/devel/s390-dasd-ipl.rst docs: fix references to docs/specs/tpm.rst docs: fix references to docs/devel/build-system.rst docs: fix references to docs/devel/atomics.rst docs: fix references to docs/devel/tracing.rst
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d0fb9657 |
| 17-May-2021 |
Stefano Garzarella <sgarzare@redhat.com> |
docs: fix references to docs/devel/tracing.rst
Commit e50caf4a5c ("tracing: convert documentation to rST") converted docs/devel/tracing.txt to docs/devel/tracing.rst.
We still have several referenc
docs: fix references to docs/devel/tracing.rst
Commit e50caf4a5c ("tracing: convert documentation to rST") converted docs/devel/tracing.txt to docs/devel/tracing.rst.
We still have several references to the old file, so let's fix them with the following command:
sed -i s/tracing.txt/tracing.rst/ $(git grep -l docs/devel/tracing.txt)
Signed-off-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210517151702.109066-2-sgarzare@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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