| /linux-3.3/arch/mips/ar7/ |
| D | clock.c | 152 printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n", in calculate()
253 struct tnetd7300_clocks *clocks = in tnetd7300_init_clocks() local
258 &clocks->bus, bootcr, AR7_AFE_CLOCK); in tnetd7300_init_clocks()
262 &clocks->cpu, bootcr, AR7_AFE_CLOCK); in tnetd7300_init_clocks()
267 tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, in tnetd7300_init_clocks()
270 iounmap(clocks); in tnetd7300_init_clocks()
278 "Clocks: base = %d, frequency = %u, prediv = %d, " in tnetd7200_set_clock()
337 struct tnetd7200_clocks *clocks = in tnetd7200_init_clocks() local
348 printk(KERN_INFO "Clocks: Async mode\n"); in tnetd7200_init_clocks()
350 printk(KERN_INFO "Clocks: Setting DSP clock\n"); in tnetd7200_init_clocks()
[all …]
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| /linux-3.3/drivers/base/power/ |
| D | clock_ops.c | 55 * Add the clock represented by @con_id to the list of clocks used for
116 * Remove the clock represented by @con_id from the list of clocks used for
149 * pm_clk_init - Initialize a device's list of power management clocks.
150 * @dev: Device to initialize the list of PM clocks for.
163 * pm_clk_create - Create and initialize a device's list of PM clocks.
164 * @dev: Device to create and initialize the list of PM clocks for.
176 * pm_clk_destroy - Destroy a device's list of power management clocks.
177 * @dev: Device to destroy the list of PM clocks for.
214 * pm_clk_suspend - Disable clocks in a device's PM clock list.
215 * @dev: Device to disable the clocks for.
[all …]
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| /linux-3.3/arch/arm/mach-ux500/ |
| D | clock.h | 34 * @rate: fixed rate for clocks which don't implement
58 * of the cluster and peripheral clocks, and hooking these as the parents of
59 * the individual peripheral clocks.
62 * to enable these clocks and modifying them in the ->enable and
63 * ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
65 * This structure describes both the PRCMU-level clocks and PRCC-level clocks.
66 * The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
67 * prcc, and parent pointers are only used for the PRCC-level clocks.
|
| /linux-3.3/arch/arm/plat-omap/ |
| D | clock.c | 28 static LIST_HEAD(clocks);
196 /* Used for clocks that always have same value as the parent clock */
203 * Used for clocks that have the same value as the parent clock,
239 * recalculate_root_clocks - recalculate and propagate all root clocks
241 * Recalculates all root clocks (clocks with no parent), which if the
274 * trap out already registered clocks in clk_register()
285 list_add(&clk->node, &clocks); in clk_register()
310 list_for_each_entry(clkp, &clocks, node) { in clk_enable_init_clocks()
331 list_for_each_entry(c, &clocks, node) { in omap_clk_get_by_name()
350 list_for_each_entry(c, &clocks, node) in omap_clk_enable_autoidle_all()
[all …]
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| /linux-3.3/arch/arm/mach-w90x900/ |
| D | clock.c | 66 unsigned int clocks = clk->cken; in nuc900_clk_enable() local
72 clken |= clocks; in nuc900_clk_enable()
74 clken &= ~clocks; in nuc900_clk_enable()
81 unsigned int clocks = clk->cken; in nuc900_subclk_enable() local
87 clken |= clocks; in nuc900_subclk_enable()
89 clken &= ~clocks; in nuc900_subclk_enable()
|
| /linux-3.3/Documentation/sound/alsa/soc/ |
| D | clocking.txt | 16 Some master clocks (e.g. PLLs and CPU based clocks) are configurable in that
18 power). Other master clocks are fixed at a set frequency (i.e. crystals).
21 DAI Clocks
48 audio clocks as it usually gives more accurate sample rates than the CPU.
|
| /linux-3.3/arch/arm/plat-samsung/ |
| D | clock.c | 59 static LIST_HEAD(clocks);
195 /* base clocks */
273 * Add the specified clock to the list of clocks known by the system.
292 * @nr_clks: The number of clocks in the @clks array.
314 * s3c_register_clocks() - register an array of clocks
316 * @nr_clks: Number of clocks to register.
336 * s3c_disable_clocks() - disable an array of clocks
338 * @nr_clks: Number of clocks to register.
340 * for internal use only at initialisation time. disable the clocks in the
350 /* initialise all the clocks */
[all …]
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| /linux-3.3/arch/arm/mach-msm/ |
| D | clock.c | 32 static LIST_HEAD(clocks);
135 * generic to support different clocks.
146 list_add_tail(&clock_tbl[n].clk->list, &clocks); in msm_clock_init()
155 /* The bootloader and/or AMSS may have left various clocks enabled.
156 * Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
167 list_for_each_entry(clk, &clocks, list) { in clock_late_init()
179 pr_info("clock_late_init() disabled %d unused clocks\n", count); in clock_late_init()
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| /linux-3.3/arch/arm/plat-samsung/include/plat/ |
| D | clock-clksrc.h | 19 * @sources: array of pointers to clocks
77 * s3c_register_clksrc() register clocks from an array of clksrc clocks
78 * @srcs: The array of clocks to register
81 * Initialise and register the array of clocks described by @srcs.
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| /linux-3.3/arch/arm/mach-davinci/include/mach/ |
| D | spi.h | 60 * SPI module clocks.
67 * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
68 * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
70 * in number of SPI clocks.
72 * number of SPI clocks.
|
| /linux-3.3/arch/arm/mach-tegra/ |
| D | clock.c | 46 * which attemps to iterate through the entire list of clocks and take every
47 * clock lock. If any call to spin_trylock fails, all locked clocks are
57 * clocks.
60 * read-modify-write on registers that are shared by multiple clocks
63 static LIST_HEAD(clocks);
70 list_for_each_entry(c, &clocks, node) { in tegra_get_clock_by_name()
147 list_add(&c->node, &clocks); in clk_init()
280 /* Must be called with clocks lock and all indvidual clock locks held */
408 list_for_each_entry(c, &clocks, node) in __clk_lock_all_spinlocks()
415 list_for_each_entry_continue_reverse(c, &clocks, node) in __clk_lock_all_spinlocks()
[all …]
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| /linux-3.3/arch/arm/mach-omap1/ |
| D | clock_data.c | 6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
13 * - Clocks that are only available on some chips should be marked with the
74 * Omap1 clocks
206 * 1510 version is in TC clocks.
283 * 16xx version is in MPU clocks.
522 .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
682 /* non-ULPD clocks */
685 /* CK_GEN1 clocks */
698 /* CK_GEN2 clocks */
704 /* CK_GEN3 clocks */
[all …]
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| /linux-3.3/drivers/mfd/ |
| D | asic3.c | 87 struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)]; member
641 /* Turn on external clocks and the OWM clock */ in ds1wm_enable()
642 asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); in ds1wm_enable()
643 asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); in ds1wm_enable()
644 asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); in ds1wm_enable()
668 asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); in ds1wm_disable()
669 asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); in ds1wm_disable()
670 asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); in ds1wm_disable()
732 asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); in asic3_mmc_enable()
736 asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); in asic3_mmc_enable()
[all …]
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| /linux-3.3/arch/arm/mach-at91/ |
| D | clock.c | 36 * There's a lot more which can be done with clocks, including cpufreq
48 * Chips have some kind of clocks : group them by functionality
71 static LIST_HEAD(clocks);
79 * 48 MHz (unless no USB function clocks are needed). The main clock and
160 /* USB function clocks (PLLB must be 48 MHz) */
183 * (e.g baud rate generation). It's sourced from one of the primary clocks.
278 * For now, only the programmable clocks support reparenting (MCK could
415 list_for_each_entry(clk, &clocks, node) { in at91_clk_show()
466 list_add_tail(&clk->node, &clocks); in at91_clk_add()
574 /* four primary clocks */
[all …]
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| /linux-3.3/drivers/ata/ |
| D | pata_atp867x.c | 157 unsigned char clocks = clk; in atp867x_get_active_clocks_shifted() local
164 clocks++; in atp867x_get_active_clocks_shifted()
166 switch (clocks) { in atp867x_get_active_clocks_shifted()
168 clocks = 1; in atp867x_get_active_clocks_shifted()
176 clocks = 7; /* 12 clk */ in atp867x_get_active_clocks_shifted()
180 clocks = 0; in atp867x_get_active_clocks_shifted()
185 return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT; in atp867x_get_active_clocks_shifted()
190 unsigned char clocks = clk; in atp867x_get_recover_clocks_shifted() local
192 switch (clocks) { in atp867x_get_recover_clocks_shifted()
194 clocks = 1; in atp867x_get_recover_clocks_shifted()
[all …]
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| /linux-3.3/arch/arm/plat-s3c24xx/ |
| D | s3c2410-clock.c | 50 unsigned int clocks = clk->ctrlbit; in s3c2410_clkcon_enable() local
56 clkcon |= clocks; in s3c2410_clkcon_enable()
58 clkcon &= ~clocks; in s3c2410_clkcon_enable()
188 * Add all the clocks used by the s3c2410 or compatible CPUs
210 /* register clocks from clock array */ in s3c2410_baseclk_add()
225 /* We must be careful disabling the clocks we are not intending to in s3c2410_baseclk_add()
235 /* install (and disable) the clocks we do not need immediately */ in s3c2410_baseclk_add()
|
| /linux-3.3/include/linux/mfd/ |
| D | stmpe.h | 146 * (0 -> 36 clocks, 1 -> 44 clocks, 2 -> 56 clocks, 3 -> 64 clocks,
147 * 4 -> 80 clocks, 5 -> 96 clocks, 6 -> 144 clocks),
|
| /linux-3.3/arch/arm/mach-u300/ |
| D | clock.c | 8 * Define clocks in the app platform.
39 * - switch to the clkdevice lookup mechanism that maps clocks to
41 * - implement rate get/set for all clocks that need it.
54 * NOTE: the idea is NOT to show how the clocks are routed on the chip!
62 * Please be aware that a few clocks are hw controlled, which mean that
153 /* The MMC and MSPRO clocks need some special set-up */ in __clk_get()
185 /* Don't touch the hardware controlled clocks */ in syscon_clk_disable()
198 /* Don't touch the hardware controlled clocks */ in syscon_clk_enable()
411 /* clocks without enable function are always on */ in clk_enable()
693 * bridge and the clock framework makes sure that the clocks have
[all …]
|
| /linux-3.3/kernel/trace/ |
| D | trace_clock.c | 2 * tracing clocks
13 * Tracer plugins will chose a default from these clocks.
65 * It has higher overhead than the other trace clocks but is still
66 * an order of magnitude faster than GTOD derived hardware clocks.
|
| /linux-3.3/arch/arm/mach-omap2/ |
| D | clock2420_data.c | 46 * domains. Many get their interface clocks from the L4 domain, but get
47 * functional clocks from fixed sources or other core domain derived
48 * clocks.
51 /* Base external input clocks */
97 * Analog domain root source clocks
257 * clksel_rate flags fields are inaccurate for those clocks. This is
258 * harmless since access to those clocks are gated by the struct clk
381 * Clocks:
385 * - Individual clocks are hardware managed.
417 * Clocks:
[all …]
|
| D | clock2430_data.c | 46 * domains. Many get their interface clocks from the L4 domain, but get
47 * functional clocks from fixed sources or other core domain derived
48 * clocks.
51 /* Base external input clocks */
97 * Analog domain root source clocks
278 * clksel_rate flags fields are inaccurate for those clocks. This is
279 * harmless since access to those clocks are gated by the struct clk
366 * Clocks:
370 * - Individual clocks are hardware managed.
399 * Clocks:
[all …]
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| /linux-3.3/arch/arm/mach-lpc32xx/ |
| D | clock.c | 22 * The LPC32XX contains a number of high level system clocks that can be
23 * generated from different sources. These system clocks are used to
24 * generate the CPU and bus rates and the individual peripheral clocks in
26 * clocks are already running. Stopping a system clock during normal
28 * those clocks will quit working (ie, DRAM).
30 * The LPC32xx high level clock tree looks as follows. Clocks marked with
31 * an asterisk are always on and cannot be disabled. Clocks marked with
32 * an ampersand can only be disabled in CPU suspend mode. Clocks marked
56 * level clocks are based on either HCLK or PCLK, but have their own
421 * Unlike other clocks, this clock has a KHz input rate, so bump in local_usbpll_round_rate()
[all …]
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| /linux-3.3/arch/powerpc/platforms/52xx/ |
| D | mpc52xx_gpt.c | 402 u64 clocks; in mpc52xx_gpt_do_start() local
414 /* Determine the number of clocks in the requested period. 64 bit in mpc52xx_gpt_do_start()
418 clocks = period * (u64)gpt->ipb_freq; in mpc52xx_gpt_do_start()
419 do_div(clocks, 1000000000); /* Scale it down to ns range */ in mpc52xx_gpt_do_start()
422 if (clocks > 0xffffffff) in mpc52xx_gpt_do_start()
425 /* Calculate the prescaler and count values from the clocks value. in mpc52xx_gpt_do_start()
426 * 'clocks' is the number of clock ticks in the period. The timer in mpc52xx_gpt_do_start()
428 * calculated by integer dividing the clocks by 0x10000 (shifting in mpc52xx_gpt_do_start()
429 * down 16 bits) to obtain the smallest possible divisor for clocks in mpc52xx_gpt_do_start()
437 prescale = (clocks >> 16) + 1; in mpc52xx_gpt_do_start()
[all …]
|
| /linux-3.3/drivers/ptp/ |
| D | Kconfig | 16 synchronize distributed clocks over Ethernet networks. The
23 This driver adds support for PTP clocks as character
56 comment "Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks."
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| /linux-3.3/arch/powerpc/platforms/512x/ |
| D | clock.c | 51 static LIST_HEAD(clocks);
64 list_for_each_entry(p, &clocks, node) { in mpc5121_clk_get()
85 printk(KERN_INFO "CLOCKS:\n"); in dump_clocks()
86 list_for_each_entry(p, &clocks, node) { in dump_clocks()
169 list_add(&clk->node, &clocks); in clk_register()
350 * Clocks controlled by SCCR1 (.reg = 0)
382 * PSC clocks (bits 27 - 16)
415 * Clocks controlled by SCCR2 (.reg = 1)
606 * psc clocks and device clocks are all stored in dev_clks
|