Lines Matching full:clocks

46  *	domains. Many get their interface clocks from the L4 domain, but get
47  *	functional clocks from fixed sources or other core domain derived
48  *	clocks.
51 /* Base external input clocks */
97  * Analog domain root source clocks
257  * clksel_rate flags fields are inaccurate for those clocks. This is
258  * harmless since access to those clocks are gated by the struct clk
381  *	Clocks:
385  * - Individual clocks are hardware managed.
417  * Clocks:
423  * routed into a synchronizer and out of clocks abc.
490 /* IVA1 mpu/int/i/f clocks are /2 of parent */
504  * L3 clocks are used for both interface and functional clocks to
505  * multiple entities. Some of these clocks are completely managed
511  * I-CLOCKS:
578  * This domain contains lots of interface clocks from the L4 interface, some
579  * functional clocks.	Fixed APLL functional source clocks are managed in
657  *	Clocks:
662  * The 2d and 3d clocks run at a hardware determined
714  * CLOCKs:
1375  * split into two separate clocks, since the parent clocks are different
1747  * work, isr's off, walk a list of clocks already _off_ and not messing with
1795 	/* mpu domain clocks */
1797 	/* dsp domain clocks */
1802 	/* GFX domain clocks */
1806 	/* DSS domain clocks */
1811 	/* L3 domain clocks */
1815 	/* L4 domain clocks */
1972 	/* Disable autoidle on all clocks; let the PM code enable it later */  in omap2420_clk_init()
1994 	 * Only enable those clocks we will need, let the drivers  in omap2420_clk_init()
1995 	 * enable other clocks as necessary  in omap2420_clk_init()