| /linux-5.10/Documentation/hwmon/ |
| D | ibmpowernv.rst | 11 -----------
22 the DT maps to an attribute file in 'sysfs'. The node exports unique 'sensor-id'
26 -----------
28 CONFIG_SENSORS_IBMPOWERNV. It can also be built as module 'ibmpowernv'.
31 ----------------
36 fanX_fault - 0: No fail condition
37 - 1: Failing fan
43 tempX_enable Enable/disable all temperature sensors belonging to the
44 sub-group. In POWER9, this attribute corresponds to
45 each OCC. Using this attribute each OCC can be asked to
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| /linux-5.10/Documentation/admin-guide/ |
| D | kernel-parameters.txt | 5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
31 If set to none, disable the ACPI backlight interface.
40 Disable AML predefined validation mechanism
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| /linux-5.10/arch/mips/boot/dts/ingenic/ |
| D | gcw0.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/adc/ingenic,adc.h>
9 #include <dt-bindings/input/input.h>
29 stdout-path = "serial2:57600n8";
33 compatible = "regulator-fixed";
34 regulator-name = "vcc";
36 regulator-min-microvolt = <3300000>;
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| /linux-5.10/include/drm/ |
| D | drm_modeset_helper_vtables.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
56 * struct drm_crtc_helper_funcs - helper operations for CRTCs
70 * This callback is also used to disable a CRTC by calling it with
71 * DRM_MODE_DPMS_OFF if the @disable hook isn't used.
84 * in practice means the driver should disable the CRTC if it is
115 * restriction in the modes it can display. For example, a given crtc
116 * may be responsible to set a clock value. If the clock can not
118 * can be used to restrict the number of modes to only the ones that
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| D | drm_panel.h | 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
41 * struct drm_panel_funcs - perform operations on a given panel
44 * starts to transmit video data. Panel drivers can use this to turn the panel
56 * Before stopping video transmission from the display controller it can be
58 * the .disable() function. Analogously to .enable() this typically involves
63 * To save power when no video data is transmitted, a driver can power down
66 * Backlight can be handled automatically if configured using
68 * functionality to enable/disable backlight.
90 * @disable:
92 * Disable panel (turn off back light, etc.).
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| /linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
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| D | pinctrl-mt8183.txt | 6 - compatible: value should be one of the following.
7 "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
8 - gpio-controller : Marks the device node as a gpio controller.
9 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
12 - gpio-ranges : gpio valid number range.
13 - reg: physical address base for gpio base registers. There are 10 GPIO
17 - reg-names: gpio base register names. There are 10 gpio base register
20 - interrupt-controller: Marks the device node as an interrupt controller
21 - #interrupt-cells: Should be two.
22 - interrupts : The interrupt outputs to sysirq.
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| /linux-5.10/Documentation/driver-api/nvdimm/ |
| D | security.rst | 6 ---------------
10 security DSMs: "get security state", "set passphrase", "disable passphrase",
16 ------------------
28 update <old_keyid> <new_keyid> - enable or update passphrase.
29 disable <keyid> - disable enabled security and remove key.
30 freeze - freeze changing of security states.
31 erase <keyid> - delete existing user encryption key.
32 overwrite <keyid> - wipe the entire nvdimm.
33 master_update <keyid> <new_keyid> - enable or update master passphrase.
34 master_erase <keyid> - delete existing user encryption key.
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| /linux-5.10/Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
13 debug module and it is mainly used for two modes: self-hosted debug and
15 debugger connects with SoC from JTAG port; on the other hand the program can
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
22 debug mechanism, Linux kernel can access these related registers from mmio
29 --------------
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| /linux-5.10/arch/c6x/platforms/ |
| D | dscr.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 * The configuration register may be used to enable (and disable in some
19 * will not be able to disable it.
57 * This describes a contiguous area of like control bits used to enable/disable
67 u8 enable_only; /* bits are write-once to enable only */
69 u8 disable; /* value used to disable device */ member
87 u8 disable; /* value indicating disabled state */ member
97 /* These are callbacks to SOC-specific code. */
175 dscr_write_locked1(reg, val, lock->lockreg, lock->key); in dscr_write()
185 * Drivers can use this interface to enable/disable SoC IP blocks.
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| /linux-5.10/Documentation/PCI/ |
| D | msi-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 to change your driver to use MSI or MSI-X and some basic diagnostics to
28 in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
32 Devices may support both MSI and MSI-X, but only one can be enabled at
39 There are three reasons why using MSIs can give an advantage over
40 traditional pin-based interrupts.
42 Pin-based PCI interrupts are often shared amongst several devices.
47 When a device writes data to memory, then raises a pin-based interrupt,
49 arrived in memory (this becomes more likely with devices behind PCI-PCI
54 Using MSIs avoids this problem as the interrupt-generating write cannot
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| D | pci-iov-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Yu Zhao <yu.zhao@intel.com>
10 - Donald Dutile <ddutile@redhat.com>
15 What is SR-IOV
16 --------------
18 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
22 Allocation of the VF can be dynamically controlled by the PF via
25 turned on, each VF's PCI configuration space can be accessed by its own
28 operates on the register set so it can be functional and appear as a
34 How can I enable SR-IOV capability
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| /linux-5.10/Documentation/fb/ |
| D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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| /linux-5.10/arch/arm/boot/dts/ |
| D | at91-sama5d2_xplained.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
17 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
27 stdout-path = "serial0:115200n8";
32 clock-frequency = <32768>;
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| /linux-5.10/Documentation/networking/ |
| D | ip-sysctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 ip_forward - BOOLEAN
11 - 0 - disabled (default)
12 - not 0 - enabled
20 ip_default_ttl - INTEGER
25 ip_no_pmtu_disc - INTEGER
26 Disable Path MTU Discovery. If enabled in mode 1 and a
27 fragmentation-required ICMP is received, the PMTU to this
37 accept fragmentation-needed errors if the underlying protocol
38 can verify them besides a plain socket lookup. Current
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| /linux-5.10/Documentation/x86/x86_64/ |
| D | boot-options.rst | 1 .. SPDX-License-Identifier: GPL-2.0
15 Disable machine check
17 Disable CMCI(Corrected Machine Check Interrupt) that
30 Disable features for corrected errors, e.g. polling timer
39 Do not opt-in to Local MCE delivery. Use legacy method
49 Disable boot machine check logging.
57 Can be also set using sysfs which is preferable.
60 to disable.
62 Don't overwrite the bios-set CMCI threshold. This boot option
69 Force-enable recoverable machine check code paths
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| /linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-firmware-acpi | 12 image: The image bitmap. Currently a 32-bit BMP.
50 cause -EINVAL to be returned.
64 as the power button, it can also handle a variable
68 can do a anything the BIOS writer wants from
87 ff_rt_clk: 2 disable
146 error an interrupt that can't be accounted for above.
151 disable the GPE/Fixed Event is valid but disabled.
160 All counters can be cleared by clearing the total "sci"::
167 Besides this, user can also write specific strings to these files
168 to enable/disable/clear ACPI interrupts in user space, which can be
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| D | rtc-cdev | 4 Contact: linux-rtc@vger.kernel.org
6 The ioctl interface to drivers for real-time clocks (RTCs).
13 * RTC_AIE_ON, RTC_AIE_OFF: Enable or disable the alarm interrupt
17 RTCs that support alarms. Can be set upto 24 hours in the
22 powerful interface, which can issue alarms beyond 24 hours and
25 * RTC_PIE_ON, RTC_PIE_OFF: Enable or disable the periodic
28 * RTC_UIE_ON, RTC_UIE_OFF: Enable or disable the update
48 newer features -- including those enabled by ACPI -- are exposed
49 by the RTC class framework, but can't be supported by the older
|
| /linux-5.10/arch/nds32/ |
| D | Kconfig.cpu | 1 # SPDX-License-Identifier: GPL-2.0-only
26 Say Y here to enable the lazy FPU scheme. The lazy FPU scheme can
38 this feature can enhance the precision for tininess number.
50 A set of Zero-Overhead Loop mechanism is provided to reduce the
51 instruction fetch and execution overhead of loop-control instructions.
53 You don't need to save these registers if you can make sure your user
75 if its cache way size is larger than page size. You can specify the
102 prompt "Paging -- page size "
111 bool "Disable I-Cache"
113 Say Y here to disable the processor instruction cache. Unless
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| /linux-5.10/include/linux/regulator/ |
| D | machine.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * machine.h -- SoC Regulator support, machine/board driver API.
22 * certain regulator operations and can be OR'ed together.
24 * VOLTAGE: Regulator output voltage can be changed by software on this
26 * CURRENT: Regulator output current can be changed by software on this
28 * MODE: Regulator operating mode can be changed by software on this
30 * STATUS: Regulator can be enabled and disabled.
32 * BYPASS: Regulator can be put into bypass mode
44 * DO_NOTHING_IN_SUSPEND - the default value
45 * DISABLE_IN_SUSPEND - turn off regulator in suspend states
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| /linux-5.10/Documentation/sound/ |
| D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide
10 primary sound card support (``CONFIG_SOUND``). Since ALSA can emulate
32 The user can load modules with options. If the module supports more than
33 one card and you have more than one card of the same type then you can
38 ----------
47 limiting card index for auto-loading (1-8);
49 For auto-loading more than one card, specify this option
50 together with snd-card-X aliases.
57 (0 = disable debug prints, 1 = normal debug messages,
60 This option can be dynamically changed via sysfs
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| /linux-5.10/drivers/irqchip/ |
| D | irq-bcm2835.c | 1 // SPDX-License-Identifier: GPL-2.0+
16 * Quirk 2: You can't mask the register 1/2 pending interrupts
20 * You can mask the interrupts and get on with things. With this controller
21 * you can't do that.
23 * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
25 * Those interrupts that have shortcuts can only be masked/unmasked in
26 * their respective banks' enable/disable registers. Doing so in the bank 0
27 * enable/disable registers has no effect.
30 * Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
54 /* Shortcuts can't be disabled so any unknown new ones need to be masked */
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| /linux-5.10/arch/x86/kernel/cpu/ |
| D | cpuid-deps.c | 15 * This only includes dependencies that can be usefully disabled, not
18 * Note this all is not __init / __initdata because it can be
88 clear_bit(feature, (unsigned long *)c->x86_capability); in clear_feature()
97 DECLARE_BITMAP(disable, MAX_FEATURE_BITS); in do_clear_cpu_cap()
106 /* Collect all features to disable, handling dependencies */ in do_clear_cpu_cap()
107 memset(disable, 0, sizeof(disable)); in do_clear_cpu_cap()
108 __set_bit(feature, disable); in do_clear_cpu_cap()
113 for (d = cpuid_deps; d->feature; d++) { in do_clear_cpu_cap()
114 if (!test_bit(d->depends, disable)) in do_clear_cpu_cap()
116 if (__test_and_set_bit(d->feature, disable)) in do_clear_cpu_cap()
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| /linux-5.10/Documentation/power/ |
| D | opp.rst | 5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
39 We can represent these as three OPPs as the following {Hz, uV} tuples:
41 - {300000000, 1000000}
42 - {800000000, 1200000}
43 - {1000000000, 1300000}
46 ----------------------------------------
50 is located in include/linux/pm_opp.h. OPP library can be enabled by enabling
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| /linux-5.10/arch/arm/kernel/ |
| D | perf_event_v6.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * They all share a single reset bit but can be written to zero so we can use
11 * The counters can't be individually enabled or disabled so when we remove
13 * wrong event. However, we can take advantage of the fact that the
14 * performance counters can export events to the event bus, and the event bus
15 * itself can be monitored. This requires that we *don't* export the events to
17 * - change the counter to count the ETMEXTOUT[0] signal (0x20). This
19 * - disable the counter's interrupt generation (each counter has it's
21 * Once stopped, the counter value can be written as 0 to reset.
24 * - enable the counter's interrupt generation.
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