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/qemu/include/qemu/
H A Dstats64.h26 uint32_t low, high;
73 bool stat64_add32_carry(Stat64 *s, uint32_t low, uint32_t high);
78 *s = (Stat64) { .low = value, .high = value >> 32, .lock = 0 }; in stat64_init()
83 uint32_t low, high; in stat64_add() local
84 high = value >> 32; in stat64_add()
87 if (high) { in stat64_add()
88 qatomic_add(&s->high, high); in stat64_add()
98 if (result < low || high) { in stat64_add()
99 /* If the high part is affected, take the lock. */ in stat64_add()
100 if (stat64_add32_carry(s, low, high)) { in stat64_add()
[all …]
/qemu/util/
H A Dstats64.c46 uint32_t high, low; in stat64_get() local
53 high = qatomic_read(&s->high); in stat64_get()
57 return ((uint64_t)high << 32) | low; in stat64_get()
66 qatomic_set(&s->high, val >> 32); in stat64_set()
71 bool stat64_add32_carry(Stat64 *s, uint32_t low, uint32_t high) in stat64_add32_carry() argument
82 * whether we have to carry into s->high. in stat64_add32_carry()
85 high += (old + low) < old; in stat64_add32_carry()
86 qatomic_add(&s->high, high); in stat64_add32_carry()
93 uint32_t high, low; in stat64_min_slow() local
101 high = qatomic_read(&s->high); in stat64_min_slow()
[all …]
H A Drange.c81 uint64_t low, uint64_t high) in range_inverse_array() argument
91 out = append_new_range(out, low, high); in range_inverse_array()
98 out = append_new_range(out, low, MIN(range_lob(r) - 1, high)); in range_inverse_array()
101 /* insert a range in between each original range until we reach high */ in range_inverse_array()
105 if (range_lob(r) >= high) { in range_inverse_array()
110 MIN(range_lob(rn) - 1, high)); in range_inverse_array()
118 if (range_upb(r) < high) { in range_inverse_array()
119 out = append_new_range(out, range_upb(r) + 1, high); in range_inverse_array()
H A Dhost-utils.c38 uint32_t high, low; in mul64() member
40 uint32_t low, high; in mul64()
51 rm.ll = (uint64_t)a0.l.low * b0.l.high; in mul64()
52 rn.ll = (uint64_t)a0.l.high * b0.l.low; in mul64()
53 rh.ll = (uint64_t)a0.l.high * b0.l.high; in mul64()
55 c = (uint64_t)rl.l.high + rm.l.low + rn.l.low; in mul64()
56 rl.l.high = c; in mul64()
58 c = c + rm.l.high + rn.l.high + rh.l.low; in mul64()
60 rh.l.high += (uint32_t)(c >> 32); in mul64()
134 * Thus, the high part of the quotient is 1, and we can in divu128()
[all …]
/qemu/hw/microblaze/
H A Dboot.c141 uint64_t entry, high; in microblaze_load_kernel() local
146 &entry, NULL, &high, NULL, in microblaze_load_kernel()
167 high = (loadaddr + kernel_size + 3) & ~3; in microblaze_load_kernel()
175 high = (ddr_base + kernel_size + 3) & ~3; in microblaze_load_kernel()
182 high = ROUND_UP(high + kernel_size, 4); in microblaze_load_kernel()
183 boot_info.initrd_start = high; in microblaze_load_kernel()
200 high = ROUND_UP(high + initrd_size, 4); in microblaze_load_kernel()
203 boot_info.cmdline = high + 4096; in microblaze_load_kernel()
/qemu/target/i386/tcg/
H A Dmem_helper.c31 int low, high; in helper_boundw() local
34 high = cpu_ldsw_data_ra(env, a0 + 2, GETPC()); in helper_boundw()
36 if (v < low || v > high) { in helper_boundw()
46 int low, high; in helper_boundl() local
49 high = cpu_ldl_data_ra(env, a0 + 4, GETPC()); in helper_boundl()
50 if (v < low || v > high) { in helper_boundl()
/qemu/hw/intc/
H A Daspeed_vic.c16 * The hardware uses 32bit registers to manage 51 IRQs, with low and high
18 * uses 64bit data types to store both low and high register values (in the one
77 /* high-sensitive */ in aspeed_vic_set_irq()
112 bool high; in aspeed_vic_read() local
115 high = false; in aspeed_vic_read()
118 high = !!(offset & 0x4); in aspeed_vic_read()
178 if (high) { in aspeed_vic_read()
192 bool high; in aspeed_vic_write() local
195 high = false; in aspeed_vic_write()
198 high = !!(offset & 0x4); in aspeed_vic_write()
[all …]
H A Dimx_avic.c126 case 4: /* Interrupt Enabled Number Register High */ in imx_avic_read()
132 case 6: /* Interrupt Type Register High */ in imx_avic_read()
185 case 18:/* Interrupt source register high */ in imx_avic_read()
191 case 20:/* Interrupt Force Register high */ in imx_avic_read()
195 case 22:/* Normal Interrupt Pending Register High */ in imx_avic_read()
201 case 24: /* Fast Interrupt Pending Register High */ in imx_avic_read()
255 case 4: /* Interrupt Enable Number Register High */ in imx_avic_write()
263 case 6: /* Interrupt Type Register High */ in imx_avic_write()
285 case 18:/* Interrupt source register high */ in imx_avic_write()
289 case 20:/* Interrupt Force Register high */ in imx_avic_write()
[all …]
/qemu/docs/devel/
H A Ds390-cpu-topology.rst16 -device z14-s390x-cpu,core-id=19,entitlement=high \
18 -device z14-s390x-cpu,core-id=12,entitlement=high \
57 "entitlement": "high",
87 "entitlement": "high",
130 Note that a vertical polarized dedicated vCPU can only have a high
137 - Vertical high
138 - Vertical high dedicated
/qemu/hw/ppc/
H A Dvirtex_ml507.c242 uint64_t entry, high; in virtex_init() local
247 &entry, NULL, &high, NULL, in virtex_init()
258 high = boot_info.bootstrap_pc + kernel_size + 8192; in virtex_init()
265 initrd_base = high = ROUND_UP(high, 4); in virtex_init()
267 high, machine->ram_size - high); in virtex_init()
274 high = ROUND_UP(high + initrd_size, 4); in virtex_init()
278 boot_info.fdt = high + (8192 * 2); in virtex_init()
/qemu/tests/unit/
H A Dtest-div128.c24 uint64_t high; member
33 int64_t high; member
89 * and high 64 bits of dividend >= divisor
168 rem = divu128(&tmp.low, &tmp.high, tmp.divisor); in test_divu128()
170 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_divu128()
184 rem = divs128(&tmp.low, &tmp.high, tmp.divisor); in test_divs128()
186 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_divs128()
H A Dtest-shift128.c14 uint64_t high; member
114 ulshift(&tmp.low, &tmp.high, tmp.shift, &overflow); in test_lshift()
116 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_lshift()
127 urshift(&tmp.low, &tmp.high, tmp.shift); in test_rshift()
129 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_rshift()
/qemu/tests/qemu-iotests/
H A D243.out19 Disk usage: high
25 Disk usage: high
49 data disk usage: high
57 data disk usage: high
H A D24362 [ $(du -B1 $TEST_IMG | cut -f1) -lt 1048576 ] && echo "low" || echo "high"
82 [ $(du -B1 $TEST_IMG | cut -f1) -lt 1048576 ] && echo "low" || echo "high"
84 [ $(du -B1 $TEST_IMG.data | cut -f1) -lt 2097152 ] && echo "low" || echo "high"
/qemu/tests/functional/
H A Dtest_s390x_topology.py178 'core-id=3,socket-id=1,book-id=1,drawer-id=1,entitlement=high')
192 self.check_topology(3, 1, 1, 1, 'high', False)
194 self.check_topology(5, 2, 1, 1, 'high', True)
281 {'core-id': 0, 'entitlement': 'high'})
283 self.check_polarization('vertical:high')
284 self.check_topology(0, 0, 0, 0, 'high', False)
288 self.check_topology(0, 0, 0, 0, 'high', False)
310 self.check_topology(0, 0, 0, 0, 'high', True)
314 self.check_topology(0, 0, 0, 0, 'high', True)
315 self.check_polarization("vertical:high")
[all …]
/qemu/tests/qtest/
H A Dboot-sector.c18 #define HIGH(x) ((x) >> 8) macro
48 [0x07] = HIGH(SIGNATURE),
52 [0x0a] = HIGH(SIGNATURE_ADDR),
63 [SIGNATURE_OFFSET + 1] = HIGH(0xface),
81 0xa7, 0x39, HIGH(SIGNATURE_ADDR), LOW(SIGNATURE_ADDR), /* lghi r3,0x7c10 */
82 0xa7, 0x48, LOW(SIGNATURE), HIGH(SIGNATURE), /* lhi r4,0xadde */
110 HIGH(SIGNATURE), SIGNATURE_ADDR + 1); in boot_sector_init()
H A Dstm32l4x5_gpio-test.c274 * GPIO line high : it should set the right bit in IDR in test_gpio_output_mode()
290 /* Configure the relevant line as output and check the pin is high */ in test_gpio_output_mode()
310 * Test that setting a line high/low externally sets the in test_gpio_input_mode()
311 * corresponding GPIO line high/low : it should set the in test_gpio_input_mode()
320 /* Configure a line as input, raise it, and check that the pin is high */ in test_gpio_input_mode()
341 * high and vice-versa. in test_pull_up_pull_down()
349 /* Configure a line as input with pull-up, check the line is set high */ in test_pull_up_pull_down()
379 /* Setting a line high externally, configuring it in push-pull output */ in test_push_pull()
414 * disconnects a pin set high externally and that the pin in test_open_drain()
415 * can't be set high externally while configured in open-drain. in test_open_drain()
[all …]
/qemu/hw/net/fsl_etsec/
H A Dregisters.c55 {0x180, "TBDBPH", "Tx data buffer pointer high bits", ACC_RW, 0x00000000},
64 {0x200, "TBASEH", "TxBD base address high bits", ACC_RW, 0x00000000},
75 {0x2C0, "TMR_TXTS1_H", "Tx time stamp high (set 1)", ACC_RO, 0x00000000},
76 {0x2C4, "TMR_TXTS1_L", "Tx time stamp high (set 1)", ACC_RO, 0x00000000},
77 {0x2C8, "TMR_TXTS2_H", "Tx time stamp high (set 2)", ACC_RO, 0x00000000},
78 {0x2CC, "TMR_TXTS2_L", "Tx time stamp high (set 2)", ACC_RO, 0x00000000},
91 {0x380, "RBDBPH", "Rx data buffer pointer high bits", ACC_RW, 0x00000000},
100 {0x400, "RBASEH", "RxBD base address high bits", ACC_RW, 0x00000000},
109 {0x4C0, "TMR_RXTS_H", "Rx timer time stamp register high", ACC_RW, 0x00000000},
275 {0xE18, "TMR_CNT_H", "timer counter high register", ACC_RW, 0x00000000},
[all …]
/qemu/docs/system/i386/
H A Dxenpvh.rst48 …high-base=4294967296,ram-high-size=2147483648,pci-ecam-base=824633720832,pci-ecam-size=268435456,p…
/qemu/hw/s390x/
H A Dtod-tcg.c28 tod->high++; in qemu_s390_tod_get()
41 td->base.high--; in qemu_s390_tod_set()
69 td->base.high = 0; in qemu_s390_tod_init()
72 td->base.high += 1; in qemu_s390_tod_init()
H A Dtod-kvm.c23 r = kvm_s390_get_clock_ext(&tod->high, &tod->low); in kvm_s390_get_tod_raw()
25 r = kvm_s390_get_clock(&tod->high, &tod->low); in kvm_s390_get_tod_raw()
47 r = kvm_s390_set_clock_ext(tod->high, tod->low); in kvm_s390_set_tod_raw()
49 r = kvm_s390_set_clock(tod->high, tod->low); in kvm_s390_set_tod_raw()
/qemu/target/arm/tcg/
H A Dneon_helper.c698 uint32_t high; in HELPER() local
708 high = x >> 32; in HELPER()
709 if (high & 0x80000000) { in HELPER()
710 high = 0; in HELPER()
712 } else if (high > 0xffff) { in HELPER()
713 high = 0xffff; in HELPER()
716 return deposit32(low, 16, 16, high); in HELPER()
722 uint32_t high; in HELPER() local
729 high = x >> 32; in HELPER()
730 if (high > 0xffff) { in HELPER()
[all …]
/qemu/include/hw/gpio/
H A Dnrf51_gpio.h9 * Level 1: Input externally driven HIGH
13 * Level 1: Driven HIGH
16 * + The nRF51 GPIO output driver supports two modes, standard and high-current
/qemu/hw/i386/
H A Dtrace-events7 vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" …
31 …_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen) "IOTLB context hit bus 0x%"PRIx8…
32 …nt8_t devfn, uint64_t high, uint64_t low, uint32_t gen1, uint32_t gen2) "IOTLB context update bus …
60 vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) "index %d low 0x%"PRIx64" high 0x%"PRIx64
67 vtd_frr_new(int index, uint64_t hi, uint64_t lo) "index %d high 0x%"PRIx64" low 0x%"PRIx64
/qemu/tcg/i386/
H A Dtcg-target-has.h70 * Check for the possibility of low byte/word extraction, high-byte extraction
73 * We cannot sign-extend from high byte to 64-bits without using the
74 * REX prefix that explicitly excludes access to the high-byte registers.

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