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/linux-5.10/arch/arm64/crypto/
Dcrct10dif-ce-core.S116 movi perm4.8b, #8
119 ushr perm2.2d, perm1.2d, #8
136 ext t4.8b, ad.8b, ad.8b, #1 // A1
137 ext t5.8b, ad.8b, ad.8b, #2 // A2
138 ext t6.8b, ad.8b, ad.8b, #3 // A3
140 pmull t4.8h, t4.8b, fold_consts.8b // F = A1*B
141 pmull t8.8h, ad.8b, bd1.8b // E = A*B1
142 pmull t5.8h, t5.8b, fold_consts.8b // H = A2*B
143 pmull t7.8h, ad.8b, bd2.8b // G = A*B2
144 pmull t6.8h, t6.8b, fold_consts.8b // J = A3*B
[all …]
/linux-5.10/drivers/infiniband/hw/hns/
Dhns_roce_hw_v2.h46 #define HNS_ROCE_VF_SL_NUM 8
100 #define HNS_ROCE_V2_RSV_QPS 8
300 #define V2_CQC_BYTE_4_SHIFT_S 8
301 #define V2_CQC_BYTE_4_SHIFT_M GENMASK(12, 8)
387 #define SRQC_BYTE_4_SRQN_S 8
388 #define SRQC_BYTE_4_SRQN_M GENMASK(31, 8)
530 #define V2_QPC_BYTE_4_SQPN_S 8
531 #define V2_QPC_BYTE_4_SQPN_M GENMASK(31, 8)
547 #define V2_QPC_BYTE_16_PD_S 8
548 #define V2_QPC_BYTE_16_PD_M GENMASK(31, 8)
[all …]
/linux-5.10/arch/arm/mach-davinci/
Dda850.c74 MUX_CFG(DA850, I2C0_SCL, 4, 8, 15, 2, false)
76 MUX_CFG(DA850, MII_TXEN, 2, 4, 15, 8, false)
77 MUX_CFG(DA850, MII_TXCLK, 2, 8, 15, 8, false)
78 MUX_CFG(DA850, MII_COL, 2, 12, 15, 8, false)
79 MUX_CFG(DA850, MII_TXD_3, 2, 16, 15, 8, false)
80 MUX_CFG(DA850, MII_TXD_2, 2, 20, 15, 8, false)
81 MUX_CFG(DA850, MII_TXD_1, 2, 24, 15, 8, false)
82 MUX_CFG(DA850, MII_TXD_0, 2, 28, 15, 8, false)
83 MUX_CFG(DA850, MII_RXCLK, 3, 0, 15, 8, false)
84 MUX_CFG(DA850, MII_RXDV, 3, 4, 15, 8, false)
[all …]
/linux-5.10/tools/testing/selftests/powerpc/lib/
Dreg.S13 ld 14, 0*8(3)
14 ld 15, 1*8(3)
15 ld 16, 2*8(3)
16 ld 17, 3*8(3)
17 ld 18, 4*8(3)
18 ld 19, 5*8(3)
19 ld 20, 6*8(3)
20 ld 21, 7*8(3)
21 ld 22, 8*8(3)
22 ld 23, 9*8(3)
[all …]
/linux-5.10/arch/sparc/lib/
DM7memset.S37 * For sizes greater than 32 bytes, align the address on 8 byte boundary.
39 * store 8-bytes chunks to align the address on 64 byte boundary
59 * Store as many 8-byte chunks, followed by trailing bytes.
133 sll %o1, 8, %o3
141 or %o1, %o3, %o1 ! now o1 has 8 bytes of c
144 andcc %o5, 7, %o3 ! is sp1 aligned on a 8 byte bound?
146 sub %o3, 8, %o3 ! -(bytes till long word aligned)
170 addcc %o3, 8, %o3
173 add %o5, 8, %o5
194 sub %o5, 8, %o5 ! adjust %o5 for ASI store alignment
[all …]
/linux-5.10/sound/soc/codecs/
Drt5682.h373 #define RT5682_L_VOL_MASK (0x3f << 8)
374 #define RT5682_L_VOL_SFT 8
379 #define RT5682_G_HP (0xf << 8)
380 #define RT5682_G_HP_SFT 8
385 #define RT5682_BST_CBJ_MASK (0xf << 8)
386 #define RT5682_BST_CBJ_SFT 8
400 #define RT5682_POL_FAST_OFF_MASK (0x1 << 8)
401 #define RT5682_POL_FAST_OFF_HIGH (0x1 << 8)
402 #define RT5682_POL_FAST_OFF_LOW (0x0 << 8)
447 #define RT5682_DAC_L1_VOL_MASK (0xff << 8)
[all …]
Drt5677.h326 #define RT5677_LOUT2_ENH_DRV (0x1 << 8)
327 #define RT5677_LOUT2_ENH_DRV_SFT (8)
334 #define RT5677_BST_MASK2 (0xf << 8)
335 #define RT5677_BST_SFT2 8
401 #define RT5677_SEL_DAC4_R_SRC_MASK (0x7 << 8)
402 #define RT5677_SEL_DAC4_R_SRC_SFT 8
413 #define RT5677_DAC4_L_VOL_MASK (0xff << 8)
414 #define RT5677_DAC4_L_VOL_SFT 8
419 #define RT5677_DAC3_L_VOL_MASK (0xff << 8)
420 #define RT5677_DAC3_L_VOL_SFT 8
[all …]
Drt5665.h439 #define RT5665_L_VOL_MASK (0x3f << 8)
440 #define RT5665_L_VOL_SFT 8
445 #define RT5665_G_HP (0xf << 8)
446 #define RT5665_G_HP_SFT 8
451 #define RT5665_BST_CBJ_MASK (0xf << 8)
452 #define RT5665_BST_CBJ_SFT 8
457 #define RT5665_BST1_MASK (0x7f << 8)
458 #define RT5665_BST1_SFT 8
467 #define RT5665_BST3_MASK (0x7f << 8)
468 #define RT5665_BST3_SFT 8
[all …]
Drt5616.h160 #define RT5616_L_VOL_MASK (0x3f << 8)
161 #define RT5616_L_VOL_SFT 8
172 #define RT5616_BST_MASK2 (0xf<<8)
173 #define RT5616_BST_SFT2 8
180 #define RT5616_INL_VOL_MASK (0x1f << 8)
181 #define RT5616_INL_VOL_SFT 8
190 #define RT5616_DAC_L1_VOL_MASK (0xff << 8)
191 #define RT5616_DAC_L1_VOL_SFT 8
196 #define RT5616_DAC_L2_VOL_MASK (0xff << 8)
197 #define RT5616_DAC_L2_VOL_SFT 8
[all …]
/linux-5.10/tools/testing/selftests/powerpc/copyloops/
Dmemcpy_64.S43 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
68 addi r4,r4,-8
72 addi r3,r3,8
73 addi r4,r4,8
76 1: ld r9,8(r4)
77 std r8,8(r3)
81 3: std r8,8(r3)
86 lwz r9,8(r4)
91 lhz r9,8(r4)
96 lbz r9,8(r4)
[all …]
/linux-5.10/arch/powerpc/lib/
Dmemcpy_64.S43 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
68 addi r4,r4,-8
72 addi r3,r3,8
73 addi r4,r4,8
76 1: ld r9,8(r4)
77 std r8,8(r3)
81 3: std r8,8(r3)
86 lwz r9,8(r4)
91 lhz r9,8(r4)
96 lbz r9,8(r4)
[all …]
Dmemcmp_64.S75 * | y y y y y y y y y y y y y 0 1 2 | 3 4 5 6 7 8 9 a b c d e f z z z |
96 * 1) src/dst has the same offset to the 8 bytes boundary. The handlers
98 * 2) src/dst has different offset to the 8 bytes boundary. The handlers
105 * with the same offset of 8 bytes align boundary.
111 * with less than 8 bytes.
159 /* attempt to compare bytes not aligned with 8 bytes so that
160 * rest comparison can run based on 8 bytes alignment.
164 /* Try to compare the first double word which is not 8 bytes aligned:
179 subfic r6,r6,8
181 addi r3,r3,8
[all …]
/linux-5.10/drivers/net/ethernet/cavium/thunder/
Dq_struct.h190 u64 err_opcode:8;
193 u64 l2_ptr:8;
194 u64 l3_ptr:8;
195 u64 l4_ptr:8;
196 u64 cq_pkt_len:8;
203 u64 vlan_ptr:8;
204 u64 vlan2_ptr:8;
221 u64 err_opcode:8;
242 u64 cq_pkt_len:8;
243 u64 l4_ptr:8;
[all …]
/linux-5.10/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm45 * IVB: sr0.0 :: [15:13]: MBZ, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID
46 * HSW: sr0.0 :: 15: MBZ, [14:13]: SliceID, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID
48 mov(8) g3<1>UD 0x00000000UD { align1 1Q };
55 shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N };
60 mov(8) g5<1>UD 0x00000000UD { align1 1Q };
64 mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize messag…
71 sendc(8) g5<1>UD g4<8,8,1>F 0x02190001
77 sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001
92 mov(8) g2<1>UD g0<8,8,1>UD { align1 1Q };
93 mov(8) g127<1>UD g0<8,8,1>UD { align1 1Q };
[all …]
/linux-5.10/drivers/net/ethernet/intel/i40e/
Di40e_register.h449 #define I40E_PRTQF_FLX_PIT(_i) (0x00255200 + ((_i) * 32)) /* _i=0...8 */ /* Reset: CORER */
461 #define I40E_GLPRT_BPRCH(_i) (0x003005E4 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
462 #define I40E_GLPRT_BPRCL(_i) (0x003005E0 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
463 #define I40E_GLPRT_BPTCH(_i) (0x00300A04 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
464 #define I40E_GLPRT_BPTCL(_i) (0x00300A00 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
465 #define I40E_GLPRT_CRCERRS(_i) (0x00300080 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
466 #define I40E_GLPRT_GORCH(_i) (0x00300004 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
467 #define I40E_GLPRT_GORCL(_i) (0x00300000 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
468 #define I40E_GLPRT_GOTCH(_i) (0x00300684 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
469 #define I40E_GLPRT_GOTCL(_i) (0x00300680 + ((_i) * 8)) /* _i=0...3 */ /* Reset: CORER */
[all …]
/linux-5.10/arch/powerpc/include/asm/
Dexception-64e.h41 #define EX_R1 (0 * 8)
42 #define EX_CR (1 * 8)
43 #define EX_R10 (2 * 8)
44 #define EX_R11 (3 * 8)
45 #define EX_R14 (4 * 8)
46 #define EX_R15 (5 * 8)
56 #define EX_TLB_R10 ( 0 * 8)
57 #define EX_TLB_R11 ( 1 * 8)
58 #define EX_TLB_R14 ( 2 * 8)
59 #define EX_TLB_R15 ( 3 * 8)
[all …]
/linux-5.10/drivers/pinctrl/mediatek/
Dpinctrl-mt8127.c20 /* 0E4E8SR 4/8/12/16 */
22 /* 0E2E4SR 2/4/6/8 */
23 MTK_DRV_GRP(2, 8, 1, 2, 2),
24 /* E8E4E2 2/4/6/8/10/12/14/16 */
37 MTK_PIN_DRV_GRP(8, 0xb00, 12, 1),
39 MTK_PIN_DRV_GRP(10, 0xb00, 8, 1),
40 MTK_PIN_DRV_GRP(11, 0xb00, 8, 1),
41 MTK_PIN_DRV_GRP(12, 0xb00, 8, 1),
42 MTK_PIN_DRV_GRP(13, 0xb00, 8, 1),
47 MTK_PIN_DRV_GRP(18, 0xb10, 8, 0),
[all …]
Dpinctrl-mt8183.c15 * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000.
46 PIN_FIELD_BASE(8, 8, 6, 0x000, 0x10, 0, 1),
56 PINS_FIELD_BASE(31, 31, 2, 0x000, 0x10, 8, 1),
76 PINS_FIELD_BASE(85, 88, 5, 0x000, 0x10, 8, 1),
82 PIN_FIELD_BASE(99, 99, 6, 0x000, 0x10, 8, 1),
97 PIN_FIELD_BASE(117, 117, 7, 0x000, 0x10, 8, 1),
102 PIN_FIELD_BASE(122, 122, 8, 0x000, 0x10, 0, 1),
103 PIN_FIELD_BASE(123, 123, 8, 0x000, 0x10, 1, 1),
104 PIN_FIELD_BASE(124, 124, 8, 0x000, 0x10, 2, 1),
105 PINS_FIELD_BASE(125, 130, 8, 0x000, 0x10, 1, 1),
[all …]
Dpinctrl-mt2701.c39 /* 0E4E8SR 4/8/12/16 */
41 /* 0E2E4SR 2/4/6/8 */
42 MTK_DRV_GRP(2, 8, 1, 2, 2),
43 /* E8E4E2 2/4/6/8/10/12/14/16 */
56 MTK_PIN_DRV_GRP(8, 0xf50, 4, 1),
58 MTK_PIN_DRV_GRP(10, 0xf50, 8, 1),
59 MTK_PIN_DRV_GRP(11, 0xf50, 8, 1),
60 MTK_PIN_DRV_GRP(12, 0xf50, 8, 1),
61 MTK_PIN_DRV_GRP(13, 0xf50, 8, 1),
70 MTK_PIN_DRV_GRP(22, 0xf60, 8, 0),
[all …]
/linux-5.10/drivers/video/fbdev/
Datafb_iplan2p2.c50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
56 width -= 8; in atafb_iplan2p2_copyarea()
72 memmove32_col(dst + width / (8 / BPL), src + width / (8 / BPL), in atafb_iplan2p2_copyarea()
75 src = (u8 *)info->screen_base + (sy - 1) * next_line + ((sx + width + 8) & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
76 dst = (u8 *)info->screen_base + (dy - 1) * next_line + ((dx + width + 8) & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
82 width -= 8; in atafb_iplan2p2_copyarea()
98 memmove32_col(dst - (width - 16) / (8 / BPL), in atafb_iplan2p2_copyarea()
99 src - (width - 16) / (8 / BPL), in atafb_iplan2p2_copyarea()
109 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
[all …]
/linux-5.10/arch/ia64/lib/
Dstrlen.S30 // The goal is to look at the string in chunks of 8 bytes.
32 // string may not be 8-byte aligned. In this case we load the 8byte
86 alloc saved_pfs=ar.pfs,11,0,0,8 // rotating must be multiple of 8
92 dep src=0,in0,0,3 // src=8byte-aligned in0 address
99 ld8 v[1]=[src],8 // must not speculate: can fail here
100 shl tmp=tmp,3 // multiply by 8bits/byte
103 ld8.s w[1]=[src],8 // speculatively load next
114 ld8.s v[0]=[src],8 // speculatively load next
116 czx1.r val2=w[1] // search 0 byte from right following 8bytes
118 ld8.s w[0]=[src],8 // speculatively load next to next
[all …]
/linux-5.10/tools/testing/selftests/bpf/verifier/
Dspill_fill.c5 BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_1, -8),
7 BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_10, -8),
8 /* should be able to access R0 = *(R2 + 8) */
9 /* BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_2, 8), */
22 BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_6, -8),
23 BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_10, -8),
35 BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_1, -8),
41 BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_10, -8),
43 BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_0, 8),
54 BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_1, -8),
[all …]
/linux-5.10/tools/testing/selftests/powerpc/stringloops/
Dmemcmp_64.S75 * | y y y y y y y y y y y y y 0 1 2 | 3 4 5 6 7 8 9 a b c d e f z z z |
96 * 1) src/dst has the same offset to the 8 bytes boundary. The handlers
98 * 2) src/dst has different offset to the 8 bytes boundary. The handlers
105 * with the same offset of 8 bytes align boundary.
111 * with less than 8 bytes.
159 /* attempt to compare bytes not aligned with 8 bytes so that
160 * rest comparison can run based on 8 bytes alignment.
164 /* Try to compare the first double word which is not 8 bytes aligned:
179 subfic r6,r6,8
181 addi r3,r3,8
[all …]
/linux-5.10/tools/perf/scripts/python/
Dexport-to-postgresql.py232 # Assume UTF-8 server_encoding and client_encoding
671 ' WHEN wake_reason=8 THEN \'HW\''
697 ' WHEN pwrx.wake_reason=8 THEN \'HW\''
977 value = struct.pack(fmt, 2, 8, evsel_id, n, evsel_name)
984 value = struct.pack(fmt, 3, 8, machine_id, 4, pid, n, root_dir)
988 value = struct.pack("!hiqiqiqiiii", 5, 8, thread_id, 8, machine_id, 8, process_id, 4, pid, 4, tid)
995 value = struct.pack(fmt, 5, 8, comm_id, n, comm_str, 8, thread_id, 8, time, 1, exec_flag)
1000 value = struct.pack(fmt, 3, 8, comm_thread_id, 8, comm_id, 8, thread_id)
1011 value = struct.pack(fmt, 5, 8, dso_id, 8, machine_id, n1, short_name, n2, long_name, n3, build_id)
1018 …value = struct.pack(fmt, 6, 8, symbol_id, 8, dso_id, 8, sym_start, 8, sym_end, 4, binding, n, symb…
[all …]
/linux-5.10/lib/raid6/
Ds390vx.uc99 COPY_VEC(8+$$,0+$$);
101 MASK(16+$$,8+$$);
103 SHLBYTE(8+$$,8+$$);
104 XOR(8+$$,8+$$,16+$$);
107 XOR(8+$$,8+$$,16+$$);
110 STORE_DATA(8,&q[d]);
133 COPY_VEC(8+$$,0+$$);
135 MASK(16+$$,8+$$);
137 SHLBYTE(8+$$,8+$$);
138 XOR(8+$$,8+$$,16+$$);
[all …]

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