Lines Matching full:8
373 #define RT5682_L_VOL_MASK (0x3f << 8)
374 #define RT5682_L_VOL_SFT 8
379 #define RT5682_G_HP (0xf << 8)
380 #define RT5682_G_HP_SFT 8
385 #define RT5682_BST_CBJ_MASK (0xf << 8)
386 #define RT5682_BST_CBJ_SFT 8
400 #define RT5682_POL_FAST_OFF_MASK (0x1 << 8)
401 #define RT5682_POL_FAST_OFF_HIGH (0x1 << 8)
402 #define RT5682_POL_FAST_OFF_LOW (0x0 << 8)
447 #define RT5682_DAC_L1_VOL_MASK (0xff << 8)
448 #define RT5682_DAC_L1_VOL_SFT 8
453 #define RT5682_ADC_L_VOL_MASK (0x7f << 8)
454 #define RT5682_ADC_L_VOL_SFT 8
465 #define RT5682_ST_SRC_SEL (0x1 << 8)
466 #define RT5682_ST_SRC_SFT 8
487 #define RT5682_STO1_DMIC_SRC_MASK (0x1 << 8)
488 #define RT5682_STO1_DMIC_SRC_SFT 8
489 #define RT5682_STO1_DMIC_SRC_DMIC2 (0x1 << 8)
490 #define RT5682_STO1_DMIC_SRC_DMIC1 (0x0 << 8)
509 #define RT5682_DAC1_L_SEL_MASK (0x1 << 8)
510 #define RT5682_DAC1_L_SEL_SFT 8
537 #define RT5682_M_ST_STO_R (0x1 << 8)
538 #define RT5682_M_ST_STO_R_SFT 8
563 #define RT5682_PWR_LDO (0x1 << 8)
564 #define RT5682_PWR_LDO_BIT 8
652 #define RT5682_POW_CLK_DET2_SFT 8
681 #define RT5682_I2S1_RX_CHL_MASK (0x7 << 8)
682 #define RT5682_I2S1_RX_CHL_SFT 8
683 #define RT5682_I2S1_RX_CHL_16 (0x0 << 8)
684 #define RT5682_I2S1_RX_CHL_20 (0x1 << 8)
685 #define RT5682_I2S1_RX_CHL_24 (0x2 << 8)
686 #define RT5682_I2S1_RX_CHL_32 (0x3 << 8)
687 #define RT5682_I2S1_RX_CHL_8 (0x4 << 8)
715 #define RT5682_I2S_BP_MASK (0x1 << 8)
716 #define RT5682_I2S_BP_SFT 8
717 #define RT5682_I2S_BP_NOR (0x0 << 8)
718 #define RT5682_I2S_BP_INV (0x1 << 8)
749 #define RT5682_I2S_M_DIV_MASK (0xf << 8)
750 #define RT5682_I2S_M_DIV_SFT 8
751 #define RT5682_I2S_M_D_1 (0x0 << 8)
752 #define RT5682_I2S_M_D_2 (0x1 << 8)
753 #define RT5682_I2S_M_D_3 (0x2 << 8)
754 #define RT5682_I2S_M_D_4 (0x3 << 8)
755 #define RT5682_I2S_M_D_6 (0x4 << 8)
756 #define RT5682_I2S_M_D_8 (0x5 << 8)
757 #define RT5682_I2S_M_D_12 (0x6 << 8)
758 #define RT5682_I2S_M_D_16 (0x7 << 8)
759 #define RT5682_I2S_M_D_24 (0x8 << 8)
760 #define RT5682_I2S_M_D_32 (0x9 << 8)
761 #define RT5682_I2S_M_D_48 (0x10 << 8)
795 #define RT5682_TDM_RX_CH_MASK (0x3 << 8)
796 #define RT5682_TDM_RX_CH_2 (0x0 << 8)
797 #define RT5682_TDM_RX_CH_4 (0x1 << 8)
798 #define RT5682_TDM_RX_CH_6 (0x2 << 8)
799 #define RT5682_TDM_RX_CH_8 (0x3 << 8)
808 #define RT5682_IF1_ADC4_SEL_SFT 8
869 #define RT5682_PLL1_SRC_MASK (0x3 << 8)
870 #define RT5682_PLL1_SRC_SFT 8
871 #define RT5682_PLL1_SRC_MCLK (0x0 << 8)
872 #define RT5682_PLL1_SRC_BCLK1 (0x1 << 8)
873 #define RT5682_PLL1_SRC_SDW (0x2 << 8)
874 #define RT5682_PLL1_SRC_RC (0x3 << 8)
903 #define RT5682_AD_ASRC_MASK (0x1 << 8)
904 #define RT5682_AD_ASRC_SFT 8
917 #define RT5682_FILTER_CLK_DIV_MASK (0xf << 8)
918 #define RT5682_FILTER_CLK_DIV_SFT 8
925 #define RT5682_ASRCIN_FTK_M1_MASK (0x7 << 8)
926 #define RT5682_ASRCIN_FTK_M1_SFT 8
931 #define RT5682_PLL2_OUT_MASK (0x1 << 8)
932 #define RT5682_PLL2_OUT_98M (0x0 << 8)
933 #define RT5682_PLL2_OUT_49M (0x1 << 8)
1002 #define RT5682_PM_HP_MASK (0x3 << 8)
1003 #define RT5682_PM_HP_SFT 8
1004 #define RT5682_PM_HP_LV (0x0 << 8)
1005 #define RT5682_PM_HP_MV (0x1 << 8)
1006 #define RT5682_PM_HP_HV (0x2 << 8)
1035 #define RT5682_MIC2_OV_MASK (0x3 << 8)
1036 #define RT5682_MIC2_OV_SFT 8
1037 #define RT5682_MIC2_OV_2V7 (0x0 << 8)
1038 #define RT5682_MIC2_OV_2V4 (0x1 << 8)
1039 #define RT5682_MIC2_OV_2V25 (0x3 << 8)
1040 #define RT5682_MIC2_OV_1V8 (0x4 << 8)
1061 #define RT5682_PWR_CLK1M_MASK (0x1 << 8)
1062 #define RT5682_PWR_CLK1M_SFT 8
1063 #define RT5682_PWR_CLK1M_PD (0x0 << 8)
1064 #define RT5682_PWR_CLK1M_PU (0x1 << 8)
1067 #define RT5682_PLL2F_K_MASK (0x1f << 8)
1068 #define RT5682_PLL2F_K_SFT 8
1074 #define RT5682_PLL2F_M_MASK (0x3f << 8)
1075 #define RT5682_PLL2F_M_SFT 8
1079 #define RT5682_PLL2F_N_MASK (0x7f << 8)
1080 #define RT5682_PLL2F_N_SFT 8
1162 #define RT5682_GP4_PIN_MASK (0x3 << 8)
1163 #define RT5682_GP4_PIN_SFT 8
1164 #define RT5682_GP4_PIN_GPIO4 (0x0 << 8)
1165 #define RT5682_GP4_PIN_ADCDAT1 (0x1 << 8)
1166 #define RT5682_GP4_PIN_DMIC_CLK (0x2 << 8)
1167 #define RT5682_GP4_PIN_ADCDAT2 (0x3 << 8)
1200 #define RT5682_GP4_OUT_MASK (0x1 << 8)
1201 #define RT5682_GP4_OUT_L (0x0 << 8)
1202 #define RT5682_GP4_OUT_H (0x1 << 8)
1260 /* Bias current control 8 (0x0111) */
1326 #define RT5682_SAR_SEL_MB2_MASK (0x1 << 8)
1327 #define RT5682_SAR_SEL_MB2_SEL (0x1 << 8)
1328 #define RT5682_SAR_SEL_MB2_NOSEL (0x0 << 8)