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/qemu/gdb-xml/
H A Dmicroblaze-core.xml10 <reg name="r0" bitsize="32" regnum="0"/>
11 <reg name="r1" bitsize="32" type="data_ptr"/>
12 <reg name="r2" bitsize="32"/>
13 <reg name="r3" bitsize="32"/>
14 <reg name="r4" bitsize="32"/>
15 <reg name="r5" bitsize="32"/>
16 <reg name="r6" bitsize="32"/>
17 <reg name="r7" bitsize="32"/>
18 <reg name="r8" bitsize="32"/>
19 <reg name="r9" bitsize="32"/>
[all …]
H A Dpower-core.xml10 <reg name="r0" bitsize="32" type="uint32"/>
11 <reg name="r1" bitsize="32" type="uint32"/>
12 <reg name="r2" bitsize="32" type="uint32"/>
13 <reg name="r3" bitsize="32" type="uint32"/>
14 <reg name="r4" bitsize="32" type="uint32"/>
15 <reg name="r5" bitsize="32" type="uint32"/>
16 <reg name="r6" bitsize="32" type="uint32"/>
17 <reg name="r7" bitsize="32" type="uint32"/>
18 <reg name="r8" bitsize="32" type="uint32"/>
19 <reg name="r9" bitsize="32" type="uint32"/>
[all …]
H A Dpower-spe.xml10 <reg name="ev0h" bitsize="32" regnum="71"/>
11 <reg name="ev1h" bitsize="32"/>
12 <reg name="ev2h" bitsize="32"/>
13 <reg name="ev3h" bitsize="32"/>
14 <reg name="ev4h" bitsize="32"/>
15 <reg name="ev5h" bitsize="32"/>
16 <reg name="ev6h" bitsize="32"/>
17 <reg name="ev7h" bitsize="32"/>
18 <reg name="ev8h" bitsize="32"/>
19 <reg name="ev9h" bitsize="32"/>
[all …]
H A Driscv-32bit-cpu.xml10 <reg name="zero" bitsize="32" type="int"/>
11 <reg name="ra" bitsize="32" type="code_ptr"/>
12 <reg name="sp" bitsize="32" type="data_ptr"/>
13 <reg name="gp" bitsize="32" type="data_ptr"/>
14 <reg name="tp" bitsize="32" type="data_ptr"/>
15 <reg name="t0" bitsize="32" type="int"/>
16 <reg name="t1" bitsize="32" type="int"/>
17 <reg name="t2" bitsize="32" type="int"/>
18 <reg name="fp" bitsize="32" type="data_ptr"/>
19 <reg name="s1" bitsize="32" type="int"/>
[all …]
H A Driscv-32bit-fpu.xml10 <reg name="ft0" bitsize="32" type="ieee_single"/>
11 <reg name="ft1" bitsize="32" type="ieee_single"/>
12 <reg name="ft2" bitsize="32" type="ieee_single"/>
13 <reg name="ft3" bitsize="32" type="ieee_single"/>
14 <reg name="ft4" bitsize="32" type="ieee_single"/>
15 <reg name="ft5" bitsize="32" type="ieee_single"/>
16 <reg name="ft6" bitsize="32" type="ieee_single"/>
17 <reg name="ft7" bitsize="32" type="ieee_single"/>
18 <reg name="fs0" bitsize="32" type="ieee_single"/>
19 <reg name="fs1" bitsize="32" type="ieee_single"/>
[all …]
H A Dloongarch-base32.xml10 <reg name="r0" bitsize="32" type="uint32" group="general"/>
11 <reg name="r1" bitsize="32" type="code_ptr" group="general"/>
12 <reg name="r2" bitsize="32" type="data_ptr" group="general"/>
13 <reg name="r3" bitsize="32" type="data_ptr" group="general"/>
14 <reg name="r4" bitsize="32" type="uint32" group="general"/>
15 <reg name="r5" bitsize="32" type="uint32" group="general"/>
16 <reg name="r6" bitsize="32" type="uint32" group="general"/>
17 <reg name="r7" bitsize="32" type="uint32" group="general"/>
18 <reg name="r8" bitsize="32" type="uint32" group="general"/>
19 <reg name="r9" bitsize="32" type="uint32" group="general"/>
[all …]
H A Dhexagon-core.xml19 …<reg name="r00" altname="r0" bitsize="32" offset="0" encoding="uint" format="hex" group="Thread …
20 …<reg name="r01" altname="r1" bitsize="32" offset="4" encoding="uint" format="hex" group="Thread …
21 …<reg name="r02" altname="r2" bitsize="32" offset="8" encoding="uint" format="hex" group="Thread …
22 …<reg name="r03" altname="r3" bitsize="32" offset="12" encoding="uint" format="hex" group="Thread …
23 …<reg name="r04" altname="r4" bitsize="32" offset="16" encoding="uint" format="hex" group="Thread …
24 …<reg name="r05" altname="r5" bitsize="32" offset="20" encoding="uint" format="hex" group="Thread …
25 …<reg name="r06" altname="r6" bitsize="32" offset="24" encoding="uint" format="hex" group="Thread …
26 …<reg name="r07" altname="r7" bitsize="32" offset="28" encoding="uint" format="hex" group="Thread …
27 …<reg name="r08" altname="r8" bitsize="32" offset="32" encoding="uint" format="hex" group="Thread …
28 …<reg name="r09" altname="r9" bitsize="32" offset="36" encoding="uint" format="hex" group="Thread …
[all …]
H A Dcf-core.xml9 <reg name="d0" bitsize="32"/>
10 <reg name="d1" bitsize="32"/>
11 <reg name="d2" bitsize="32"/>
12 <reg name="d3" bitsize="32"/>
13 <reg name="d4" bitsize="32"/>
14 <reg name="d5" bitsize="32"/>
15 <reg name="d6" bitsize="32"/>
16 <reg name="d7" bitsize="32"/>
17 <reg name="a0" bitsize="32" type="data_ptr"/>
18 <reg name="a1" bitsize="32" type="data_ptr"/>
[all …]
H A Dm68k-core.xml9 <reg name="d0" bitsize="32"/>
10 <reg name="d1" bitsize="32"/>
11 <reg name="d2" bitsize="32"/>
12 <reg name="d3" bitsize="32"/>
13 <reg name="d4" bitsize="32"/>
14 <reg name="d5" bitsize="32"/>
15 <reg name="d6" bitsize="32"/>
16 <reg name="d7" bitsize="32"/>
17 <reg name="a0" bitsize="32" type="data_ptr"/>
18 <reg name="a1" bitsize="32" type="data_ptr"/>
[all …]
H A Darm-m-profile.xml10 <reg name="r0" bitsize="32"/>
11 <reg name="r1" bitsize="32"/>
12 <reg name="r2" bitsize="32"/>
13 <reg name="r3" bitsize="32"/>
14 <reg name="r4" bitsize="32"/>
15 <reg name="r5" bitsize="32"/>
16 <reg name="r6" bitsize="32"/>
17 <reg name="r7" bitsize="32"/>
18 <reg name="r8" bitsize="32"/>
19 <reg name="r9" bitsize="32"/>
[all …]
H A Drx-core.xml10 <reg name="r0" bitsize="32" type="data_ptr"/>
11 <reg name="r1" bitsize="32" type="uint32"/>
12 <reg name="r2" bitsize="32" type="uint32"/>
13 <reg name="r3" bitsize="32" type="uint32"/>
14 <reg name="r4" bitsize="32" type="uint32"/>
15 <reg name="r5" bitsize="32" type="uint32"/>
16 <reg name="r6" bitsize="32" type="uint32"/>
17 <reg name="r7" bitsize="32" type="uint32"/>
18 <reg name="r8" bitsize="32" type="uint32"/>
19 <reg name="r9" bitsize="32" type="uint32"/>
[all …]
H A Darm-core.xml10 <reg name="r0" bitsize="32"/>
11 <reg name="r1" bitsize="32"/>
12 <reg name="r2" bitsize="32"/>
13 <reg name="r3" bitsize="32"/>
14 <reg name="r4" bitsize="32"/>
15 <reg name="r5" bitsize="32"/>
16 <reg name="r6" bitsize="32"/>
17 <reg name="r7" bitsize="32"/>
18 <reg name="r8" bitsize="32"/>
19 <reg name="r9" bitsize="32"/>
[all …]
H A Ds390-acr.xml10 <reg name="acr0" bitsize="32" type="uint32" group="access"/>
11 <reg name="acr1" bitsize="32" type="uint32" group="access"/>
12 <reg name="acr2" bitsize="32" type="uint32" group="access"/>
13 <reg name="acr3" bitsize="32" type="uint32" group="access"/>
14 <reg name="acr4" bitsize="32" type="uint32" group="access"/>
15 <reg name="acr5" bitsize="32" type="uint32" group="access"/>
16 <reg name="acr6" bitsize="32" type="uint32" group="access"/>
17 <reg name="acr7" bitsize="32" type="uint32" group="access"/>
18 <reg name="acr8" bitsize="32" type="uint32" group="access"/>
19 <reg name="acr9" bitsize="32" type="uint32" group="access"/>
[all …]
H A Di386-32bit.xml37 <reg name="eax" bitsize="32" type="int32" regnum="0"/>
38 <reg name="ecx" bitsize="32" type="int32"/>
39 <reg name="edx" bitsize="32" type="int32"/>
40 <reg name="ebx" bitsize="32" type="int32"/>
41 <reg name="esp" bitsize="32" type="data_ptr"/>
42 <reg name="ebp" bitsize="32" type="data_ptr"/>
43 <reg name="esi" bitsize="32" type="int32"/>
44 <reg name="edi" bitsize="32" type="int32"/>
46 <reg name="eip" bitsize="32" type="code_ptr"/>
47 <reg name="eflags" bitsize="32" type="i386_eflags"/>
[all …]
/qemu/linux-user/sparc/
H A Dsyscall.tbl8 # The <abi> can be common, 64, or 32 for this file.
11 1 32 exit sys_exit sparc_exit
22 11 32 execv sunos_execv
25 13 32 chown sys_chown16
29 16 32 lchown sys_lchown16
37 23 32 setuid sys_setuid16
39 24 32 getuid sys_getuid16
45 29 32 pause sys_pause
47 30 32 utime sys_utime32
49 31 32 lchown32 sys_lchown
[all …]
/qemu/linux-user/ppc/
H A Dsyscall.tbl8 # The <abi> can be common, spu, nospu, 64, or 32 for this file.
23 13 32 time sys_time32
30 18 32 oldstat sys_stat sys_ni_syscall
36 22 32 umount sys_oldumount
41 25 32 stime sys_stime32
46 28 32 oldfstat sys_fstat sys_ni_syscall
50 30 32 utime sys_utime32
53 32 common gtty sys_ni_syscall
80 59 32 oldolduname sys_olduname
90 67 32 sigaction sys_sigaction compat_sys_sigaction
[all …]
/qemu/linux-user/s390x/
H A Dsyscall.tbl9 # where <abi> can be common, 64, or 32
23 13 32 time - sys_time32
26 16 32 lchown - sys_lchown16
31 23 32 setuid - sys_setuid16
32 24 32 getuid - sys_getuid16
33 25 32 stime - sys_stime32
49 46 32 setgid - sys_setgid16
50 47 32 getgid - sys_getgid16
52 49 32 geteuid - sys_geteuid16
53 50 32 getegid - sys_getegid16
[all …]
/qemu/linux-user/hppa/
H A Dsyscall.tbl8 # The <abi> can be common, 64, or 32 for this file.
23 13 32 time sys_time32
36 25 32 stime sys_stime32
42 30 32 utime sys_utime32
45 32 common listen sys_listen
121 108 32 pread64 parisc_pread64
123 109 32 pwrite64 parisc_pwrite64
139 124 32 adjtimex sys_adjtimex_time32
152 136 32 personality parisc_personality
178 161 32 sched_rr_get_interval sys_sched_rr_get_interval_time32
[all …]
/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc22 XTREG(0, 0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc,
24 XTREG(1, 4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0,
26 XTREG(2, 8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1,
28 XTREG(3, 12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2,
30 XTREG(4, 16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3,
32 XTREG(5, 20, 32, 4, 4, 0x0104, 0x0006, -2, 1, 0x0002, ar4,
34 XTREG(6, 24, 32, 4, 4, 0x0105, 0x0006, -2, 1, 0x0002, ar5,
36 XTREG(7, 28, 32, 4, 4, 0x0106, 0x0006, -2, 1, 0x0002, ar6,
38 XTREG(8, 32, 32, 4, 4, 0x0107, 0x0006, -2, 1, 0x0002, ar7,
40 XTREG(9, 36, 32, 4, 4, 0x0108, 0x0006, -2, 1, 0x0002, ar8,
[all …]
/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc25 XTREG(0, 0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc, 0, 0, 0, 0, 0, 0)
26 XTREG(1, 4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0, 0, 0, 0, 0, 0, 0)
27 XTREG(2, 8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1, 0, 0, 0, 0, 0, 0)
28 XTREG(3, 12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2, 0, 0, 0, 0, 0, 0)
29 XTREG(4, 16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3, 0, 0, 0, 0, 0, 0)
30 XTREG(5, 20, 32, 4, 4, 0x0104, 0x0006, -2, 1, 0x0002, ar4, 0, 0, 0, 0, 0, 0)
31 XTREG(6, 24, 32, 4, 4, 0x0105, 0x0006, -2, 1, 0x0002, ar5, 0, 0, 0, 0, 0, 0)
32 XTREG(7, 28, 32, 4, 4, 0x0106, 0x0006, -2, 1, 0x0002, ar6, 0, 0, 0, 0, 0, 0)
33 XTREG(8, 32, 32, 4, 4, 0x0107, 0x0006, -2, 1, 0x0002, ar7, 0, 0, 0, 0, 0, 0)
34 XTREG(9, 36, 32, 4, 4, 0x0108, 0x0006, -2, 1, 0x0002, ar8, 0, 0, 0, 0, 0, 0)
[all …]
/qemu/tests/tcg/mips/user/ase/msa/
H A Dtest_msa_compile_32r5eb.sh7 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
10 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
13 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
16 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
19 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
22 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
25 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
28 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
31 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
34 -EB -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
[all …]
H A Dtest_msa_compile_32r5el.sh7 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
10 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
13 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
16 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
19 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
22 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
25 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
28 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
31 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
34 -EL -static -mabi=32 -march=mips32r5 -mmsa -mno-odd-spreg -mfp64 -mnan=2008 -o \
[all …]
/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out25 read -P0xdc 32M 64k
27 read -P0 0x00f8000 32k
28 read -P0 0x2010000 32k
46 read -P0xdc 32M 64k
48 read -P0 0x00f8000 32k
49 read -P0 0x2010000 32k
65 read -P0xd5 0x108000 32k
66 read -P0xdc 32M 32k
95 read -P0xdc 32M 64k
97 read -P0 0x00f8000 32k
[all …]
/qemu/target/xtensa/core-sample_controller/
H A Dgdb-config.c.inc24 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
25 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
26 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
27 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
28 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
29 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
30 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
31 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
32 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
33 XTREG( 9, 36,32, 4, 4,0x0108,0x0006,-2, 1,0x0002,ar8, 0,0,0,0,0,0)
[all …]
/qemu/target/xtensa/core-dsp3400/
H A Dgdb-config.c.inc23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
32 XTREG( 9, 36,32, 4, 4,0x0108,0x0006,-2, 1,0x0002,ar8, 0,0,0,0,0,0)
[all …]

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