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Searched +full:0 +full:x5c000000 (Results 1 – 14 of 14) sorted by relevance

/linux-5.10/Documentation/devicetree/bindings/sram/
Dsram.yaml143 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
147 ranges = <0 0x5c000000 0x40000>;
150 reg = <0x100 0x50>;
154 reg = <0x1000 0x1000>;
159 reg = <0x20000 0x20000>;
174 reg = <0x02020000 0x54000>;
177 ranges = <0 0x02020000 0x54000>;
179 smp-sram@0 {
181 reg = <0x0 0x1000>;
186 reg = <0x53000 0x1000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dti_qspi.txt23 parameters for Mode-0 and Mode-3 operations, which needs to be set up by
24 the bootloader (U-Boot). Default configuration only supports Mode-0
34 reg = <0x47900000 0x100>, <0x30000000 0x4000000>;
37 #size-cells = <0>;
45 reg = <0x4b300000 0x100>,
46 <0x5c000000 0x4000000>,
48 syscon-chipselects = <&scm_conf 0x558>;
50 #size-cells = <0>;
/linux-5.10/arch/arm/mach-omap2/
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
Dpdata-quirks.c53 return 0; in omap_iommu_set_pwrdm_constraint()
60 omap_auxdata_lookup[0].platform_data = n8x0_legacy_init(); in omap2420_n8x0_legacy_init()
121 gpio_export(gpio, 0); in omap3_sbc_t3730_twl_callback()
123 return 0; in omap3_sbc_t3730_twl_callback()
136 gpio_export(gpio, 0); in omap3_sbc_t3x_usb_hub_init()
213 gpio_export(cm_t3517_wlan_gpios[0].gpio, 0); in omap3_sbc_t3517_wifi_init()
214 gpio_export(cm_t3517_wlan_gpios[1].gpio, 0); in omap3_sbc_t3517_wifi_init()
217 gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0); in omap3_sbc_t3517_wifi_init()
237 mmc_pdata[0].name = "external"; in nokia_n900_legacy_init()
244 rx51_secure_update_aux_cr(BIT(6), 0); in nokia_n900_legacy_init()
[all …]
/linux-5.10/arch/arm/boot/dts/
Daspeed-bmc-opp-vesnin.dts18 reg = <0x40000000 0x20000000>;
28 reg = <0x5f000000 0x01000000>; /* 16MB */
32 reg = <0x5c000000 0x02000000>; /* 32M */
51 gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
82 flash@0 {
99 pinctrl-0 = <&pinctrl_spi1debug_default>;
101 flash@0 {
112 pinctrl-0 = <&pinctrl_rmii1_default>;
133 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
141 reg = <0x50>;
[all …]
Dam3517.dtsi24 cpu: cpu@0 {
43 opp-supported-hw = <0xffffffff 0xffffffff>;
50 opp-supported-hw = <0xffffffff 0xffffffff>;
59 reg = <0x5c040000 0x1000>;
68 reg = <0x5c000000 0x30000>;
71 ti,davinci-ctrl-reg-offset = <0x10000>;
72 ti,davinci-ctrl-mod-reg-offset = <0>;
73 ti,davinci-ctrl-ram-offset = <0x20000>;
74 ti,davinci-ctrl-ram-size = <0x2000>;
85 reg = <0x5c030000 0x1000>;
[all …]
Daspeed-bmc-opp-palmetto.dts17 reg = <0x40000000 0x20000000>;
27 reg = <0x5f000000 0x01000000>; /* 16M */
31 reg = <0x5ee00000 0x00200000>;
37 reg = <0x5C000000 0x02000000>; /* 32MB */
60 #size-cells = <0>;
69 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
86 flash@0 {
98 pinctrl-0 = <&pinctrl_spi1debug_default>;
100 flash@0 {
110 pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
[all …]
Ddra7.dtsi60 reg = <0x0 0x48211000 0x0 0x1000>,
61 <0x0 0x48212000 0x0 0x2000>,
62 <0x0 0x48214000 0x0 0x2000>,
63 <0x0 0x48216000 0x0 0x2000>;
72 reg = <0x0 0x48281000 0x0 0x1000>;
78 #size-cells = <0>;
80 cpu0: cpu@0 {
83 reg = <0>;
107 opp-supported-hw = <0xFF 0x01>;
116 opp-supported-hw = <0xFF 0x02>;
[all …]
Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
69 #clock-cells = <0>;
75 #clock-cells = <0>;
81 #clock-cells = <0>;
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8qxp.dtsi52 #size-cells = <0>;
55 A35_0: cpu@0 {
58 reg = <0x0 0x0>;
69 reg = <0x0 0x1>;
80 reg = <0x0 0x2>;
91 reg = <0x0 0x3>;
124 reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */
125 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
137 reg = <0 0x92400000 0 0x2000000>;
157 mboxes = <&lsio_mu1 0 0
[all …]
/linux-5.10/arch/arm/mach-pxa/
Dpxa3xx.c50 #define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0))
56 #define ISRAM_START 0x5c000000
72 void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); in pxa3xx_cpu_standby()
74 memcpy_toio(sram + 0x8000, pm_enter_standby_start, in pxa3xx_cpu_standby()
77 AD2D0SR = ~0; in pxa3xx_cpu_standby()
78 AD2D1SR = ~0; in pxa3xx_cpu_standby()
80 AD2D1ER = 0; in pxa3xx_cpu_standby()
88 AD2D0ER = 0; in pxa3xx_cpu_standby()
89 AD2D1ER = 0; in pxa3xx_cpu_standby()
97 * 0x5c014000 for the moment.
[all …]
/linux-5.10/drivers/gpu/drm/savage/
Dsavage_drv.h101 S3_UNKNOWN = 0,
227 #define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
228 #define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
229 #define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
230 #define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
231 #define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
233 #define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region
241 #define SAVAGE_STATUS_WORD0 0x48C00
242 #define SAVAGE_STATUS_WORD1 0x48C04
243 #define SAVAGE_ALT_STATUS_WORD0 0x48C60
[all …]
/linux-5.10/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822c_table.c16 0x80000015, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]